edac_pci.c 9.4 KB

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  1. /*
  2. * EDAC PCI component
  3. *
  4. * Author: Dave Jiang <djiang@mvista.com>
  5. *
  6. * 2007 (c) MontaVista Software, Inc. This file is licensed under
  7. * the terms of the GNU General Public License version 2. This program
  8. * is licensed "as is" without any warranty of any kind, whether express
  9. * or implied.
  10. *
  11. */
  12. #include <linux/module.h>
  13. #include <linux/types.h>
  14. #include <linux/smp.h>
  15. #include <linux/init.h>
  16. #include <linux/sysctl.h>
  17. #include <linux/highmem.h>
  18. #include <linux/timer.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/list.h>
  22. #include <linux/ctype.h>
  23. #include <linux/workqueue.h>
  24. #include <asm/uaccess.h>
  25. #include <asm/page.h>
  26. #include "edac_core.h"
  27. #include "edac_module.h"
  28. static DEFINE_MUTEX(edac_pci_ctls_mutex);
  29. static LIST_HEAD(edac_pci_list);
  30. static atomic_t pci_indexes = ATOMIC_INIT(0);
  31. /*
  32. * edac_pci_alloc_ctl_info
  33. *
  34. * The alloc() function for the 'edac_pci' control info
  35. * structure. The chip driver will allocate one of these for each
  36. * edac_pci it is going to control/register with the EDAC CORE.
  37. */
  38. struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
  39. const char *edac_pci_name)
  40. {
  41. struct edac_pci_ctl_info *pci;
  42. void *p = NULL, *pvt;
  43. unsigned int size;
  44. edac_dbg(1, "\n");
  45. pci = edac_align_ptr(&p, sizeof(*pci), 1);
  46. pvt = edac_align_ptr(&p, 1, sz_pvt);
  47. size = ((unsigned long)pvt) + sz_pvt;
  48. /* Alloc the needed control struct memory */
  49. pci = kzalloc(size, GFP_KERNEL);
  50. if (pci == NULL)
  51. return NULL;
  52. /* Now much private space */
  53. pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;
  54. pci->pvt_info = pvt;
  55. pci->op_state = OP_ALLOC;
  56. snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);
  57. return pci;
  58. }
  59. EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
  60. /*
  61. * edac_pci_free_ctl_info()
  62. *
  63. * Last action on the pci control structure.
  64. *
  65. * call the remove sysfs information, which will unregister
  66. * this control struct's kobj. When that kobj's ref count
  67. * goes to zero, its release function will be call and then
  68. * kfree() the memory.
  69. */
  70. void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
  71. {
  72. edac_dbg(1, "\n");
  73. edac_pci_remove_sysfs(pci);
  74. }
  75. EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);
  76. /*
  77. * find_edac_pci_by_dev()
  78. * scans the edac_pci list for a specific 'struct device *'
  79. *
  80. * return NULL if not found, or return control struct pointer
  81. */
  82. static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
  83. {
  84. struct edac_pci_ctl_info *pci;
  85. struct list_head *item;
  86. edac_dbg(1, "\n");
  87. list_for_each(item, &edac_pci_list) {
  88. pci = list_entry(item, struct edac_pci_ctl_info, link);
  89. if (pci->dev == dev)
  90. return pci;
  91. }
  92. return NULL;
  93. }
  94. /*
  95. * add_edac_pci_to_global_list
  96. * Before calling this function, caller must assign a unique value to
  97. * edac_dev->pci_idx.
  98. * Return:
  99. * 0 on success
  100. * 1 on failure
  101. */
  102. static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
  103. {
  104. struct list_head *item, *insert_before;
  105. struct edac_pci_ctl_info *rover;
  106. edac_dbg(1, "\n");
  107. insert_before = &edac_pci_list;
  108. /* Determine if already on the list */
  109. rover = find_edac_pci_by_dev(pci->dev);
  110. if (unlikely(rover != NULL))
  111. goto fail0;
  112. /* Insert in ascending order by 'pci_idx', so find position */
  113. list_for_each(item, &edac_pci_list) {
  114. rover = list_entry(item, struct edac_pci_ctl_info, link);
  115. if (rover->pci_idx >= pci->pci_idx) {
  116. if (unlikely(rover->pci_idx == pci->pci_idx))
  117. goto fail1;
  118. insert_before = item;
  119. break;
  120. }
  121. }
  122. list_add_tail_rcu(&pci->link, insert_before);
  123. return 0;
  124. fail0:
  125. edac_printk(KERN_WARNING, EDAC_PCI,
  126. "%s (%s) %s %s already assigned %d\n",
  127. dev_name(rover->dev), edac_dev_name(rover),
  128. rover->mod_name, rover->ctl_name, rover->pci_idx);
  129. return 1;
  130. fail1:
  131. edac_printk(KERN_WARNING, EDAC_PCI,
  132. "but in low-level driver: attempt to assign\n"
  133. "\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
  134. __func__);
  135. return 1;
  136. }
  137. /*
  138. * del_edac_pci_from_global_list
  139. *
  140. * remove the PCI control struct from the global list
  141. */
  142. static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
  143. {
  144. list_del_rcu(&pci->link);
  145. /* these are for safe removal of devices from global list while
  146. * NMI handlers may be traversing list
  147. */
  148. synchronize_rcu();
  149. INIT_LIST_HEAD(&pci->link);
  150. }
  151. /*
  152. * edac_pci_workq_function()
  153. *
  154. * periodic function that performs the operation
  155. * scheduled by a workq request, for a given PCI control struct
  156. */
  157. static void edac_pci_workq_function(struct work_struct *work_req)
  158. {
  159. struct delayed_work *d_work = to_delayed_work(work_req);
  160. struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
  161. int msec;
  162. unsigned long delay;
  163. edac_dbg(3, "checking\n");
  164. mutex_lock(&edac_pci_ctls_mutex);
  165. if (pci->op_state != OP_RUNNING_POLL) {
  166. mutex_unlock(&edac_pci_ctls_mutex);
  167. return;
  168. }
  169. if (edac_pci_get_check_errors())
  170. pci->edac_check(pci);
  171. /* if we are on a one second period, then use round */
  172. msec = edac_pci_get_poll_msec();
  173. if (msec == 1000)
  174. delay = round_jiffies_relative(msecs_to_jiffies(msec));
  175. else
  176. delay = msecs_to_jiffies(msec);
  177. edac_queue_work(&pci->work, delay);
  178. mutex_unlock(&edac_pci_ctls_mutex);
  179. }
  180. /*
  181. * edac_pci_alloc_index: Allocate a unique PCI index number
  182. *
  183. * Return:
  184. * allocated index number
  185. *
  186. */
  187. int edac_pci_alloc_index(void)
  188. {
  189. return atomic_inc_return(&pci_indexes) - 1;
  190. }
  191. EXPORT_SYMBOL_GPL(edac_pci_alloc_index);
  192. /*
  193. * edac_pci_add_device: Insert the 'edac_dev' structure into the
  194. * edac_pci global list and create sysfs entries associated with
  195. * edac_pci structure.
  196. * @pci: pointer to the edac_device structure to be added to the list
  197. * @edac_idx: A unique numeric identifier to be assigned to the
  198. * 'edac_pci' structure.
  199. *
  200. * Return:
  201. * 0 Success
  202. * !0 Failure
  203. */
  204. int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
  205. {
  206. edac_dbg(0, "\n");
  207. pci->pci_idx = edac_idx;
  208. pci->start_time = jiffies;
  209. mutex_lock(&edac_pci_ctls_mutex);
  210. if (add_edac_pci_to_global_list(pci))
  211. goto fail0;
  212. if (edac_pci_create_sysfs(pci)) {
  213. edac_pci_printk(pci, KERN_WARNING,
  214. "failed to create sysfs pci\n");
  215. goto fail1;
  216. }
  217. if (pci->edac_check) {
  218. pci->op_state = OP_RUNNING_POLL;
  219. INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
  220. edac_queue_work(&pci->work, msecs_to_jiffies(edac_pci_get_poll_msec()));
  221. } else {
  222. pci->op_state = OP_RUNNING_INTERRUPT;
  223. }
  224. edac_pci_printk(pci, KERN_INFO,
  225. "Giving out device to module %s controller %s: DEV %s (%s)\n",
  226. pci->mod_name, pci->ctl_name, pci->dev_name,
  227. edac_op_state_to_string(pci->op_state));
  228. mutex_unlock(&edac_pci_ctls_mutex);
  229. return 0;
  230. /* error unwind stack */
  231. fail1:
  232. del_edac_pci_from_global_list(pci);
  233. fail0:
  234. mutex_unlock(&edac_pci_ctls_mutex);
  235. return 1;
  236. }
  237. EXPORT_SYMBOL_GPL(edac_pci_add_device);
  238. /*
  239. * edac_pci_del_device()
  240. * Remove sysfs entries for specified edac_pci structure and
  241. * then remove edac_pci structure from global list
  242. *
  243. * @dev:
  244. * Pointer to 'struct device' representing edac_pci structure
  245. * to remove
  246. *
  247. * Return:
  248. * Pointer to removed edac_pci structure,
  249. * or NULL if device not found
  250. */
  251. struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
  252. {
  253. struct edac_pci_ctl_info *pci;
  254. edac_dbg(0, "\n");
  255. mutex_lock(&edac_pci_ctls_mutex);
  256. /* ensure the control struct is on the global list
  257. * if not, then leave
  258. */
  259. pci = find_edac_pci_by_dev(dev);
  260. if (pci == NULL) {
  261. mutex_unlock(&edac_pci_ctls_mutex);
  262. return NULL;
  263. }
  264. pci->op_state = OP_OFFLINE;
  265. del_edac_pci_from_global_list(pci);
  266. mutex_unlock(&edac_pci_ctls_mutex);
  267. if (pci->edac_check)
  268. edac_stop_work(&pci->work);
  269. edac_printk(KERN_INFO, EDAC_PCI,
  270. "Removed device %d for %s %s: DEV %s\n",
  271. pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));
  272. return pci;
  273. }
  274. EXPORT_SYMBOL_GPL(edac_pci_del_device);
  275. /*
  276. * edac_pci_generic_check
  277. *
  278. * a Generic parity check API
  279. */
  280. static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
  281. {
  282. edac_dbg(4, "\n");
  283. edac_pci_do_parity_check();
  284. }
  285. /* free running instance index counter */
  286. static int edac_pci_idx;
  287. #define EDAC_PCI_GENCTL_NAME "EDAC PCI controller"
  288. struct edac_pci_gen_data {
  289. int edac_idx;
  290. };
  291. /*
  292. * edac_pci_create_generic_ctl
  293. *
  294. * A generic constructor for a PCI parity polling device
  295. * Some systems have more than one domain of PCI busses.
  296. * For systems with one domain, then this API will
  297. * provide for a generic poller.
  298. *
  299. * This routine calls the edac_pci_alloc_ctl_info() for
  300. * the generic device, with default values
  301. */
  302. struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
  303. const char *mod_name)
  304. {
  305. struct edac_pci_ctl_info *pci;
  306. struct edac_pci_gen_data *pdata;
  307. pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
  308. if (!pci)
  309. return NULL;
  310. pdata = pci->pvt_info;
  311. pci->dev = dev;
  312. dev_set_drvdata(pci->dev, pci);
  313. pci->dev_name = pci_name(to_pci_dev(dev));
  314. pci->mod_name = mod_name;
  315. pci->ctl_name = EDAC_PCI_GENCTL_NAME;
  316. if (edac_op_state == EDAC_OPSTATE_POLL)
  317. pci->edac_check = edac_pci_generic_check;
  318. pdata->edac_idx = edac_pci_idx++;
  319. if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
  320. edac_dbg(3, "failed edac_pci_add_device()\n");
  321. edac_pci_free_ctl_info(pci);
  322. return NULL;
  323. }
  324. return pci;
  325. }
  326. EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
  327. /*
  328. * edac_pci_release_generic_ctl
  329. *
  330. * The release function of a generic EDAC PCI polling device
  331. */
  332. void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
  333. {
  334. edac_dbg(0, "pci mod=%s\n", pci->mod_name);
  335. edac_pci_del_device(pci->dev);
  336. edac_pci_free_ctl_info(pci);
  337. }
  338. EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);