mtip32xx.h 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513
  1. /*
  2. * mtip32xx.h - Header file for the P320 SSD Block Driver
  3. * Copyright (C) 2011 Micron Technology, Inc.
  4. *
  5. * Portions of this code were derived from works subjected to the
  6. * following copyright:
  7. * Copyright (C) 2009 Integrated Device Technology, Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. */
  20. #ifndef __MTIP32XX_H__
  21. #define __MTIP32XX_H__
  22. #include <linux/spinlock.h>
  23. #include <linux/rwsem.h>
  24. #include <linux/ata.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/genhd.h>
  27. /* Offset of Subsystem Device ID in pci confoguration space */
  28. #define PCI_SUBSYSTEM_DEVICEID 0x2E
  29. /* offset of Device Control register in PCIe extended capabilites space */
  30. #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48
  31. /* check for erase mode support during secure erase */
  32. #define MTIP_SEC_ERASE_MODE 0x2
  33. /* # of times to retry timed out/failed IOs */
  34. #define MTIP_MAX_RETRIES 2
  35. /* Various timeout values in ms */
  36. #define MTIP_NCQ_CMD_TIMEOUT_MS 15000
  37. #define MTIP_IOCTL_CMD_TIMEOUT_MS 5000
  38. #define MTIP_INT_CMD_TIMEOUT_MS 5000
  39. #define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \
  40. (MTIP_MAX_RETRIES + 1))
  41. /* check for timeouts every 500ms */
  42. #define MTIP_TIMEOUT_CHECK_PERIOD 500
  43. /* ftl rebuild */
  44. #define MTIP_FTL_REBUILD_OFFSET 142
  45. #define MTIP_FTL_REBUILD_MAGIC 0xED51
  46. #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000
  47. /* unaligned IO handling */
  48. #define MTIP_MAX_UNALIGNED_SLOTS 2
  49. /* Macro to extract the tag bit number from a tag value. */
  50. #define MTIP_TAG_BIT(tag) (tag & 0x1F)
  51. /*
  52. * Macro to extract the tag index from a tag value. The index
  53. * is used to access the correct s_active/Command Issue register based
  54. * on the tag value.
  55. */
  56. #define MTIP_TAG_INDEX(tag) (tag >> 5)
  57. /*
  58. * Maximum number of scatter gather entries
  59. * a single command may have.
  60. */
  61. #define MTIP_MAX_SG 504
  62. /*
  63. * Maximum number of slot groups (Command Issue & s_active registers)
  64. * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
  65. */
  66. #define MTIP_MAX_SLOT_GROUPS 8
  67. /* Internal command tag. */
  68. #define MTIP_TAG_INTERNAL 0
  69. /* Micron Vendor ID & P320x SSD Device ID */
  70. #define PCI_VENDOR_ID_MICRON 0x1344
  71. #define P320H_DEVICE_ID 0x5150
  72. #define P320M_DEVICE_ID 0x5151
  73. #define P320S_DEVICE_ID 0x5152
  74. #define P325M_DEVICE_ID 0x5153
  75. #define P420H_DEVICE_ID 0x5160
  76. #define P420M_DEVICE_ID 0x5161
  77. #define P425M_DEVICE_ID 0x5163
  78. /* Driver name and version strings */
  79. #define MTIP_DRV_NAME "mtip32xx"
  80. #define MTIP_DRV_VERSION "1.3.1"
  81. /* Maximum number of minor device numbers per device. */
  82. #define MTIP_MAX_MINORS 16
  83. /* Maximum number of supported command slots. */
  84. #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32)
  85. /*
  86. * Per-tag bitfield size in longs.
  87. * Linux bit manipulation functions
  88. * (i.e. test_and_set_bit, find_next_zero_bit)
  89. * manipulate memory in longs, so we try to make the math work.
  90. * take the slot groups and find the number of longs, rounding up.
  91. * Careful! i386 and x86_64 use different size longs!
  92. */
  93. #define U32_PER_LONG (sizeof(long) / sizeof(u32))
  94. #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
  95. (U32_PER_LONG-1))/U32_PER_LONG)
  96. /* BAR number used to access the HBA registers. */
  97. #define MTIP_ABAR 5
  98. #ifdef DEBUG
  99. #define dbg_printk(format, arg...) \
  100. printk(pr_fmt(format), ##arg);
  101. #else
  102. #define dbg_printk(format, arg...)
  103. #endif
  104. #define MTIP_DFS_MAX_BUF_SIZE 1024
  105. #define __force_bit2int (unsigned int __force)
  106. enum {
  107. /* below are bit numbers in 'flags' defined in mtip_port */
  108. MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */
  109. MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */
  110. MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */
  111. MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */
  112. MTIP_PF_TO_ACTIVE_BIT = 9, /* timeout handling */
  113. MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
  114. (1 << MTIP_PF_EH_ACTIVE_BIT) |
  115. (1 << MTIP_PF_SE_ACTIVE_BIT) |
  116. (1 << MTIP_PF_DM_ACTIVE_BIT) |
  117. (1 << MTIP_PF_TO_ACTIVE_BIT)),
  118. MTIP_PF_SVC_THD_ACTIVE_BIT = 4,
  119. MTIP_PF_ISSUE_CMDS_BIT = 5,
  120. MTIP_PF_REBUILD_BIT = 6,
  121. MTIP_PF_SVC_THD_STOP_BIT = 8,
  122. MTIP_PF_SVC_THD_WORK = ((1 << MTIP_PF_EH_ACTIVE_BIT) |
  123. (1 << MTIP_PF_ISSUE_CMDS_BIT) |
  124. (1 << MTIP_PF_REBUILD_BIT) |
  125. (1 << MTIP_PF_SVC_THD_STOP_BIT) |
  126. (1 << MTIP_PF_TO_ACTIVE_BIT)),
  127. /* below are bit numbers in 'dd_flag' defined in driver_data */
  128. MTIP_DDF_SEC_LOCK_BIT = 0,
  129. MTIP_DDF_REMOVE_PENDING_BIT = 1,
  130. MTIP_DDF_OVER_TEMP_BIT = 2,
  131. MTIP_DDF_WRITE_PROTECT_BIT = 3,
  132. MTIP_DDF_CLEANUP_BIT = 5,
  133. MTIP_DDF_RESUME_BIT = 6,
  134. MTIP_DDF_INIT_DONE_BIT = 7,
  135. MTIP_DDF_REBUILD_FAILED_BIT = 8,
  136. MTIP_DDF_REMOVAL_BIT = 9,
  137. MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
  138. (1 << MTIP_DDF_SEC_LOCK_BIT) |
  139. (1 << MTIP_DDF_OVER_TEMP_BIT) |
  140. (1 << MTIP_DDF_WRITE_PROTECT_BIT) |
  141. (1 << MTIP_DDF_REBUILD_FAILED_BIT)),
  142. };
  143. struct smart_attr {
  144. u8 attr_id;
  145. u16 flags;
  146. u8 cur;
  147. u8 worst;
  148. u32 data;
  149. u8 res[3];
  150. } __packed;
  151. struct mtip_work {
  152. struct work_struct work;
  153. void *port;
  154. int cpu_binding;
  155. u32 completed;
  156. } ____cacheline_aligned_in_smp;
  157. #define DEFINE_HANDLER(group) \
  158. void mtip_workq_sdbf##group(struct work_struct *work) \
  159. { \
  160. struct mtip_work *w = (struct mtip_work *) work; \
  161. mtip_workq_sdbfx(w->port, group, w->completed); \
  162. }
  163. #define MTIP_TRIM_TIMEOUT_MS 240000
  164. #define MTIP_MAX_TRIM_ENTRIES 8
  165. #define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8
  166. struct mtip_trim_entry {
  167. u32 lba; /* starting lba of region */
  168. u16 rsvd; /* unused */
  169. u16 range; /* # of 512b blocks to trim */
  170. } __packed;
  171. struct mtip_trim {
  172. /* Array of regions to trim */
  173. struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES];
  174. } __packed;
  175. /* Register Frame Information Structure (FIS), host to device. */
  176. struct host_to_dev_fis {
  177. /*
  178. * FIS type.
  179. * - 27h Register FIS, host to device.
  180. * - 34h Register FIS, device to host.
  181. * - 39h DMA Activate FIS, device to host.
  182. * - 41h DMA Setup FIS, bi-directional.
  183. * - 46h Data FIS, bi-directional.
  184. * - 58h BIST Activate FIS, bi-directional.
  185. * - 5Fh PIO Setup FIS, device to host.
  186. * - A1h Set Device Bits FIS, device to host.
  187. */
  188. unsigned char type;
  189. unsigned char opts;
  190. unsigned char command;
  191. unsigned char features;
  192. union {
  193. unsigned char lba_low;
  194. unsigned char sector;
  195. };
  196. union {
  197. unsigned char lba_mid;
  198. unsigned char cyl_low;
  199. };
  200. union {
  201. unsigned char lba_hi;
  202. unsigned char cyl_hi;
  203. };
  204. union {
  205. unsigned char device;
  206. unsigned char head;
  207. };
  208. union {
  209. unsigned char lba_low_ex;
  210. unsigned char sector_ex;
  211. };
  212. union {
  213. unsigned char lba_mid_ex;
  214. unsigned char cyl_low_ex;
  215. };
  216. union {
  217. unsigned char lba_hi_ex;
  218. unsigned char cyl_hi_ex;
  219. };
  220. unsigned char features_ex;
  221. unsigned char sect_count;
  222. unsigned char sect_cnt_ex;
  223. unsigned char res2;
  224. unsigned char control;
  225. unsigned int res3;
  226. };
  227. /* Command header structure. */
  228. struct mtip_cmd_hdr {
  229. /*
  230. * Command options.
  231. * - Bits 31:16 Number of PRD entries.
  232. * - Bits 15:8 Unused in this implementation.
  233. * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
  234. * - Bit 6 Write bit, should be set when writing data to the device.
  235. * - Bit 5 Unused in this implementation.
  236. * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
  237. */
  238. unsigned int opts;
  239. /* This field is unsed when using NCQ. */
  240. union {
  241. unsigned int byte_count;
  242. unsigned int status;
  243. };
  244. /*
  245. * Lower 32 bits of the command table address associated with this
  246. * header. The command table addresses must be 128 byte aligned.
  247. */
  248. unsigned int ctba;
  249. /*
  250. * If 64 bit addressing is used this field is the upper 32 bits
  251. * of the command table address associated with this command.
  252. */
  253. unsigned int ctbau;
  254. /* Reserved and unused. */
  255. unsigned int res[4];
  256. };
  257. /* Command scatter gather structure (PRD). */
  258. struct mtip_cmd_sg {
  259. /*
  260. * Low 32 bits of the data buffer address. For P320 this
  261. * address must be 8 byte aligned signified by bits 2:0 being
  262. * set to 0.
  263. */
  264. unsigned int dba;
  265. /*
  266. * When 64 bit addressing is used this field is the upper
  267. * 32 bits of the data buffer address.
  268. */
  269. unsigned int dba_upper;
  270. /* Unused. */
  271. unsigned int reserved;
  272. /*
  273. * Bit 31: interrupt when this data block has been transferred.
  274. * Bits 30..22: reserved
  275. * Bits 21..0: byte count (minus 1). For P320 the byte count must be
  276. * 8 byte aligned signified by bits 2:0 being set to 1.
  277. */
  278. unsigned int info;
  279. };
  280. struct mtip_port;
  281. /* Structure used to describe a command. */
  282. struct mtip_cmd {
  283. struct mtip_cmd_hdr *command_header; /* ptr to command header entry */
  284. dma_addr_t command_header_dma; /* corresponding physical address */
  285. void *command; /* ptr to command table entry */
  286. dma_addr_t command_dma; /* corresponding physical address */
  287. void *comp_data; /* data passed to completion function comp_func() */
  288. /*
  289. * Completion function called by the ISR upon completion of
  290. * a command.
  291. */
  292. void (*comp_func)(struct mtip_port *port,
  293. int tag,
  294. struct mtip_cmd *cmd,
  295. int status);
  296. int scatter_ents; /* Number of scatter list entries used */
  297. int unaligned; /* command is unaligned on 4k boundary */
  298. struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
  299. int retries; /* The number of retries left for this command. */
  300. int direction; /* Data transfer direction */
  301. };
  302. /* Structure used to describe a port. */
  303. struct mtip_port {
  304. /* Pointer back to the driver data for this port. */
  305. struct driver_data *dd;
  306. /*
  307. * Used to determine if the data pointed to by the
  308. * identify field is valid.
  309. */
  310. unsigned long identify_valid;
  311. /* Base address of the memory mapped IO for the port. */
  312. void __iomem *mmio;
  313. /* Array of pointers to the memory mapped s_active registers. */
  314. void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
  315. /* Array of pointers to the memory mapped completed registers. */
  316. void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
  317. /* Array of pointers to the memory mapped Command Issue registers. */
  318. void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
  319. /*
  320. * Pointer to the beginning of the command header memory as used
  321. * by the driver.
  322. */
  323. void *command_list;
  324. /*
  325. * Pointer to the beginning of the command header memory as used
  326. * by the DMA.
  327. */
  328. dma_addr_t command_list_dma;
  329. /*
  330. * Pointer to the beginning of the RX FIS memory as used
  331. * by the driver.
  332. */
  333. void *rxfis;
  334. /*
  335. * Pointer to the beginning of the RX FIS memory as used
  336. * by the DMA.
  337. */
  338. dma_addr_t rxfis_dma;
  339. /*
  340. * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
  341. */
  342. void *block1;
  343. /*
  344. * DMA address of region for RX Fis, Identify, RLE10, and SMART
  345. */
  346. dma_addr_t block1_dma;
  347. /*
  348. * Pointer to the beginning of the identify data memory as used
  349. * by the driver.
  350. */
  351. u16 *identify;
  352. /*
  353. * Pointer to the beginning of the identify data memory as used
  354. * by the DMA.
  355. */
  356. dma_addr_t identify_dma;
  357. /*
  358. * Pointer to the beginning of a sector buffer that is used
  359. * by the driver when issuing internal commands.
  360. */
  361. u16 *sector_buffer;
  362. /*
  363. * Pointer to the beginning of a sector buffer that is used
  364. * by the DMA when the driver issues internal commands.
  365. */
  366. dma_addr_t sector_buffer_dma;
  367. u16 *log_buf;
  368. dma_addr_t log_buf_dma;
  369. u8 *smart_buf;
  370. dma_addr_t smart_buf_dma;
  371. /*
  372. * used to queue commands when an internal command is in progress
  373. * or error handling is active
  374. */
  375. unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
  376. /* Used by mtip_service_thread to wait for an event */
  377. wait_queue_head_t svc_wait;
  378. /*
  379. * indicates the state of the port. Also, helps the service thread
  380. * to determine its action on wake up.
  381. */
  382. unsigned long flags;
  383. /*
  384. * Timer used to complete commands that have been active for too long.
  385. */
  386. unsigned long ic_pause_timer;
  387. /* Semaphore to control queue depth of unaligned IOs */
  388. struct semaphore cmd_slot_unal;
  389. /* Spinlock for working around command-issue bug. */
  390. spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
  391. };
  392. /*
  393. * Driver private data structure.
  394. *
  395. * One structure is allocated per probed device.
  396. */
  397. struct driver_data {
  398. void __iomem *mmio; /* Base address of the HBA registers. */
  399. int major; /* Major device number. */
  400. int instance; /* Instance number. First device probed is 0, ... */
  401. struct gendisk *disk; /* Pointer to our gendisk structure. */
  402. struct pci_dev *pdev; /* Pointer to the PCI device structure. */
  403. struct request_queue *queue; /* Our request queue. */
  404. struct blk_mq_tag_set tags; /* blk_mq tags */
  405. struct mtip_port *port; /* Pointer to the port data structure. */
  406. unsigned product_type; /* magic value declaring the product type */
  407. unsigned slot_groups; /* number of slot groups the product supports */
  408. unsigned long index; /* Index to determine the disk name */
  409. unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
  410. struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
  411. struct dentry *dfs_node;
  412. bool trim_supp; /* flag indicating trim support */
  413. bool sr;
  414. int numa_node; /* NUMA support */
  415. char workq_name[32];
  416. struct workqueue_struct *isr_workq;
  417. atomic_t irq_workers_active;
  418. struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
  419. int isr_binding;
  420. struct block_device *bdev;
  421. struct list_head online_list; /* linkage for online list */
  422. struct list_head remove_list; /* linkage for removing list */
  423. int unal_qdepth; /* qdepth of unaligned IO queue */
  424. };
  425. #endif