process.c 8.3 KB

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  1. /*
  2. * linux/arch/unicore32/kernel/process.c
  3. *
  4. * Code specific to PKUnity SoC and UniCore ISA
  5. *
  6. * Copyright (C) 2001-2010 GUAN Xue-tao
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <stdarg.h>
  13. #include <linux/module.h>
  14. #include <linux/sched.h>
  15. #include <linux/kernel.h>
  16. #include <linux/mm.h>
  17. #include <linux/stddef.h>
  18. #include <linux/unistd.h>
  19. #include <linux/delay.h>
  20. #include <linux/reboot.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/kallsyms.h>
  23. #include <linux/init.h>
  24. #include <linux/cpu.h>
  25. #include <linux/elfcore.h>
  26. #include <linux/pm.h>
  27. #include <linux/tick.h>
  28. #include <linux/utsname.h>
  29. #include <linux/uaccess.h>
  30. #include <linux/random.h>
  31. #include <linux/gpio.h>
  32. #include <linux/stacktrace.h>
  33. #include <asm/cacheflush.h>
  34. #include <asm/processor.h>
  35. #include <asm/stacktrace.h>
  36. #include "setup.h"
  37. static const char * const processor_modes[] = {
  38. "UK00", "UK01", "UK02", "UK03", "UK04", "UK05", "UK06", "UK07",
  39. "UK08", "UK09", "UK0A", "UK0B", "UK0C", "UK0D", "UK0E", "UK0F",
  40. "USER", "REAL", "INTR", "PRIV", "UK14", "UK15", "UK16", "ABRT",
  41. "UK18", "UK19", "UK1A", "EXTN", "UK1C", "UK1D", "UK1E", "SUSR"
  42. };
  43. void arch_cpu_idle(void)
  44. {
  45. cpu_do_idle();
  46. local_irq_enable();
  47. }
  48. void machine_halt(void)
  49. {
  50. gpio_set_value(GPO_SOFT_OFF, 0);
  51. }
  52. /*
  53. * Function pointers to optional machine specific functions
  54. */
  55. void (*pm_power_off)(void) = NULL;
  56. EXPORT_SYMBOL(pm_power_off);
  57. void machine_power_off(void)
  58. {
  59. if (pm_power_off)
  60. pm_power_off();
  61. machine_halt();
  62. }
  63. void machine_restart(char *cmd)
  64. {
  65. /* Disable interrupts first */
  66. local_irq_disable();
  67. /*
  68. * Tell the mm system that we are going to reboot -
  69. * we may need it to insert some 1:1 mappings so that
  70. * soft boot works.
  71. */
  72. setup_mm_for_reboot();
  73. /* Clean and invalidate caches */
  74. flush_cache_all();
  75. /* Turn off caching */
  76. cpu_proc_fin();
  77. /* Push out any further dirty data, and ensure cache is empty */
  78. flush_cache_all();
  79. /*
  80. * Now handle reboot code.
  81. */
  82. if (reboot_mode == REBOOT_SOFT) {
  83. /* Jump into ROM at address 0xffff0000 */
  84. cpu_reset(VECTORS_BASE);
  85. } else {
  86. writel(0x00002001, PM_PLLSYSCFG); /* cpu clk = 250M */
  87. writel(0x00100800, PM_PLLDDRCFG); /* ddr clk = 44M */
  88. writel(0x00002001, PM_PLLVGACFG); /* vga clk = 250M */
  89. /* Use on-chip reset capability */
  90. /* following instructions must be in one icache line */
  91. __asm__ __volatile__(
  92. " .align 5\n\t"
  93. " stw %1, [%0]\n\t"
  94. "201: ldw r0, [%0]\n\t"
  95. " cmpsub.a r0, #0\n\t"
  96. " bne 201b\n\t"
  97. " stw %3, [%2]\n\t"
  98. " nop; nop; nop\n\t"
  99. /* prefetch 3 instructions at most */
  100. :
  101. : "r" (PM_PMCR),
  102. "r" (PM_PMCR_CFBSYS | PM_PMCR_CFBDDR
  103. | PM_PMCR_CFBVGA),
  104. "r" (RESETC_SWRR),
  105. "r" (RESETC_SWRR_SRB)
  106. : "r0", "memory");
  107. }
  108. /*
  109. * Whoops - the architecture was unable to reboot.
  110. * Tell the user!
  111. */
  112. mdelay(1000);
  113. printk(KERN_EMERG "Reboot failed -- System halted\n");
  114. do { } while (1);
  115. }
  116. void __show_regs(struct pt_regs *regs)
  117. {
  118. unsigned long flags;
  119. char buf[64];
  120. show_regs_print_info(KERN_DEFAULT);
  121. print_symbol("PC is at %s\n", instruction_pointer(regs));
  122. print_symbol("LR is at %s\n", regs->UCreg_lr);
  123. printk(KERN_DEFAULT "pc : [<%08lx>] lr : [<%08lx>] psr: %08lx\n"
  124. "sp : %08lx ip : %08lx fp : %08lx\n",
  125. regs->UCreg_pc, regs->UCreg_lr, regs->UCreg_asr,
  126. regs->UCreg_sp, regs->UCreg_ip, regs->UCreg_fp);
  127. printk(KERN_DEFAULT "r26: %08lx r25: %08lx r24: %08lx\n",
  128. regs->UCreg_26, regs->UCreg_25,
  129. regs->UCreg_24);
  130. printk(KERN_DEFAULT "r23: %08lx r22: %08lx r21: %08lx r20: %08lx\n",
  131. regs->UCreg_23, regs->UCreg_22,
  132. regs->UCreg_21, regs->UCreg_20);
  133. printk(KERN_DEFAULT "r19: %08lx r18: %08lx r17: %08lx r16: %08lx\n",
  134. regs->UCreg_19, regs->UCreg_18,
  135. regs->UCreg_17, regs->UCreg_16);
  136. printk(KERN_DEFAULT "r15: %08lx r14: %08lx r13: %08lx r12: %08lx\n",
  137. regs->UCreg_15, regs->UCreg_14,
  138. regs->UCreg_13, regs->UCreg_12);
  139. printk(KERN_DEFAULT "r11: %08lx r10: %08lx r9 : %08lx r8 : %08lx\n",
  140. regs->UCreg_11, regs->UCreg_10,
  141. regs->UCreg_09, regs->UCreg_08);
  142. printk(KERN_DEFAULT "r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  143. regs->UCreg_07, regs->UCreg_06,
  144. regs->UCreg_05, regs->UCreg_04);
  145. printk(KERN_DEFAULT "r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  146. regs->UCreg_03, regs->UCreg_02,
  147. regs->UCreg_01, regs->UCreg_00);
  148. flags = regs->UCreg_asr;
  149. buf[0] = flags & PSR_S_BIT ? 'S' : 's';
  150. buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z';
  151. buf[2] = flags & PSR_C_BIT ? 'C' : 'c';
  152. buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
  153. buf[4] = '\0';
  154. printk(KERN_DEFAULT "Flags: %s INTR o%s REAL o%s Mode %s Segment %s\n",
  155. buf, interrupts_enabled(regs) ? "n" : "ff",
  156. fast_interrupts_enabled(regs) ? "n" : "ff",
  157. processor_modes[processor_mode(regs)],
  158. segment_eq(get_fs(), get_ds()) ? "kernel" : "user");
  159. {
  160. unsigned int ctrl;
  161. buf[0] = '\0';
  162. {
  163. unsigned int transbase;
  164. asm("movc %0, p0.c2, #0\n"
  165. : "=r" (transbase));
  166. snprintf(buf, sizeof(buf), " Table: %08x", transbase);
  167. }
  168. asm("movc %0, p0.c1, #0\n" : "=r" (ctrl));
  169. printk(KERN_DEFAULT "Control: %08x%s\n", ctrl, buf);
  170. }
  171. }
  172. void show_regs(struct pt_regs *regs)
  173. {
  174. printk(KERN_DEFAULT "\n");
  175. printk(KERN_DEFAULT "Pid: %d, comm: %20s\n",
  176. task_pid_nr(current), current->comm);
  177. __show_regs(regs);
  178. __backtrace();
  179. }
  180. void flush_thread(void)
  181. {
  182. struct thread_info *thread = current_thread_info();
  183. struct task_struct *tsk = current;
  184. memset(thread->used_cp, 0, sizeof(thread->used_cp));
  185. memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
  186. #ifdef CONFIG_UNICORE_FPU_F64
  187. memset(&thread->fpstate, 0, sizeof(struct fp_state));
  188. #endif
  189. }
  190. void release_thread(struct task_struct *dead_task)
  191. {
  192. }
  193. asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
  194. asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread");
  195. int
  196. copy_thread(unsigned long clone_flags, unsigned long stack_start,
  197. unsigned long stk_sz, struct task_struct *p)
  198. {
  199. struct thread_info *thread = task_thread_info(p);
  200. struct pt_regs *childregs = task_pt_regs(p);
  201. memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
  202. thread->cpu_context.sp = (unsigned long)childregs;
  203. if (unlikely(p->flags & PF_KTHREAD)) {
  204. thread->cpu_context.pc = (unsigned long)ret_from_kernel_thread;
  205. thread->cpu_context.r4 = stack_start;
  206. thread->cpu_context.r5 = stk_sz;
  207. memset(childregs, 0, sizeof(struct pt_regs));
  208. } else {
  209. thread->cpu_context.pc = (unsigned long)ret_from_fork;
  210. *childregs = *current_pt_regs();
  211. childregs->UCreg_00 = 0;
  212. if (stack_start)
  213. childregs->UCreg_sp = stack_start;
  214. if (clone_flags & CLONE_SETTLS)
  215. childregs->UCreg_16 = childregs->UCreg_03;
  216. }
  217. return 0;
  218. }
  219. /*
  220. * Fill in the task's elfregs structure for a core dump.
  221. */
  222. int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
  223. {
  224. elf_core_copy_regs(elfregs, task_pt_regs(t));
  225. return 1;
  226. }
  227. /*
  228. * fill in the fpe structure for a core dump...
  229. */
  230. int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fp)
  231. {
  232. struct thread_info *thread = current_thread_info();
  233. int used_math = thread->used_cp[1] | thread->used_cp[2];
  234. #ifdef CONFIG_UNICORE_FPU_F64
  235. if (used_math)
  236. memcpy(fp, &thread->fpstate, sizeof(*fp));
  237. #endif
  238. return used_math != 0;
  239. }
  240. EXPORT_SYMBOL(dump_fpu);
  241. unsigned long get_wchan(struct task_struct *p)
  242. {
  243. struct stackframe frame;
  244. int count = 0;
  245. if (!p || p == current || p->state == TASK_RUNNING)
  246. return 0;
  247. frame.fp = thread_saved_fp(p);
  248. frame.sp = thread_saved_sp(p);
  249. frame.lr = 0; /* recovered from the stack */
  250. frame.pc = thread_saved_pc(p);
  251. do {
  252. int ret = unwind_frame(&frame);
  253. if (ret < 0)
  254. return 0;
  255. if (!in_sched_functions(frame.pc))
  256. return frame.pc;
  257. } while ((count++) < 16);
  258. return 0;
  259. }
  260. unsigned long arch_randomize_brk(struct mm_struct *mm)
  261. {
  262. return randomize_page(mm->brk, 0x02000000);
  263. }
  264. /*
  265. * The vectors page is always readable from user space for the
  266. * atomic helpers and the signal restart code. Let's declare a mapping
  267. * for it so it is visible through ptrace and /proc/<pid>/mem.
  268. */
  269. int vectors_user_mapping(void)
  270. {
  271. struct mm_struct *mm = current->mm;
  272. return install_special_mapping(mm, 0xffff0000, PAGE_SIZE,
  273. VM_READ | VM_EXEC |
  274. VM_MAYREAD | VM_MAYEXEC |
  275. VM_DONTEXPAND | VM_DONTDUMP,
  276. NULL);
  277. }
  278. const char *arch_vma_name(struct vm_area_struct *vma)
  279. {
  280. return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL;
  281. }