board-apsh4a3a.c 4.3 KB

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  1. /*
  2. * ALPHAPROJECT AP-SH4A-3A Support.
  3. *
  4. * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. * Copyright (C) 2009 Paul Mundt
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/io.h>
  15. #include <linux/mtd/physmap.h>
  16. #include <linux/regulator/fixed.h>
  17. #include <linux/regulator/machine.h>
  18. #include <linux/smsc911x.h>
  19. #include <linux/irq.h>
  20. #include <linux/clk.h>
  21. #include <asm/machvec.h>
  22. #include <asm/sizes.h>
  23. #include <asm/clock.h>
  24. static struct mtd_partition nor_flash_partitions[] = {
  25. {
  26. .name = "loader",
  27. .offset = 0x00000000,
  28. .size = 512 * 1024,
  29. },
  30. {
  31. .name = "bootenv",
  32. .offset = MTDPART_OFS_APPEND,
  33. .size = 512 * 1024,
  34. },
  35. {
  36. .name = "kernel",
  37. .offset = MTDPART_OFS_APPEND,
  38. .size = 4 * 1024 * 1024,
  39. },
  40. {
  41. .name = "data",
  42. .offset = MTDPART_OFS_APPEND,
  43. .size = MTDPART_SIZ_FULL,
  44. },
  45. };
  46. static struct physmap_flash_data nor_flash_data = {
  47. .width = 4,
  48. .parts = nor_flash_partitions,
  49. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  50. };
  51. static struct resource nor_flash_resources[] = {
  52. [0] = {
  53. .start = 0x00000000,
  54. .end = 0x01000000 - 1,
  55. .flags = IORESOURCE_MEM,
  56. }
  57. };
  58. static struct platform_device nor_flash_device = {
  59. .name = "physmap-flash",
  60. .dev = {
  61. .platform_data = &nor_flash_data,
  62. },
  63. .num_resources = ARRAY_SIZE(nor_flash_resources),
  64. .resource = nor_flash_resources,
  65. };
  66. /* Dummy supplies, where voltage doesn't matter */
  67. static struct regulator_consumer_supply dummy_supplies[] = {
  68. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  69. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  70. };
  71. static struct resource smsc911x_resources[] = {
  72. [0] = {
  73. .name = "smsc911x-memory",
  74. .start = 0xA4000000,
  75. .end = 0xA4000000 + SZ_256 - 1,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. [1] = {
  79. .name = "smsc911x-irq",
  80. .start = evt2irq(0x200),
  81. .end = evt2irq(0x200),
  82. .flags = IORESOURCE_IRQ,
  83. },
  84. };
  85. static struct smsc911x_platform_config smsc911x_config = {
  86. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  87. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  88. .flags = SMSC911X_USE_16BIT,
  89. .phy_interface = PHY_INTERFACE_MODE_MII,
  90. };
  91. static struct platform_device smsc911x_device = {
  92. .name = "smsc911x",
  93. .id = -1,
  94. .num_resources = ARRAY_SIZE(smsc911x_resources),
  95. .resource = smsc911x_resources,
  96. .dev = {
  97. .platform_data = &smsc911x_config,
  98. },
  99. };
  100. static struct platform_device *apsh4a3a_devices[] __initdata = {
  101. &nor_flash_device,
  102. &smsc911x_device,
  103. };
  104. static int __init apsh4a3a_devices_setup(void)
  105. {
  106. regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
  107. return platform_add_devices(apsh4a3a_devices,
  108. ARRAY_SIZE(apsh4a3a_devices));
  109. }
  110. device_initcall(apsh4a3a_devices_setup);
  111. static int apsh4a3a_clk_init(void)
  112. {
  113. struct clk *clk;
  114. int ret;
  115. clk = clk_get(NULL, "extal");
  116. if (IS_ERR(clk))
  117. return PTR_ERR(clk);
  118. ret = clk_set_rate(clk, 33333000);
  119. clk_put(clk);
  120. return ret;
  121. }
  122. /* Initialize the board */
  123. static void __init apsh4a3a_setup(char **cmdline_p)
  124. {
  125. printk(KERN_INFO "Alpha Project AP-SH4A-3A support:\n");
  126. }
  127. static void __init apsh4a3a_init_irq(void)
  128. {
  129. plat_irq_setup_pins(IRQ_MODE_IRQ7654);
  130. }
  131. /* Return the board specific boot mode pin configuration */
  132. static int apsh4a3a_mode_pins(void)
  133. {
  134. int value = 0;
  135. /* These are the factory default settings of SW1 and SW2.
  136. * If you change these dip switches then you will need to
  137. * adjust the values below as well.
  138. */
  139. value &= ~MODE_PIN0; /* Clock Mode 16 */
  140. value &= ~MODE_PIN1;
  141. value &= ~MODE_PIN2;
  142. value &= ~MODE_PIN3;
  143. value |= MODE_PIN4;
  144. value &= ~MODE_PIN5; /* 16-bit Area0 bus width */
  145. value |= MODE_PIN6; /* Area 0 SRAM interface */
  146. value |= MODE_PIN7;
  147. value |= MODE_PIN8; /* Little Endian */
  148. value |= MODE_PIN9; /* Master Mode */
  149. value |= MODE_PIN10; /* Crystal resonator */
  150. value |= MODE_PIN11; /* Display Unit */
  151. value |= MODE_PIN12;
  152. value &= ~MODE_PIN13; /* 29-bit address mode */
  153. value |= MODE_PIN14; /* No PLL step-up */
  154. return value;
  155. }
  156. /*
  157. * The Machine Vector
  158. */
  159. static struct sh_machine_vector mv_apsh4a3a __initmv = {
  160. .mv_name = "AP-SH4A-3A",
  161. .mv_setup = apsh4a3a_setup,
  162. .mv_clk_init = apsh4a3a_clk_init,
  163. .mv_init_irq = apsh4a3a_init_irq,
  164. .mv_mode_pins = apsh4a3a_mode_pins,
  165. };