time.h 4.8 KB

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  1. /*
  2. * Common time prototypes and such for all ppc machines.
  3. *
  4. * Written by Cort Dougan (cort@cs.nmt.edu) to merge
  5. * Paul Mackerras' version and mine for PReP and Pmac.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #ifndef __POWERPC_TIME_H
  13. #define __POWERPC_TIME_H
  14. #ifdef __KERNEL__
  15. #include <linux/types.h>
  16. #include <linux/percpu.h>
  17. #include <asm/processor.h>
  18. #include <asm/cpu_has_feature.h>
  19. /* time.c */
  20. extern unsigned long tb_ticks_per_jiffy;
  21. extern unsigned long tb_ticks_per_usec;
  22. extern unsigned long tb_ticks_per_sec;
  23. extern struct clock_event_device decrementer_clockevent;
  24. struct rtc_time;
  25. extern void to_tm(int tim, struct rtc_time * tm);
  26. extern void tick_broadcast_ipi_handler(void);
  27. extern void generic_calibrate_decr(void);
  28. /* Some sane defaults: 125 MHz timebase, 1GHz processor */
  29. extern unsigned long ppc_proc_freq;
  30. #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
  31. extern unsigned long ppc_tb_freq;
  32. #define DEFAULT_TB_FREQ 125000000UL
  33. struct div_result {
  34. u64 result_high;
  35. u64 result_low;
  36. };
  37. /* Accessor functions for the timebase (RTC on 601) registers. */
  38. /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
  39. #ifdef CONFIG_6xx
  40. #define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
  41. #else
  42. #define __USE_RTC() 0
  43. #endif
  44. #ifdef CONFIG_PPC64
  45. /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
  46. #define get_tbl get_tb
  47. #else
  48. static inline unsigned long get_tbl(void)
  49. {
  50. #if defined(CONFIG_403GCX)
  51. unsigned long tbl;
  52. asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
  53. return tbl;
  54. #else
  55. return mftbl();
  56. #endif
  57. }
  58. static inline unsigned int get_tbu(void)
  59. {
  60. #ifdef CONFIG_403GCX
  61. unsigned int tbu;
  62. asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
  63. return tbu;
  64. #else
  65. return mftbu();
  66. #endif
  67. }
  68. #endif /* !CONFIG_PPC64 */
  69. static inline unsigned int get_rtcl(void)
  70. {
  71. unsigned int rtcl;
  72. asm volatile("mfrtcl %0" : "=r" (rtcl));
  73. return rtcl;
  74. }
  75. static inline u64 get_rtc(void)
  76. {
  77. unsigned int hi, lo, hi2;
  78. do {
  79. asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
  80. : "=r" (hi), "=r" (lo), "=r" (hi2));
  81. } while (hi2 != hi);
  82. return (u64)hi * 1000000000 + lo;
  83. }
  84. static inline u64 get_vtb(void)
  85. {
  86. #ifdef CONFIG_PPC_BOOK3S_64
  87. if (cpu_has_feature(CPU_FTR_ARCH_207S))
  88. return mfspr(SPRN_VTB);
  89. #endif
  90. return 0;
  91. }
  92. #ifdef CONFIG_PPC64
  93. static inline u64 get_tb(void)
  94. {
  95. return mftb();
  96. }
  97. #else /* CONFIG_PPC64 */
  98. static inline u64 get_tb(void)
  99. {
  100. unsigned int tbhi, tblo, tbhi2;
  101. do {
  102. tbhi = get_tbu();
  103. tblo = get_tbl();
  104. tbhi2 = get_tbu();
  105. } while (tbhi != tbhi2);
  106. return ((u64)tbhi << 32) | tblo;
  107. }
  108. #endif /* !CONFIG_PPC64 */
  109. static inline u64 get_tb_or_rtc(void)
  110. {
  111. return __USE_RTC() ? get_rtc() : get_tb();
  112. }
  113. static inline void set_tb(unsigned int upper, unsigned int lower)
  114. {
  115. mtspr(SPRN_TBWL, 0);
  116. mtspr(SPRN_TBWU, upper);
  117. mtspr(SPRN_TBWL, lower);
  118. }
  119. /* Accessor functions for the decrementer register.
  120. * The 4xx doesn't even have a decrementer. I tried to use the
  121. * generic timer interrupt code, which seems OK, with the 4xx PIT
  122. * in auto-reload mode. The problem is PIT stops counting when it
  123. * hits zero. If it would wrap, we could use it just like a decrementer.
  124. */
  125. static inline u64 get_dec(void)
  126. {
  127. #if defined(CONFIG_40x)
  128. return (mfspr(SPRN_PIT));
  129. #else
  130. return (mfspr(SPRN_DEC));
  131. #endif
  132. }
  133. /*
  134. * Note: Book E and 4xx processors differ from other PowerPC processors
  135. * in when the decrementer generates its interrupt: on the 1 to 0
  136. * transition for Book E/4xx, but on the 0 to -1 transition for others.
  137. */
  138. static inline void set_dec(u64 val)
  139. {
  140. #if defined(CONFIG_40x)
  141. mtspr(SPRN_PIT, (u32) val);
  142. #else
  143. #ifndef CONFIG_BOOKE
  144. --val;
  145. #endif
  146. mtspr(SPRN_DEC, val);
  147. #endif /* not 40x */
  148. }
  149. static inline unsigned long tb_ticks_since(unsigned long tstamp)
  150. {
  151. if (__USE_RTC()) {
  152. int delta = get_rtcl() - (unsigned int) tstamp;
  153. return delta < 0 ? delta + 1000000000 : delta;
  154. }
  155. return get_tbl() - tstamp;
  156. }
  157. #define mulhwu(x,y) \
  158. ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
  159. #ifdef CONFIG_PPC64
  160. #define mulhdu(x,y) \
  161. ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
  162. #else
  163. extern u64 mulhdu(u64, u64);
  164. #endif
  165. extern void div128_by_32(u64 dividend_high, u64 dividend_low,
  166. unsigned divisor, struct div_result *dr);
  167. /* Used to store Processor Utilization register (purr) values */
  168. struct cpu_usage {
  169. u64 current_tb; /* Holds the current purr register values */
  170. };
  171. DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
  172. extern void secondary_cpu_time_init(void);
  173. DECLARE_PER_CPU(u64, decrementers_next_tb);
  174. /* Convert timebase ticks to nanoseconds */
  175. unsigned long long tb_to_ns(unsigned long long tb_ticks);
  176. #endif /* __KERNEL__ */
  177. #endif /* __POWERPC_TIME_H */