dma-mapping.h 4.5 KB

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  1. /*
  2. * Copyright (C) 2004 IBM
  3. *
  4. * Implements the generic device dma API for powerpc.
  5. * the pci and vio busses
  6. */
  7. #ifndef _ASM_DMA_MAPPING_H
  8. #define _ASM_DMA_MAPPING_H
  9. #ifdef __KERNEL__
  10. #include <linux/types.h>
  11. #include <linux/cache.h>
  12. /* need struct page definitions */
  13. #include <linux/mm.h>
  14. #include <linux/scatterlist.h>
  15. #include <linux/dma-debug.h>
  16. #include <asm/io.h>
  17. #include <asm/swiotlb.h>
  18. #ifdef CONFIG_PPC64
  19. #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
  20. #endif
  21. /* Some dma direct funcs must be visible for use in other dma_ops */
  22. extern void *__dma_direct_alloc_coherent(struct device *dev, size_t size,
  23. dma_addr_t *dma_handle, gfp_t flag,
  24. unsigned long attrs);
  25. extern void __dma_direct_free_coherent(struct device *dev, size_t size,
  26. void *vaddr, dma_addr_t dma_handle,
  27. unsigned long attrs);
  28. extern int dma_direct_mmap_coherent(struct device *dev,
  29. struct vm_area_struct *vma,
  30. void *cpu_addr, dma_addr_t handle,
  31. size_t size, unsigned long attrs);
  32. #ifdef CONFIG_NOT_COHERENT_CACHE
  33. /*
  34. * DMA-consistent mapping functions for PowerPCs that don't support
  35. * cache snooping. These allocate/free a region of uncached mapped
  36. * memory space for use with DMA devices. Alternatively, you could
  37. * allocate the space "normally" and use the cache management functions
  38. * to ensure it is consistent.
  39. */
  40. struct device;
  41. extern void *__dma_alloc_coherent(struct device *dev, size_t size,
  42. dma_addr_t *handle, gfp_t gfp);
  43. extern void __dma_free_coherent(size_t size, void *vaddr);
  44. extern void __dma_sync(void *vaddr, size_t size, int direction);
  45. extern void __dma_sync_page(struct page *page, unsigned long offset,
  46. size_t size, int direction);
  47. extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
  48. #else /* ! CONFIG_NOT_COHERENT_CACHE */
  49. /*
  50. * Cache coherent cores.
  51. */
  52. #define __dma_alloc_coherent(dev, gfp, size, handle) NULL
  53. #define __dma_free_coherent(size, addr) ((void)0)
  54. #define __dma_sync(addr, size, rw) ((void)0)
  55. #define __dma_sync_page(pg, off, sz, rw) ((void)0)
  56. #endif /* ! CONFIG_NOT_COHERENT_CACHE */
  57. static inline unsigned long device_to_mask(struct device *dev)
  58. {
  59. if (dev->dma_mask && *dev->dma_mask)
  60. return *dev->dma_mask;
  61. /* Assume devices without mask can take 32 bit addresses */
  62. return 0xfffffffful;
  63. }
  64. /*
  65. * Available generic sets of operations
  66. */
  67. #ifdef CONFIG_PPC64
  68. extern struct dma_map_ops dma_iommu_ops;
  69. #endif
  70. extern struct dma_map_ops dma_direct_ops;
  71. static inline struct dma_map_ops *get_dma_ops(struct device *dev)
  72. {
  73. /* We don't handle the NULL dev case for ISA for now. We could
  74. * do it via an out of line call but it is not needed for now. The
  75. * only ISA DMA device we support is the floppy and we have a hack
  76. * in the floppy driver directly to get a device for us.
  77. */
  78. if (unlikely(dev == NULL))
  79. return NULL;
  80. return dev->archdata.dma_ops;
  81. }
  82. static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
  83. {
  84. dev->archdata.dma_ops = ops;
  85. }
  86. /*
  87. * get_dma_offset()
  88. *
  89. * Get the dma offset on configurations where the dma address can be determined
  90. * from the physical address by looking at a simple offset. Direct dma and
  91. * swiotlb use this function, but it is typically not used by implementations
  92. * with an iommu.
  93. */
  94. static inline dma_addr_t get_dma_offset(struct device *dev)
  95. {
  96. if (dev)
  97. return dev->archdata.dma_offset;
  98. return PCI_DRAM_OFFSET;
  99. }
  100. static inline void set_dma_offset(struct device *dev, dma_addr_t off)
  101. {
  102. if (dev)
  103. dev->archdata.dma_offset = off;
  104. }
  105. /* this will be removed soon */
  106. #define flush_write_buffers()
  107. #define HAVE_ARCH_DMA_SET_MASK 1
  108. extern int dma_set_mask(struct device *dev, u64 dma_mask);
  109. extern int __dma_set_mask(struct device *dev, u64 dma_mask);
  110. extern u64 __dma_get_required_mask(struct device *dev);
  111. static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
  112. {
  113. #ifdef CONFIG_SWIOTLB
  114. struct dev_archdata *sd = &dev->archdata;
  115. if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
  116. return false;
  117. #endif
  118. if (!dev->dma_mask)
  119. return false;
  120. return addr + size - 1 <= *dev->dma_mask;
  121. }
  122. static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
  123. {
  124. return paddr + get_dma_offset(dev);
  125. }
  126. static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
  127. {
  128. return daddr - get_dma_offset(dev);
  129. }
  130. #define ARCH_HAS_DMA_MMAP_COHERENT
  131. static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  132. enum dma_data_direction direction)
  133. {
  134. BUG_ON(direction == DMA_NONE);
  135. __dma_sync(vaddr, size, (int)direction);
  136. }
  137. #endif /* __KERNEL__ */
  138. #endif /* _ASM_DMA_MAPPING_H */