storcenter.dts 3.1 KB

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  1. /*
  2. * Device Tree Source for IOMEGA StorCenter
  3. *
  4. * Copyright 2007 Oyvind Repvik
  5. * Copyright 2007 Jon Loeliger
  6. *
  7. * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. /dts-v1/;
  14. / {
  15. model = "StorCenter";
  16. compatible = "iomega,storcenter";
  17. #address-cells = <1>;
  18. #size-cells = <1>;
  19. aliases {
  20. serial0 = &serial0;
  21. serial1 = &serial1;
  22. pci0 = &pci0;
  23. };
  24. cpus {
  25. #address-cells = <1>;
  26. #size-cells = <0>;
  27. PowerPC,8241@0 {
  28. device_type = "cpu";
  29. reg = <0>;
  30. clock-frequency = <200000000>;
  31. timebase-frequency = <25000000>;
  32. bus-frequency = <0>; /* from bootwrapper */
  33. i-cache-line-size = <32>;
  34. d-cache-line-size = <32>;
  35. i-cache-size = <16384>;
  36. d-cache-size = <16384>;
  37. };
  38. };
  39. memory {
  40. device_type = "memory";
  41. reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */
  42. };
  43. soc@fc000000 {
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. device_type = "soc";
  47. compatible = "fsl,mpc8241", "mpc10x";
  48. store-gathering = <0>; /* 0 == off, !0 == on */
  49. ranges = <0x0 0xfc000000 0x100000>;
  50. reg = <0xfc000000 0x100000>; /* EUMB */
  51. bus-frequency = <0>; /* fixed by loader */
  52. i2c@3000 {
  53. #address-cells = <1>;
  54. #size-cells = <0>;
  55. compatible = "fsl-i2c";
  56. reg = <0x3000 0x100>;
  57. interrupts = <17 2>;
  58. interrupt-parent = <&mpic>;
  59. rtc@68 {
  60. compatible = "dallas,ds1337";
  61. reg = <0x68>;
  62. };
  63. };
  64. serial0: serial@4500 {
  65. cell-index = <0>;
  66. device_type = "serial";
  67. compatible = "fsl,ns16550", "ns16550";
  68. reg = <0x4500 0x20>;
  69. clock-frequency = <97553800>; /* Hz */
  70. current-speed = <115200>;
  71. interrupts = <25 2>;
  72. interrupt-parent = <&mpic>;
  73. };
  74. serial1: serial@4600 {
  75. cell-index = <1>;
  76. device_type = "serial";
  77. compatible = "fsl,ns16550", "ns16550";
  78. reg = <0x4600 0x20>;
  79. clock-frequency = <97553800>; /* Hz */
  80. current-speed = <9600>;
  81. interrupts = <26 2>;
  82. interrupt-parent = <&mpic>;
  83. };
  84. mpic: interrupt-controller@40000 {
  85. #interrupt-cells = <2>;
  86. #address-cells = <0>;
  87. device_type = "open-pic";
  88. compatible = "chrp,open-pic";
  89. interrupt-controller;
  90. reg = <0x40000 0x40000>;
  91. };
  92. };
  93. pci0: pci@fe800000 {
  94. #address-cells = <3>;
  95. #size-cells = <2>;
  96. #interrupt-cells = <1>;
  97. device_type = "pci";
  98. compatible = "mpc10x-pci";
  99. reg = <0xfe800000 0x1000>;
  100. ranges = <0x01000000 0x0 0x0 0xfe000000 0x0 0x00c00000
  101. 0x02000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
  102. bus-range = <0 0xff>;
  103. clock-frequency = <97553800>;
  104. interrupt-parent = <&mpic>;
  105. interrupt-map-mask = <0xf800 0 0 7>;
  106. interrupt-map = <
  107. /* IDSEL 13 - IDE */
  108. 0x6800 0 0 1 &mpic 0 1
  109. 0x6800 0 0 2 &mpic 0 1
  110. 0x6800 0 0 3 &mpic 0 1
  111. 0x6800 0 0 4 &mpic 0 1
  112. /* IDSEL 14 - USB */
  113. 0x7000 0 0 1 &mpic 0 1
  114. 0x7000 0 0 2 &mpic 0 1
  115. 0x7000 0 0 3 &mpic 0 1
  116. 0x7000 0 0 4 &mpic 0 1
  117. /* IDSEL 15 - ETH */
  118. 0x7800 0 0 1 &mpic 0 1
  119. 0x7800 0 0 2 &mpic 0 1
  120. 0x7800 0 0 3 &mpic 0 1
  121. 0x7800 0 0 4 &mpic 0 1
  122. >;
  123. };
  124. chosen {
  125. linux,stdout-path = &serial0;
  126. };
  127. };