sbc8548.dts 2.4 KB

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  1. /*
  2. * SBC8548 Device Tree Source
  3. *
  4. * Copyright 2007 Wind River Systems Inc.
  5. *
  6. * Paul Gortmaker (see MAINTAINERS for contact information)
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. /dts-v1/;
  14. /include/ "sbc8548-pre.dtsi"
  15. /{
  16. localbus@e0000000 {
  17. #address-cells = <2>;
  18. #size-cells = <1>;
  19. compatible = "simple-bus";
  20. reg = <0xe0000000 0x5000>;
  21. interrupt-parent = <&mpic>;
  22. ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/
  23. 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
  24. 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
  25. 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
  26. 0x6 0x0 0xec000000 0x04000000>; /*64MB Flash*/
  27. flash@0,0 {
  28. #address-cells = <1>;
  29. #size-cells = <1>;
  30. compatible = "intel,JS28F640", "cfi-flash";
  31. reg = <0x0 0x0 0x800000>;
  32. bank-width = <1>;
  33. device-width = <1>;
  34. partition@0x0 {
  35. label = "space";
  36. /* FF800000 -> FFF9FFFF */
  37. reg = <0x00000000 0x007a0000>;
  38. };
  39. partition@0x7a0000 {
  40. label = "bootloader";
  41. /* FFFA0000 -> FFFFFFFF */
  42. reg = <0x007a0000 0x00060000>;
  43. read-only;
  44. };
  45. };
  46. epld@5,0 {
  47. compatible = "wrs,epld-localbus";
  48. #address-cells = <2>;
  49. #size-cells = <1>;
  50. reg = <0x5 0x0 0x00b10000>;
  51. ranges = <
  52. 0x0 0x0 0x5 0x000000 0x1fff /* LED */
  53. 0x1 0x0 0x5 0x100000 0x1fff /* Switches */
  54. 0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */
  55. 0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */
  56. >;
  57. led@0,0 {
  58. compatible = "led";
  59. reg = <0x0 0x0 0x1fff>;
  60. };
  61. switches@1,0 {
  62. compatible = "switches";
  63. reg = <0x1 0x0 0x1fff>;
  64. };
  65. hw-rev@3,0 {
  66. compatible = "hw-rev";
  67. reg = <0x3 0x0 0x1fff>;
  68. };
  69. eeprom@b,0 {
  70. compatible = "eeprom";
  71. reg = <0xb 0 0x1fff>;
  72. };
  73. };
  74. alt-flash@6,0 {
  75. #address-cells = <1>;
  76. #size-cells = <1>;
  77. reg = <0x6 0x0 0x04000000>;
  78. compatible = "intel,JS28F128", "cfi-flash";
  79. bank-width = <4>;
  80. device-width = <1>;
  81. partition@0x0 {
  82. label = "space";
  83. /* EC000000 -> EFEFFFFF */
  84. reg = <0x00000000 0x03f00000>;
  85. };
  86. partition@0x03f00000 {
  87. label = "bootloader";
  88. /* EFF00000 -> EFFFFFFF */
  89. reg = <0x03f00000 0x00100000>;
  90. read-only;
  91. };
  92. };
  93. };
  94. };
  95. /include/ "sbc8548-post.dtsi"