sam440ep.dts 7.2 KB

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  1. /*
  2. * Device Tree Source for ACube Sam440ep based off bamboo.dts code
  3. * original copyrights below
  4. *
  5. * Copyright (c) 2006, 2007 IBM Corp.
  6. * Josh Boyer <jwboyer@linux.vnet.ibm.com>
  7. *
  8. * Modified from bamboo.dts for sam440ep:
  9. * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
  10. *
  11. * This file is licensed under the terms of the GNU General Public
  12. * License version 2. This program is licensed "as is" without
  13. * any warranty of any kind, whether express or implied.
  14. */
  15. /dts-v1/;
  16. / {
  17. #address-cells = <2>;
  18. #size-cells = <1>;
  19. model = "acube,sam440ep";
  20. compatible = "acube,sam440ep";
  21. aliases {
  22. ethernet0 = &EMAC0;
  23. ethernet1 = &EMAC1;
  24. serial0 = &UART0;
  25. serial1 = &UART1;
  26. serial2 = &UART2;
  27. serial3 = &UART3;
  28. };
  29. cpus {
  30. #address-cells = <1>;
  31. #size-cells = <0>;
  32. cpu@0 {
  33. device_type = "cpu";
  34. model = "PowerPC,440EP";
  35. reg = <0>;
  36. clock-frequency = <0>; /* Filled in by zImage */
  37. timebase-frequency = <0>; /* Filled in by zImage */
  38. i-cache-line-size = <32>;
  39. d-cache-line-size = <32>;
  40. i-cache-size = <32768>;
  41. d-cache-size = <32768>;
  42. dcr-controller;
  43. dcr-access-method = "native";
  44. };
  45. };
  46. memory {
  47. device_type = "memory";
  48. reg = <0 0 0>; /* Filled in by zImage */
  49. };
  50. UIC0: interrupt-controller0 {
  51. compatible = "ibm,uic-440ep","ibm,uic";
  52. interrupt-controller;
  53. cell-index = <0>;
  54. dcr-reg = <0x0c0 9>;
  55. #address-cells = <0>;
  56. #size-cells = <0>;
  57. #interrupt-cells = <2>;
  58. };
  59. UIC1: interrupt-controller1 {
  60. compatible = "ibm,uic-440ep","ibm,uic";
  61. interrupt-controller;
  62. cell-index = <1>;
  63. dcr-reg = <0x0d0 9>;
  64. #address-cells = <0>;
  65. #size-cells = <0>;
  66. #interrupt-cells = <2>;
  67. interrupts = <0x1e 4 0x1f 4>; /* cascade */
  68. interrupt-parent = <&UIC0>;
  69. };
  70. SDR0: sdr {
  71. compatible = "ibm,sdr-440ep";
  72. dcr-reg = <0x00e 2>;
  73. };
  74. CPR0: cpr {
  75. compatible = "ibm,cpr-440ep";
  76. dcr-reg = <0x00c 2>;
  77. };
  78. plb {
  79. compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
  80. #address-cells = <2>;
  81. #size-cells = <1>;
  82. ranges;
  83. clock-frequency = <0>; /* Filled in by zImage */
  84. SDRAM0: sdram {
  85. compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
  86. dcr-reg = <0x010 2>;
  87. };
  88. DMA0: dma {
  89. compatible = "ibm,dma-440ep", "ibm,dma-440gp";
  90. dcr-reg = <0x100 0x027>;
  91. };
  92. MAL0: mcmal {
  93. compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
  94. dcr-reg = <0x180 0x062>;
  95. num-tx-chans = <4>;
  96. num-rx-chans = <2>;
  97. interrupt-parent = <&MAL0>;
  98. interrupts = <0 1 2 3 4>;
  99. #interrupt-cells = <1>;
  100. #address-cells = <0>;
  101. #size-cells = <0>;
  102. interrupt-map = </*TXEOB*/ 0 &UIC0 10 4
  103. /*RXEOB*/ 1 &UIC0 11 4
  104. /*SERR*/ 2 &UIC1 0 4
  105. /*TXDE*/ 3 &UIC1 1 4
  106. /*RXDE*/ 4 &UIC1 2 4>;
  107. };
  108. POB0: opb {
  109. compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
  110. #address-cells = <1>;
  111. #size-cells = <1>;
  112. /* Bamboo is oddball in the 44x world and doesn't use the ERPN
  113. * bits.
  114. */
  115. ranges = <0x00000000 0 0x00000000 0x80000000
  116. 0x80000000 0 0x80000000 0x80000000>;
  117. interrupt-parent = <&UIC1>;
  118. interrupts = <7 4>;
  119. clock-frequency = <0>; /* Filled in by zImage */
  120. EBC0: ebc {
  121. compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
  122. dcr-reg = <0x012 2>;
  123. #address-cells = <2>;
  124. #size-cells = <1>;
  125. clock-frequency = <0>; /* Filled in by zImage */
  126. interrupts = <5 1>;
  127. interrupt-parent = <&UIC1>;
  128. };
  129. UART0: serial@ef600300 {
  130. device_type = "serial";
  131. compatible = "ns16550";
  132. reg = <0xef600300 8>;
  133. virtual-reg = <0xef600300>;
  134. clock-frequency = <0>; /* Filled in by zImage */
  135. current-speed = <0x1c200>;
  136. interrupt-parent = <&UIC0>;
  137. interrupts = <0 4>;
  138. };
  139. UART1: serial@ef600400 {
  140. device_type = "serial";
  141. compatible = "ns16550";
  142. reg = <0xef600400 8>;
  143. virtual-reg = <0xef600400>;
  144. clock-frequency = <0>;
  145. current-speed = <0>;
  146. interrupt-parent = <&UIC0>;
  147. interrupts = <1 4>;
  148. };
  149. UART2: serial@ef600500 {
  150. device_type = "serial";
  151. compatible = "ns16550";
  152. reg = <0xef600500 8>;
  153. virtual-reg = <0xef600500>;
  154. clock-frequency = <0>;
  155. current-speed = <0>;
  156. interrupt-parent = <&UIC0>;
  157. interrupts = <3 4>;
  158. };
  159. UART3: serial@ef600600 {
  160. device_type = "serial";
  161. compatible = "ns16550";
  162. reg = <0xef600600 8>;
  163. virtual-reg = <0xef600600>;
  164. clock-frequency = <0>;
  165. current-speed = <0>;
  166. interrupt-parent = <&UIC0>;
  167. interrupts = <4 4>;
  168. };
  169. IIC0: i2c@ef600700 {
  170. #address-cells = <1>;
  171. #size-cells = <0>;
  172. compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
  173. index = <0>;
  174. reg = <0xef600700 0x14>;
  175. interrupt-parent = <&UIC0>;
  176. interrupts = <2 4>;
  177. rtc@68 {
  178. compatible = "st,m41t80";
  179. reg = <0x68>;
  180. };
  181. };
  182. IIC1: i2c@ef600800 {
  183. compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
  184. index = <5>;
  185. reg = <0xef600800 0x14>;
  186. interrupt-parent = <&UIC0>;
  187. interrupts = <7 4>;
  188. };
  189. ZMII0: emac-zmii@ef600d00 {
  190. compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
  191. reg = <0xef600d00 0xc>;
  192. };
  193. EMAC0: ethernet@ef600e00 {
  194. linux,network-index = <0>;
  195. device_type = "network";
  196. compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
  197. interrupt-parent = <&UIC1>;
  198. interrupts = <0x1c 4 0x1d 4>;
  199. reg = <0xef600e00 0x70>;
  200. local-mac-address = [000000000000];
  201. mal-device = <&MAL0>;
  202. mal-tx-channel = <0 1>;
  203. mal-rx-channel = <0>;
  204. cell-index = <0>;
  205. max-frame-size = <0x5dc>;
  206. rx-fifo-size = <0x1000>;
  207. tx-fifo-size = <0x800>;
  208. phy-mode = "rmii";
  209. phy-map = <00000000>;
  210. zmii-device = <&ZMII0>;
  211. zmii-channel = <0>;
  212. };
  213. EMAC1: ethernet@ef600f00 {
  214. linux,network-index = <1>;
  215. device_type = "network";
  216. compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
  217. interrupt-parent = <&UIC1>;
  218. interrupts = <0x1e 4 0x1f 4>;
  219. reg = <0xef600f00 0x70>;
  220. local-mac-address = [000000000000];
  221. mal-device = <&MAL0>;
  222. mal-tx-channel = <2 3>;
  223. mal-rx-channel = <1>;
  224. cell-index = <1>;
  225. max-frame-size = <0x5dc>;
  226. rx-fifo-size = <0x1000>;
  227. tx-fifo-size = <0x800>;
  228. phy-mode = "rmii";
  229. phy-map = <00000000>;
  230. zmii-device = <&ZMII0>;
  231. zmii-channel = <1>;
  232. };
  233. usb@ef601000 {
  234. compatible = "ohci-be";
  235. reg = <0xef601000 0x80>;
  236. interrupts = <8 4 9 4>;
  237. interrupt-parent = <&UIC1>;
  238. };
  239. };
  240. PCI0: pci@ec000000 {
  241. device_type = "pci";
  242. #interrupt-cells = <1>;
  243. #size-cells = <2>;
  244. #address-cells = <3>;
  245. compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
  246. primary;
  247. reg = <0 0xeec00000 8 /* Config space access */
  248. 0 0xeed00000 4 /* IACK */
  249. 0 0xeed00000 4 /* Special cycle */
  250. 0 0xef400000 0x40>; /* Internal registers */
  251. /* Outbound ranges, one memory and one IO,
  252. * later cannot be changed. Chip supports a second
  253. * IO range but we don't use it for now
  254. */
  255. ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
  256. 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>;
  257. /* Inbound 2GB range starting at 0 */
  258. dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>;
  259. };
  260. };
  261. chosen {
  262. linux,stdout-path = "/plb/opb/serial@ef600300";
  263. };
  264. };