mucmc52.dts 4.8 KB

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  1. /*
  2. * Manroland mucmc52 board Device Tree Source
  3. *
  4. * Copyright (C) 2009 DENX Software Engineering GmbH
  5. * Heiko Schocher <hs@denx.de>
  6. * Copyright 2006-2007 Secret Lab Technologies Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. /include/ "mpc5200b.dtsi"
  14. /* Timer pins that need to be in GPIO mode */
  15. &gpt0 { gpio-controller; };
  16. &gpt1 { gpio-controller; };
  17. &gpt2 { gpio-controller; };
  18. &gpt3 { gpio-controller; };
  19. /* Disabled timers */
  20. &gpt4 { status = "disabled"; };
  21. &gpt5 { status = "disabled"; };
  22. &gpt6 { status = "disabled"; };
  23. &gpt7 { status = "disabled"; };
  24. / {
  25. model = "manroland,mucmc52";
  26. compatible = "manroland,mucmc52";
  27. soc5200@f0000000 {
  28. rtc@800 {
  29. status = "disabled";
  30. };
  31. can@900 {
  32. status = "disabled";
  33. };
  34. can@980 {
  35. status = "disabled";
  36. };
  37. spi@f00 {
  38. status = "disabled";
  39. };
  40. usb@1000 {
  41. status = "disabled";
  42. };
  43. psc@2000 { // PSC1
  44. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  45. };
  46. psc@2200 { // PSC2
  47. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  48. };
  49. psc@2400 { // PSC3
  50. status = "disabled";
  51. };
  52. psc@2600 { // PSC4
  53. status = "disabled";
  54. };
  55. psc@2800 { // PSC5
  56. status = "disabled";
  57. };
  58. psc@2c00 { // PSC6
  59. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  60. };
  61. ethernet@3000 {
  62. phy-handle = <&phy0>;
  63. };
  64. mdio@3000 {
  65. phy0: ethernet-phy@0 {
  66. compatible = "intel,lxt971";
  67. reg = <0>;
  68. };
  69. };
  70. i2c@3d00 {
  71. status = "disabled";
  72. };
  73. i2c@3d40 {
  74. hwmon@2c {
  75. compatible = "ad,adm9240";
  76. reg = <0x2c>;
  77. };
  78. rtc@51 {
  79. compatible = "nxp,pcf8563";
  80. reg = <0x51>;
  81. };
  82. };
  83. };
  84. pci@f0000d00 {
  85. interrupt-map-mask = <0xf800 0 0 7>;
  86. interrupt-map = <
  87. /* IDSEL 0x10 */
  88. 0x8000 0 0 1 &mpc5200_pic 0 3 3
  89. 0x8000 0 0 2 &mpc5200_pic 0 3 3
  90. 0x8000 0 0 3 &mpc5200_pic 0 2 3
  91. 0x8000 0 0 4 &mpc5200_pic 0 1 3
  92. >;
  93. ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000
  94. 0x02000000 0 0x90000000 0x90000000 0 0x10000000
  95. 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
  96. };
  97. localbus {
  98. ranges = <0 0 0xff800000 0x00800000
  99. 1 0 0x80000000 0x00800000
  100. 3 0 0x80000000 0x00800000>;
  101. flash@0,0 {
  102. compatible = "cfi-flash";
  103. reg = <0 0 0x00800000>;
  104. bank-width = <4>;
  105. device-width = <2>;
  106. #size-cells = <1>;
  107. #address-cells = <1>;
  108. partition@0 {
  109. label = "DTS";
  110. reg = <0x0 0x00100000>;
  111. };
  112. partition@100000 {
  113. label = "Kernel";
  114. reg = <0x100000 0x00200000>;
  115. };
  116. partition@300000 {
  117. label = "RootFS";
  118. reg = <0x00300000 0x00200000>;
  119. };
  120. partition@500000 {
  121. label = "user";
  122. reg = <0x00500000 0x00200000>;
  123. };
  124. partition@700000 {
  125. label = "U-Boot";
  126. reg = <0x00700000 0x00040000>;
  127. };
  128. partition@740000 {
  129. label = "Env";
  130. reg = <0x00740000 0x00020000>;
  131. };
  132. partition@760000 {
  133. label = "red. Env";
  134. reg = <0x00760000 0x00020000>;
  135. };
  136. partition@780000 {
  137. label = "reserve";
  138. reg = <0x00780000 0x00080000>;
  139. };
  140. };
  141. simple100: gpio-controller-100@3,600100 {
  142. compatible = "manroland,mucmc52-aux-gpio";
  143. reg = <3 0x00600100 0x1>;
  144. gpio-controller;
  145. #gpio-cells = <2>;
  146. };
  147. simple104: gpio-controller-104@3,600104 {
  148. compatible = "manroland,mucmc52-aux-gpio";
  149. reg = <3 0x00600104 0x1>;
  150. gpio-controller;
  151. #gpio-cells = <2>;
  152. };
  153. simple200: gpio-controller-200@3,600200 {
  154. compatible = "manroland,mucmc52-aux-gpio";
  155. reg = <3 0x00600200 0x1>;
  156. gpio-controller;
  157. #gpio-cells = <2>;
  158. };
  159. simple201: gpio-controller-201@3,600201 {
  160. compatible = "manroland,mucmc52-aux-gpio";
  161. reg = <3 0x00600201 0x1>;
  162. gpio-controller;
  163. #gpio-cells = <2>;
  164. };
  165. simple202: gpio-controller-202@3,600202 {
  166. compatible = "manroland,mucmc52-aux-gpio";
  167. reg = <3 0x00600202 0x1>;
  168. gpio-controller;
  169. #gpio-cells = <2>;
  170. };
  171. simple203: gpio-controller-203@3,600203 {
  172. compatible = "manroland,mucmc52-aux-gpio";
  173. reg = <3 0x00600203 0x1>;
  174. gpio-controller;
  175. #gpio-cells = <2>;
  176. };
  177. simple204: gpio-controller-204@3,600204 {
  178. compatible = "manroland,mucmc52-aux-gpio";
  179. reg = <3 0x00600204 0x1>;
  180. gpio-controller;
  181. #gpio-cells = <2>;
  182. };
  183. simple206: gpio-controller-206@3,600206 {
  184. compatible = "manroland,mucmc52-aux-gpio";
  185. reg = <3 0x00600206 0x1>;
  186. gpio-controller;
  187. #gpio-cells = <2>;
  188. };
  189. simple207: gpio-controller-207@3,600207 {
  190. compatible = "manroland,mucmc52-aux-gpio";
  191. reg = <3 0x00600207 0x1>;
  192. gpio-controller;
  193. #gpio-cells = <2>;
  194. };
  195. simple20f: gpio-controller-20f@3,60020f {
  196. compatible = "manroland,mucmc52-aux-gpio";
  197. reg = <3 0x0060020f 0x1>;
  198. gpio-controller;
  199. #gpio-cells = <2>;
  200. };
  201. };
  202. };