ksi8560.dts 7.6 KB

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  1. /*
  2. * Device Tree Source for Emerson KSI8560
  3. *
  4. * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
  5. *
  6. * Based on mpc8560ads.dts
  7. *
  8. * 2008 (c) MontaVista, Software, Inc. This file is licensed under
  9. * the terms of the GNU General Public License version 2. This program
  10. * is licensed "as is" without any warranty of any kind, whether express
  11. * or implied.
  12. *
  13. */
  14. /dts-v1/;
  15. / {
  16. model = "KSI8560";
  17. compatible = "emerson,KSI8560";
  18. #address-cells = <1>;
  19. #size-cells = <1>;
  20. aliases {
  21. ethernet0 = &enet0;
  22. ethernet1 = &enet1;
  23. ethernet2 = &enet2;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. PowerPC,8560@0 {
  29. device_type = "cpu";
  30. reg = <0>;
  31. d-cache-line-size = <32>;
  32. i-cache-line-size = <32>;
  33. d-cache-size = <0x8000>; /* L1, 32K */
  34. i-cache-size = <0x8000>; /* L1, 32K */
  35. timebase-frequency = <0>; /* From U-boot */
  36. bus-frequency = <0>; /* From U-boot */
  37. clock-frequency = <0>; /* From U-boot */
  38. next-level-cache = <&L2>;
  39. };
  40. };
  41. memory {
  42. device_type = "memory";
  43. reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
  44. };
  45. soc@fdf00000 {
  46. #address-cells = <1>;
  47. #size-cells = <1>;
  48. device_type = "soc";
  49. ranges = <0x00000000 0xfdf00000 0x00100000>;
  50. bus-frequency = <0>; /* Fixed by bootwrapper */
  51. ecm-law@0 {
  52. compatible = "fsl,ecm-law";
  53. reg = <0x0 0x1000>;
  54. fsl,num-laws = <8>;
  55. };
  56. ecm@1000 {
  57. compatible = "fsl,mpc8560-ecm", "fsl,ecm";
  58. reg = <0x1000 0x1000>;
  59. interrupts = <17 2>;
  60. interrupt-parent = <&mpic>;
  61. };
  62. memory-controller@2000 {
  63. compatible = "fsl,mpc8540-memory-controller";
  64. reg = <0x2000 0x1000>;
  65. interrupt-parent = <&mpic>;
  66. interrupts = <0x12 0x2>;
  67. };
  68. L2: l2-cache-controller@20000 {
  69. compatible = "fsl,mpc8540-l2-cache-controller";
  70. reg = <0x20000 0x1000>;
  71. cache-line-size = <0x20>; /* 32 bytes */
  72. cache-size = <0x40000>; /* L2, 256K */
  73. interrupt-parent = <&mpic>;
  74. interrupts = <0x10 0x2>;
  75. };
  76. i2c@3000 {
  77. #address-cells = <1>;
  78. #size-cells = <0>;
  79. cell-index = <0>;
  80. compatible = "fsl-i2c";
  81. reg = <0x3000 0x100>;
  82. interrupts = <0x2b 0x2>;
  83. interrupt-parent = <&mpic>;
  84. dfsrr;
  85. };
  86. dma@21300 {
  87. #address-cells = <1>;
  88. #size-cells = <1>;
  89. compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
  90. reg = <0x21300 0x4>;
  91. ranges = <0x0 0x21100 0x200>;
  92. cell-index = <0>;
  93. dma-channel@0 {
  94. compatible = "fsl,mpc8560-dma-channel",
  95. "fsl,eloplus-dma-channel";
  96. reg = <0x0 0x80>;
  97. cell-index = <0>;
  98. interrupt-parent = <&mpic>;
  99. interrupts = <20 2>;
  100. };
  101. dma-channel@80 {
  102. compatible = "fsl,mpc8560-dma-channel",
  103. "fsl,eloplus-dma-channel";
  104. reg = <0x80 0x80>;
  105. cell-index = <1>;
  106. interrupt-parent = <&mpic>;
  107. interrupts = <21 2>;
  108. };
  109. dma-channel@100 {
  110. compatible = "fsl,mpc8560-dma-channel",
  111. "fsl,eloplus-dma-channel";
  112. reg = <0x100 0x80>;
  113. cell-index = <2>;
  114. interrupt-parent = <&mpic>;
  115. interrupts = <22 2>;
  116. };
  117. dma-channel@180 {
  118. compatible = "fsl,mpc8560-dma-channel",
  119. "fsl,eloplus-dma-channel";
  120. reg = <0x180 0x80>;
  121. cell-index = <3>;
  122. interrupt-parent = <&mpic>;
  123. interrupts = <23 2>;
  124. };
  125. };
  126. enet0: ethernet@24000 {
  127. #address-cells = <1>;
  128. #size-cells = <1>;
  129. device_type = "network";
  130. model = "TSEC";
  131. compatible = "gianfar";
  132. reg = <0x24000 0x1000>;
  133. ranges = <0x0 0x24000 0x1000>;
  134. /* Mac address filled in by bootwrapper */
  135. local-mac-address = [ 00 00 00 00 00 00 ];
  136. interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
  137. interrupt-parent = <&mpic>;
  138. tbi-handle = <&tbi0>;
  139. phy-handle = <&PHY1>;
  140. mdio@520 { /* For TSECs */
  141. #address-cells = <1>;
  142. #size-cells = <0>;
  143. compatible = "fsl,gianfar-mdio";
  144. reg = <0x520 0x20>;
  145. PHY1: ethernet-phy@1 {
  146. interrupt-parent = <&mpic>;
  147. reg = <0x1>;
  148. };
  149. PHY2: ethernet-phy@2 {
  150. interrupt-parent = <&mpic>;
  151. reg = <0x2>;
  152. };
  153. tbi0: tbi-phy@11 {
  154. reg = <0x11>;
  155. device_type = "tbi-phy";
  156. };
  157. };
  158. };
  159. enet1: ethernet@25000 {
  160. #address-cells = <1>;
  161. #size-cells = <1>;
  162. device_type = "network";
  163. model = "TSEC";
  164. compatible = "gianfar";
  165. reg = <0x25000 0x1000>;
  166. ranges = <0x0 0x25000 0x1000>;
  167. /* Mac address filled in by bootwrapper */
  168. local-mac-address = [ 00 00 00 00 00 00 ];
  169. interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
  170. interrupt-parent = <&mpic>;
  171. tbi-handle = <&tbi1>;
  172. phy-handle = <&PHY2>;
  173. mdio@520 {
  174. #address-cells = <1>;
  175. #size-cells = <0>;
  176. compatible = "fsl,gianfar-tbi";
  177. reg = <0x520 0x20>;
  178. tbi1: tbi-phy@11 {
  179. reg = <0x11>;
  180. device_type = "tbi-phy";
  181. };
  182. };
  183. };
  184. mpic: pic@40000 {
  185. #address-cells = <0>;
  186. #interrupt-cells = <2>;
  187. interrupt-controller;
  188. reg = <0x40000 0x40000>;
  189. device_type = "open-pic";
  190. };
  191. cpm@919c0 {
  192. #address-cells = <1>;
  193. #size-cells = <1>;
  194. compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
  195. reg = <0x919c0 0x30>;
  196. ranges;
  197. muram@80000 {
  198. #address-cells = <1>;
  199. #size-cells = <1>;
  200. ranges = <0x0 0x80000 0x10000>;
  201. data@0 {
  202. compatible = "fsl,cpm-muram-data";
  203. reg = <0x0 0x4000 0x9000 0x2000>;
  204. };
  205. };
  206. brg@919f0 {
  207. compatible = "fsl,mpc8560-brg",
  208. "fsl,cpm2-brg",
  209. "fsl,cpm-brg";
  210. reg = <0x919f0 0x10 0x915f0 0x10>;
  211. clock-frequency = <165000000>; /* 166MHz */
  212. };
  213. CPMPIC: pic@90c00 {
  214. #address-cells = <0>;
  215. #interrupt-cells = <2>;
  216. interrupt-controller;
  217. interrupts = <0x2e 0x2>;
  218. interrupt-parent = <&mpic>;
  219. reg = <0x90c00 0x80>;
  220. compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
  221. };
  222. serial@91a00 {
  223. device_type = "serial";
  224. compatible = "fsl,mpc8560-scc-uart",
  225. "fsl,cpm2-scc-uart";
  226. reg = <0x91a00 0x20 0x88000 0x100>;
  227. fsl,cpm-brg = <1>;
  228. fsl,cpm-command = <0x800000>;
  229. current-speed = <0x1c200>;
  230. interrupts = <0x28 0x8>;
  231. interrupt-parent = <&CPMPIC>;
  232. };
  233. serial@91a20 {
  234. device_type = "serial";
  235. compatible = "fsl,mpc8560-scc-uart",
  236. "fsl,cpm2-scc-uart";
  237. reg = <0x91a20 0x20 0x88100 0x100>;
  238. fsl,cpm-brg = <2>;
  239. fsl,cpm-command = <0x4a00000>;
  240. current-speed = <0x1c200>;
  241. interrupts = <0x29 0x8>;
  242. interrupt-parent = <&CPMPIC>;
  243. };
  244. mdio@90d00 { /* For FCCs */
  245. #address-cells = <1>;
  246. #size-cells = <0>;
  247. compatible = "fsl,cpm2-mdio-bitbang";
  248. reg = <0x90d00 0x14>;
  249. fsl,mdio-pin = <24>;
  250. fsl,mdc-pin = <25>;
  251. PHY0: ethernet-phy@0 {
  252. interrupt-parent = <&mpic>;
  253. reg = <0x0>;
  254. };
  255. };
  256. enet2: ethernet@91300 {
  257. device_type = "network";
  258. compatible = "fsl,mpc8560-fcc-enet",
  259. "fsl,cpm2-fcc-enet";
  260. reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
  261. /* Mac address filled in by bootwrapper */
  262. local-mac-address = [ 00 00 00 00 00 00 ];
  263. fsl,cpm-command = <0x12000300>;
  264. interrupts = <0x20 0x8>;
  265. interrupt-parent = <&CPMPIC>;
  266. phy-handle = <&PHY0>;
  267. };
  268. };
  269. };
  270. localbus@fdf05000 {
  271. #address-cells = <2>;
  272. #size-cells = <1>;
  273. compatible = "fsl,mpc8560-localbus", "simple-bus";
  274. reg = <0xfdf05000 0x68>;
  275. ranges = <0x0 0x0 0xe0000000 0x00800000
  276. 0x4 0x0 0xe8080000 0x00080000>;
  277. flash@0,0 {
  278. #address-cells = <1>;
  279. #size-cells = <1>;
  280. compatible = "jedec-flash";
  281. reg = <0x0 0x0 0x800000>;
  282. bank-width = <0x2>;
  283. partition@0 {
  284. label = "Primary Kernel";
  285. reg = <0x0 0x180000>;
  286. };
  287. partition@180000 {
  288. label = "Primary Filesystem";
  289. reg = <0x180000 0x580000>;
  290. };
  291. partition@700000 {
  292. label = "Monitor";
  293. reg = <0x300000 0x100000>;
  294. read-only;
  295. };
  296. };
  297. cpld@4,0 {
  298. compatible = "emerson,KSI8560-cpld";
  299. reg = <0x4 0x0 0x80000>;
  300. };
  301. };
  302. chosen {
  303. linux,stdout-path = "/soc/cpm/serial@91a00";
  304. };
  305. };