acadia.dts 5.1 KB

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  1. /*
  2. * Device Tree Source for AMCC Acadia (405EZ)
  3. *
  4. * Copyright IBM Corp. 2008
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. /dts-v1/;
  11. / {
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. model = "amcc,acadia";
  15. compatible = "amcc,acadia";
  16. dcr-parent = <&{/cpus/cpu@0}>;
  17. aliases {
  18. ethernet0 = &EMAC0;
  19. serial0 = &UART0;
  20. serial1 = &UART1;
  21. };
  22. cpus {
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. cpu@0 {
  26. device_type = "cpu";
  27. model = "PowerPC,405EZ";
  28. reg = <0x0>;
  29. clock-frequency = <0>; /* Filled in by wrapper */
  30. timebase-frequency = <0>; /* Filled in by wrapper */
  31. i-cache-line-size = <32>;
  32. d-cache-line-size = <32>;
  33. i-cache-size = <16384>;
  34. d-cache-size = <16384>;
  35. dcr-controller;
  36. dcr-access-method = "native";
  37. };
  38. };
  39. memory {
  40. device_type = "memory";
  41. reg = <0x0 0x0>; /* Filled in by wrapper */
  42. };
  43. UIC0: interrupt-controller {
  44. compatible = "ibm,uic-405ez", "ibm,uic";
  45. interrupt-controller;
  46. dcr-reg = <0x0c0 0x009>;
  47. cell-index = <0>;
  48. #address-cells = <0>;
  49. #size-cells = <0>;
  50. #interrupt-cells = <2>;
  51. };
  52. plb {
  53. compatible = "ibm,plb-405ez", "ibm,plb3";
  54. #address-cells = <1>;
  55. #size-cells = <1>;
  56. ranges;
  57. clock-frequency = <0>; /* Filled in by wrapper */
  58. MAL0: mcmal {
  59. compatible = "ibm,mcmal-405ez", "ibm,mcmal";
  60. dcr-reg = <0x380 0x62>;
  61. num-tx-chans = <1>;
  62. num-rx-chans = <1>;
  63. interrupt-parent = <&UIC0>;
  64. /* 405EZ has only 3 interrupts to the UIC, as
  65. * SERR, TXDE, and RXDE are or'd together into
  66. * one UIC bit
  67. */
  68. interrupts = <
  69. 0x13 0x4 /* TXEOB */
  70. 0x15 0x4 /* RXEOB */
  71. 0x12 0x4 /* SERR, TXDE, RXDE */>;
  72. };
  73. POB0: opb {
  74. compatible = "ibm,opb-405ez", "ibm,opb";
  75. #address-cells = <1>;
  76. #size-cells = <1>;
  77. ranges;
  78. dcr-reg = <0x0a 0x05>;
  79. clock-frequency = <0>; /* Filled in by wrapper */
  80. UART0: serial@ef600300 {
  81. device_type = "serial";
  82. compatible = "ns16550";
  83. reg = <0xef600300 0x8>;
  84. virtual-reg = <0xef600300>;
  85. clock-frequency = <0>; /* Filled in by wrapper */
  86. current-speed = <115200>;
  87. interrupt-parent = <&UIC0>;
  88. interrupts = <0x5 0x4>;
  89. };
  90. UART1: serial@ef600400 {
  91. device_type = "serial";
  92. compatible = "ns16550";
  93. reg = <0xef600400 0x8>;
  94. clock-frequency = <0>; /* Filled in by wrapper */
  95. current-speed = <115200>;
  96. interrupt-parent = <&UIC0>;
  97. interrupts = <0x6 0x4>;
  98. };
  99. IIC: i2c@ef600500 {
  100. compatible = "ibm,iic-405ez", "ibm,iic";
  101. reg = <0xef600500 0x11>;
  102. interrupt-parent = <&UIC0>;
  103. interrupts = <0xa 0x4>;
  104. };
  105. GPIO0: gpio@ef600700 {
  106. compatible = "ibm,gpio-405ez";
  107. reg = <0xef600700 0x20>;
  108. };
  109. GPIO1: gpio@ef600800 {
  110. compatible = "ibm,gpio-405ez";
  111. reg = <0xef600800 0x20>;
  112. };
  113. EMAC0: ethernet@ef600900 {
  114. device_type = "network";
  115. compatible = "ibm,emac-405ez", "ibm,emac";
  116. interrupt-parent = <&UIC0>;
  117. interrupts = <
  118. 0x10 0x4 /* Ethernet */
  119. 0x11 0x4 /* Ethernet Wake up */>;
  120. local-mac-address = [000000000000]; /* Filled in by wrapper */
  121. reg = <0xef600900 0x70>;
  122. mal-device = <&MAL0>;
  123. mal-tx-channel = <0>;
  124. mal-rx-channel = <0>;
  125. cell-index = <0>;
  126. max-frame-size = <1500>;
  127. rx-fifo-size = <4096>;
  128. tx-fifo-size = <2048>;
  129. phy-mode = "mii";
  130. phy-map = <0x0>;
  131. };
  132. CAN0: can@ef601000 {
  133. compatible = "amcc,can-405ez";
  134. reg = <0xef601000 0x620>;
  135. interrupt-parent = <&UIC0>;
  136. interrupts = <0x7 0x4>;
  137. };
  138. CAN1: can@ef601800 {
  139. compatible = "amcc,can-405ez";
  140. reg = <0xef601800 0x620>;
  141. interrupt-parent = <&UIC0>;
  142. interrupts = <0x8 0x4>;
  143. };
  144. cameleon@ef602000 {
  145. compatible = "amcc,cameleon-405ez";
  146. reg = <0xef602000 0x800>;
  147. interrupt-parent = <&UIC0>;
  148. interrupts = <0xb 0x4 0xc 0x4>;
  149. };
  150. ieee1588@ef602800 {
  151. compatible = "amcc,ieee1588-405ez";
  152. reg = <0xef602800 0x60>;
  153. interrupt-parent = <&UIC0>;
  154. interrupts = <0x4 0x4>;
  155. /* This thing is a bit weird. It has it's own UIC
  156. * that it uses to generate snapshot triggers. We
  157. * don't really support this device yet, and it needs
  158. * work to figure this out.
  159. */
  160. dcr-reg = <0xe0 0x9>;
  161. };
  162. usb@ef603000 {
  163. compatible = "ohci-be";
  164. reg = <0xef603000 0x80>;
  165. interrupts-parent = <&UIC0>;
  166. interrupts = <0xd 0x4 0xe 0x4>;
  167. };
  168. dac@ef603300 {
  169. compatible = "amcc,dac-405ez";
  170. reg = <0xef603300 0x40>;
  171. interrupt-parent = <&UIC0>;
  172. interrupts = <0x18 0x4>;
  173. };
  174. adc@ef603400 {
  175. compatible = "amcc,adc-405ez";
  176. reg = <0xef603400 0x40>;
  177. interrupt-parent = <&UIC0>;
  178. interrupts = <0x17 0x4>;
  179. };
  180. spi@ef603500 {
  181. compatible = "amcc,spi-405ez";
  182. reg = <0xef603500 0x100>;
  183. interrupt-parent = <&UIC0>;
  184. interrupts = <0x9 0x4>;
  185. };
  186. };
  187. EBC0: ebc {
  188. compatible = "ibm,ebc-405ez", "ibm,ebc";
  189. dcr-reg = <0x12 0x2>;
  190. #address-cells = <2>;
  191. #size-cells = <1>;
  192. clock-frequency = <0>; /* Filled in by wrapper */
  193. };
  194. };
  195. chosen {
  196. linux,stdout-path = "/plb/opb/serial@ef600300";
  197. };
  198. };