init.c 13 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994 - 2000 Ralf Baechle
  7. * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  8. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  9. * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
  10. */
  11. #include <linux/bug.h>
  12. #include <linux/init.h>
  13. #include <linux/export.h>
  14. #include <linux/signal.h>
  15. #include <linux/sched.h>
  16. #include <linux/smp.h>
  17. #include <linux/kernel.h>
  18. #include <linux/errno.h>
  19. #include <linux/string.h>
  20. #include <linux/types.h>
  21. #include <linux/pagemap.h>
  22. #include <linux/ptrace.h>
  23. #include <linux/mman.h>
  24. #include <linux/mm.h>
  25. #include <linux/bootmem.h>
  26. #include <linux/highmem.h>
  27. #include <linux/swap.h>
  28. #include <linux/proc_fs.h>
  29. #include <linux/pfn.h>
  30. #include <linux/hardirq.h>
  31. #include <linux/gfp.h>
  32. #include <linux/kcore.h>
  33. #include <asm/asm-offsets.h>
  34. #include <asm/bootinfo.h>
  35. #include <asm/cachectl.h>
  36. #include <asm/cpu.h>
  37. #include <asm/dma.h>
  38. #include <asm/kmap_types.h>
  39. #include <asm/maar.h>
  40. #include <asm/mmu_context.h>
  41. #include <asm/sections.h>
  42. #include <asm/pgtable.h>
  43. #include <asm/pgalloc.h>
  44. #include <asm/tlb.h>
  45. #include <asm/fixmap.h>
  46. #include <asm/maar.h>
  47. /*
  48. * We have up to 8 empty zeroed pages so we can map one of the right colour
  49. * when needed. This is necessary only on R4000 / R4400 SC and MC versions
  50. * where we have to avoid VCED / VECI exceptions for good performance at
  51. * any price. Since page is never written to after the initialization we
  52. * don't have to care about aliases on other CPUs.
  53. */
  54. unsigned long empty_zero_page, zero_page_mask;
  55. EXPORT_SYMBOL_GPL(empty_zero_page);
  56. EXPORT_SYMBOL(zero_page_mask);
  57. /*
  58. * Not static inline because used by IP27 special magic initialization code
  59. */
  60. void setup_zero_pages(void)
  61. {
  62. unsigned int order, i;
  63. struct page *page;
  64. if (cpu_has_vce)
  65. order = 3;
  66. else
  67. order = 0;
  68. empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
  69. if (!empty_zero_page)
  70. panic("Oh boy, that early out of memory?");
  71. page = virt_to_page((void *)empty_zero_page);
  72. split_page(page, order);
  73. for (i = 0; i < (1 << order); i++, page++)
  74. mark_page_reserved(page);
  75. zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK;
  76. }
  77. static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)
  78. {
  79. enum fixed_addresses idx;
  80. unsigned long vaddr, flags, entrylo;
  81. unsigned long old_ctx;
  82. pte_t pte;
  83. int tlbidx;
  84. BUG_ON(Page_dcache_dirty(page));
  85. preempt_disable();
  86. pagefault_disable();
  87. idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
  88. idx += in_interrupt() ? FIX_N_COLOURS : 0;
  89. vaddr = __fix_to_virt(FIX_CMAP_END - idx);
  90. pte = mk_pte(page, prot);
  91. #if defined(CONFIG_XPA)
  92. entrylo = pte_to_entrylo(pte.pte_high);
  93. #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
  94. entrylo = pte.pte_high;
  95. #else
  96. entrylo = pte_to_entrylo(pte_val(pte));
  97. #endif
  98. local_irq_save(flags);
  99. old_ctx = read_c0_entryhi();
  100. write_c0_entryhi(vaddr & (PAGE_MASK << 1));
  101. write_c0_entrylo0(entrylo);
  102. write_c0_entrylo1(entrylo);
  103. #ifdef CONFIG_XPA
  104. if (cpu_has_xpa) {
  105. entrylo = (pte.pte_low & _PFNX_MASK);
  106. writex_c0_entrylo0(entrylo);
  107. writex_c0_entrylo1(entrylo);
  108. }
  109. #endif
  110. tlbidx = num_wired_entries();
  111. write_c0_wired(tlbidx + 1);
  112. write_c0_index(tlbidx);
  113. mtc0_tlbw_hazard();
  114. tlb_write_indexed();
  115. tlbw_use_hazard();
  116. write_c0_entryhi(old_ctx);
  117. local_irq_restore(flags);
  118. return (void*) vaddr;
  119. }
  120. void *kmap_coherent(struct page *page, unsigned long addr)
  121. {
  122. return __kmap_pgprot(page, addr, PAGE_KERNEL);
  123. }
  124. void *kmap_noncoherent(struct page *page, unsigned long addr)
  125. {
  126. return __kmap_pgprot(page, addr, PAGE_KERNEL_NC);
  127. }
  128. void kunmap_coherent(void)
  129. {
  130. unsigned int wired;
  131. unsigned long flags, old_ctx;
  132. local_irq_save(flags);
  133. old_ctx = read_c0_entryhi();
  134. wired = num_wired_entries() - 1;
  135. write_c0_wired(wired);
  136. write_c0_index(wired);
  137. write_c0_entryhi(UNIQUE_ENTRYHI(wired));
  138. write_c0_entrylo0(0);
  139. write_c0_entrylo1(0);
  140. mtc0_tlbw_hazard();
  141. tlb_write_indexed();
  142. tlbw_use_hazard();
  143. write_c0_entryhi(old_ctx);
  144. local_irq_restore(flags);
  145. pagefault_enable();
  146. preempt_enable();
  147. }
  148. void copy_user_highpage(struct page *to, struct page *from,
  149. unsigned long vaddr, struct vm_area_struct *vma)
  150. {
  151. void *vfrom, *vto;
  152. vto = kmap_atomic(to);
  153. if (cpu_has_dc_aliases &&
  154. page_mapcount(from) && !Page_dcache_dirty(from)) {
  155. vfrom = kmap_coherent(from, vaddr);
  156. copy_page(vto, vfrom);
  157. kunmap_coherent();
  158. } else {
  159. vfrom = kmap_atomic(from);
  160. copy_page(vto, vfrom);
  161. kunmap_atomic(vfrom);
  162. }
  163. if ((!cpu_has_ic_fills_f_dc) ||
  164. pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
  165. flush_data_cache_page((unsigned long)vto);
  166. kunmap_atomic(vto);
  167. /* Make sure this page is cleared on other CPU's too before using it */
  168. smp_wmb();
  169. }
  170. void copy_to_user_page(struct vm_area_struct *vma,
  171. struct page *page, unsigned long vaddr, void *dst, const void *src,
  172. unsigned long len)
  173. {
  174. if (cpu_has_dc_aliases &&
  175. page_mapcount(page) && !Page_dcache_dirty(page)) {
  176. void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
  177. memcpy(vto, src, len);
  178. kunmap_coherent();
  179. } else {
  180. memcpy(dst, src, len);
  181. if (cpu_has_dc_aliases)
  182. SetPageDcacheDirty(page);
  183. }
  184. if (vma->vm_flags & VM_EXEC)
  185. flush_cache_page(vma, vaddr, page_to_pfn(page));
  186. }
  187. void copy_from_user_page(struct vm_area_struct *vma,
  188. struct page *page, unsigned long vaddr, void *dst, const void *src,
  189. unsigned long len)
  190. {
  191. if (cpu_has_dc_aliases &&
  192. page_mapcount(page) && !Page_dcache_dirty(page)) {
  193. void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
  194. memcpy(dst, vfrom, len);
  195. kunmap_coherent();
  196. } else {
  197. memcpy(dst, src, len);
  198. if (cpu_has_dc_aliases)
  199. SetPageDcacheDirty(page);
  200. }
  201. }
  202. EXPORT_SYMBOL_GPL(copy_from_user_page);
  203. void __init fixrange_init(unsigned long start, unsigned long end,
  204. pgd_t *pgd_base)
  205. {
  206. #ifdef CONFIG_HIGHMEM
  207. pgd_t *pgd;
  208. pud_t *pud;
  209. pmd_t *pmd;
  210. pte_t *pte;
  211. int i, j, k;
  212. unsigned long vaddr;
  213. vaddr = start;
  214. i = __pgd_offset(vaddr);
  215. j = __pud_offset(vaddr);
  216. k = __pmd_offset(vaddr);
  217. pgd = pgd_base + i;
  218. for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
  219. pud = (pud_t *)pgd;
  220. for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
  221. pmd = (pmd_t *)pud;
  222. for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
  223. if (pmd_none(*pmd)) {
  224. pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
  225. set_pmd(pmd, __pmd((unsigned long)pte));
  226. BUG_ON(pte != pte_offset_kernel(pmd, 0));
  227. }
  228. vaddr += PMD_SIZE;
  229. }
  230. k = 0;
  231. }
  232. j = 0;
  233. }
  234. #endif
  235. }
  236. unsigned __weak platform_maar_init(unsigned num_pairs)
  237. {
  238. struct maar_config cfg[BOOT_MEM_MAP_MAX];
  239. unsigned i, num_configured, num_cfg = 0;
  240. for (i = 0; i < boot_mem_map.nr_map; i++) {
  241. switch (boot_mem_map.map[i].type) {
  242. case BOOT_MEM_RAM:
  243. case BOOT_MEM_INIT_RAM:
  244. break;
  245. default:
  246. continue;
  247. }
  248. /* Round lower up */
  249. cfg[num_cfg].lower = boot_mem_map.map[i].addr;
  250. cfg[num_cfg].lower = (cfg[num_cfg].lower + 0xffff) & ~0xffff;
  251. /* Round upper down */
  252. cfg[num_cfg].upper = boot_mem_map.map[i].addr +
  253. boot_mem_map.map[i].size;
  254. cfg[num_cfg].upper = (cfg[num_cfg].upper & ~0xffff) - 1;
  255. cfg[num_cfg].attrs = MIPS_MAAR_S;
  256. num_cfg++;
  257. }
  258. num_configured = maar_config(cfg, num_cfg, num_pairs);
  259. if (num_configured < num_cfg)
  260. pr_warn("Not enough MAAR pairs (%u) for all bootmem regions (%u)\n",
  261. num_pairs, num_cfg);
  262. return num_configured;
  263. }
  264. void maar_init(void)
  265. {
  266. unsigned num_maars, used, i;
  267. phys_addr_t lower, upper, attr;
  268. static struct {
  269. struct maar_config cfgs[3];
  270. unsigned used;
  271. } recorded = { { { 0 } }, 0 };
  272. if (!cpu_has_maar)
  273. return;
  274. /* Detect the number of MAARs */
  275. write_c0_maari(~0);
  276. back_to_back_c0_hazard();
  277. num_maars = read_c0_maari() + 1;
  278. /* MAARs should be in pairs */
  279. WARN_ON(num_maars % 2);
  280. /* Set MAARs using values we recorded already */
  281. if (recorded.used) {
  282. used = maar_config(recorded.cfgs, recorded.used, num_maars / 2);
  283. BUG_ON(used != recorded.used);
  284. } else {
  285. /* Configure the required MAARs */
  286. used = platform_maar_init(num_maars / 2);
  287. }
  288. /* Disable any further MAARs */
  289. for (i = (used * 2); i < num_maars; i++) {
  290. write_c0_maari(i);
  291. back_to_back_c0_hazard();
  292. write_c0_maar(0);
  293. back_to_back_c0_hazard();
  294. }
  295. if (recorded.used)
  296. return;
  297. pr_info("MAAR configuration:\n");
  298. for (i = 0; i < num_maars; i += 2) {
  299. write_c0_maari(i);
  300. back_to_back_c0_hazard();
  301. upper = read_c0_maar();
  302. write_c0_maari(i + 1);
  303. back_to_back_c0_hazard();
  304. lower = read_c0_maar();
  305. attr = lower & upper;
  306. lower = (lower & MIPS_MAAR_ADDR) << 4;
  307. upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff;
  308. pr_info(" [%d]: ", i / 2);
  309. if (!(attr & MIPS_MAAR_V)) {
  310. pr_cont("disabled\n");
  311. continue;
  312. }
  313. pr_cont("%pa-%pa", &lower, &upper);
  314. if (attr & MIPS_MAAR_S)
  315. pr_cont(" speculate");
  316. pr_cont("\n");
  317. /* Record the setup for use on secondary CPUs */
  318. if (used <= ARRAY_SIZE(recorded.cfgs)) {
  319. recorded.cfgs[recorded.used].lower = lower;
  320. recorded.cfgs[recorded.used].upper = upper;
  321. recorded.cfgs[recorded.used].attrs = attr;
  322. recorded.used++;
  323. }
  324. }
  325. }
  326. #ifndef CONFIG_NEED_MULTIPLE_NODES
  327. int page_is_ram(unsigned long pagenr)
  328. {
  329. int i;
  330. for (i = 0; i < boot_mem_map.nr_map; i++) {
  331. unsigned long addr, end;
  332. switch (boot_mem_map.map[i].type) {
  333. case BOOT_MEM_RAM:
  334. case BOOT_MEM_INIT_RAM:
  335. break;
  336. default:
  337. /* not usable memory */
  338. continue;
  339. }
  340. addr = PFN_UP(boot_mem_map.map[i].addr);
  341. end = PFN_DOWN(boot_mem_map.map[i].addr +
  342. boot_mem_map.map[i].size);
  343. if (pagenr >= addr && pagenr < end)
  344. return 1;
  345. }
  346. return 0;
  347. }
  348. void __init paging_init(void)
  349. {
  350. unsigned long max_zone_pfns[MAX_NR_ZONES];
  351. unsigned long lastpfn __maybe_unused;
  352. pagetable_init();
  353. #ifdef CONFIG_HIGHMEM
  354. kmap_init();
  355. #endif
  356. #ifdef CONFIG_ZONE_DMA
  357. max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
  358. #endif
  359. #ifdef CONFIG_ZONE_DMA32
  360. max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
  361. #endif
  362. max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
  363. lastpfn = max_low_pfn;
  364. #ifdef CONFIG_HIGHMEM
  365. max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
  366. lastpfn = highend_pfn;
  367. if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
  368. printk(KERN_WARNING "This processor doesn't support highmem."
  369. " %ldk highmem ignored\n",
  370. (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
  371. max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
  372. lastpfn = max_low_pfn;
  373. }
  374. #endif
  375. free_area_init_nodes(max_zone_pfns);
  376. }
  377. #ifdef CONFIG_64BIT
  378. static struct kcore_list kcore_kseg0;
  379. #endif
  380. static inline void mem_init_free_highmem(void)
  381. {
  382. #ifdef CONFIG_HIGHMEM
  383. unsigned long tmp;
  384. if (cpu_has_dc_aliases)
  385. return;
  386. for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
  387. struct page *page = pfn_to_page(tmp);
  388. if (!page_is_ram(tmp))
  389. SetPageReserved(page);
  390. else
  391. free_highmem_page(page);
  392. }
  393. #endif
  394. }
  395. void __init mem_init(void)
  396. {
  397. #ifdef CONFIG_HIGHMEM
  398. #ifdef CONFIG_DISCONTIGMEM
  399. #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
  400. #endif
  401. max_mapnr = highend_pfn ? highend_pfn : max_low_pfn;
  402. #else
  403. max_mapnr = max_low_pfn;
  404. #endif
  405. high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
  406. maar_init();
  407. free_all_bootmem();
  408. setup_zero_pages(); /* Setup zeroed pages. */
  409. mem_init_free_highmem();
  410. mem_init_print_info(NULL);
  411. #ifdef CONFIG_64BIT
  412. if ((unsigned long) &_text > (unsigned long) CKSEG0)
  413. /* The -4 is a hack so that user tools don't have to handle
  414. the overflow. */
  415. kclist_add(&kcore_kseg0, (void *) CKSEG0,
  416. 0x80000000 - 4, KCORE_TEXT);
  417. #endif
  418. }
  419. #endif /* !CONFIG_NEED_MULTIPLE_NODES */
  420. void free_init_pages(const char *what, unsigned long begin, unsigned long end)
  421. {
  422. unsigned long pfn;
  423. for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
  424. struct page *page = pfn_to_page(pfn);
  425. void *addr = phys_to_virt(PFN_PHYS(pfn));
  426. memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
  427. free_reserved_page(page);
  428. }
  429. printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
  430. }
  431. #ifdef CONFIG_BLK_DEV_INITRD
  432. void free_initrd_mem(unsigned long start, unsigned long end)
  433. {
  434. free_reserved_area((void *)start, (void *)end, POISON_FREE_INITMEM,
  435. "initrd");
  436. }
  437. #endif
  438. void (*free_init_pages_eva)(void *begin, void *end) = NULL;
  439. void __ref free_initmem(void)
  440. {
  441. prom_free_prom_memory();
  442. /*
  443. * Let the platform define a specific function to free the
  444. * init section since EVA may have used any possible mapping
  445. * between virtual and physical addresses.
  446. */
  447. if (free_init_pages_eva)
  448. free_init_pages_eva((void *)&__init_begin, (void *)&__init_end);
  449. else
  450. free_initmem_default(POISON_FREE_INITMEM);
  451. }
  452. #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
  453. unsigned long pgd_current[NR_CPUS];
  454. #endif
  455. /*
  456. * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER
  457. * are constants. So we use the variants from asm-offset.h until that gcc
  458. * will officially be retired.
  459. *
  460. * Align swapper_pg_dir in to 64K, allows its address to be loaded
  461. * with a single LUI instruction in the TLB handlers. If we used
  462. * __aligned(64K), its size would get rounded up to the alignment
  463. * size, and waste space. So we place it in its own section and align
  464. * it in the linker script.
  465. */
  466. pgd_t swapper_pg_dir[_PTRS_PER_PGD] __section(.bss..swapper_pg_dir);
  467. #ifndef __PAGETABLE_PMD_FOLDED
  468. pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
  469. #endif
  470. pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;