reset.c 2.1 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify it
  3. * under the terms of the GNU General Public License version 2 as published
  4. * by the Free Software Foundation.
  5. *
  6. * Copyright (C) 2012 Thomas Langer <thomas.langer@lantiq.com>
  7. * Copyright (C) 2012 John Crispin <john@phrozen.org>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/io.h>
  11. #include <linux/pm.h>
  12. #include <asm/reboot.h>
  13. #include <linux/export.h>
  14. #include <lantiq_soc.h>
  15. /* CPU0 Reset Source Register */
  16. #define SYS1_CPU0RS 0x0040
  17. /* reset cause mask */
  18. #define CPU0RS_MASK 0x0003
  19. /* CPU0 Boot Mode Register */
  20. #define SYS1_BM 0x00a0
  21. /* boot mode mask */
  22. #define BM_MASK 0x0005
  23. /* allow platform code to find out what surce we booted from */
  24. unsigned char ltq_boot_select(void)
  25. {
  26. return ltq_sys1_r32(SYS1_BM) & BM_MASK;
  27. }
  28. /* allow the watchdog driver to find out what the boot reason was */
  29. int ltq_reset_cause(void)
  30. {
  31. return ltq_sys1_r32(SYS1_CPU0RS) & CPU0RS_MASK;
  32. }
  33. EXPORT_SYMBOL_GPL(ltq_reset_cause);
  34. #define BOOT_REG_BASE (KSEG1 | 0x1F200000)
  35. #define BOOT_PW1_REG (BOOT_REG_BASE | 0x20)
  36. #define BOOT_PW2_REG (BOOT_REG_BASE | 0x24)
  37. #define BOOT_PW1 0x4C545100
  38. #define BOOT_PW2 0x0051544C
  39. #define WDT_REG_BASE (KSEG1 | 0x1F8803F0)
  40. #define WDT_PW1 0x00BE0000
  41. #define WDT_PW2 0x00DC0000
  42. static void machine_restart(char *command)
  43. {
  44. local_irq_disable();
  45. /* reboot magic */
  46. ltq_w32(BOOT_PW1, (void *)BOOT_PW1_REG); /* 'LTQ\0' */
  47. ltq_w32(BOOT_PW2, (void *)BOOT_PW2_REG); /* '\0QTL' */
  48. ltq_w32(0, (void *)BOOT_REG_BASE); /* reset Bootreg RVEC */
  49. /* watchdog magic */
  50. ltq_w32(WDT_PW1, (void *)WDT_REG_BASE);
  51. ltq_w32(WDT_PW2 |
  52. (0x3 << 26) | /* PWL */
  53. (0x2 << 24) | /* CLKDIV */
  54. (0x1 << 31) | /* enable */
  55. (1), /* reload */
  56. (void *)WDT_REG_BASE);
  57. unreachable();
  58. }
  59. static void machine_halt(void)
  60. {
  61. local_irq_disable();
  62. unreachable();
  63. }
  64. static void machine_power_off(void)
  65. {
  66. local_irq_disable();
  67. unreachable();
  68. }
  69. static int __init mips_reboot_setup(void)
  70. {
  71. _machine_restart = machine_restart;
  72. _machine_halt = machine_halt;
  73. pm_power_off = machine_power_off;
  74. return 0;
  75. }
  76. arch_initcall(mips_reboot_setup);