cvmx-helper-board.c 12 KB

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  1. /***********************license start***************
  2. * Author: Cavium Networks
  3. *
  4. * Contact: support@caviumnetworks.com
  5. * This file is part of the OCTEON SDK
  6. *
  7. * Copyright (c) 2003-2008 Cavium Networks
  8. *
  9. * This file is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License, Version 2, as
  11. * published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful, but
  14. * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16. * NONINFRINGEMENT. See the GNU General Public License for more
  17. * details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this file; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22. * or visit http://www.gnu.org/licenses/.
  23. *
  24. * This file may also be available under a different license from Cavium.
  25. * Contact Cavium Networks for more information
  26. ***********************license end**************************************/
  27. /*
  28. *
  29. * Helper functions to abstract board specific data about
  30. * network ports from the rest of the cvmx-helper files.
  31. */
  32. #include <asm/octeon/octeon.h>
  33. #include <asm/octeon/cvmx-bootinfo.h>
  34. #include <asm/octeon/cvmx-config.h>
  35. #include <asm/octeon/cvmx-helper.h>
  36. #include <asm/octeon/cvmx-helper-util.h>
  37. #include <asm/octeon/cvmx-helper-board.h>
  38. #include <asm/octeon/cvmx-gmxx-defs.h>
  39. #include <asm/octeon/cvmx-asxx-defs.h>
  40. /**
  41. * Return the MII PHY address associated with the given IPD
  42. * port. A result of -1 means there isn't a MII capable PHY
  43. * connected to this port. On chips supporting multiple MII
  44. * busses the bus number is encoded in bits <15:8>.
  45. *
  46. * This function must be modified for every new Octeon board.
  47. * Internally it uses switch statements based on the cvmx_sysinfo
  48. * data to determine board types and revisions. It replies on the
  49. * fact that every Octeon board receives a unique board type
  50. * enumeration from the bootloader.
  51. *
  52. * @ipd_port: Octeon IPD port to get the MII address for.
  53. *
  54. * Returns MII PHY address and bus number or -1.
  55. */
  56. int cvmx_helper_board_get_mii_address(int ipd_port)
  57. {
  58. switch (cvmx_sysinfo_get()->board_type) {
  59. case CVMX_BOARD_TYPE_SIM:
  60. /* Simulator doesn't have MII */
  61. return -1;
  62. case CVMX_BOARD_TYPE_EBT3000:
  63. case CVMX_BOARD_TYPE_EBT5800:
  64. case CVMX_BOARD_TYPE_THUNDER:
  65. case CVMX_BOARD_TYPE_NICPRO2:
  66. /* Interface 0 is SPI4, interface 1 is RGMII */
  67. if ((ipd_port >= 16) && (ipd_port < 20))
  68. return ipd_port - 16;
  69. else
  70. return -1;
  71. case CVMX_BOARD_TYPE_KODAMA:
  72. case CVMX_BOARD_TYPE_EBH3100:
  73. case CVMX_BOARD_TYPE_HIKARI:
  74. case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
  75. case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
  76. case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
  77. /*
  78. * Port 0 is WAN connected to a PHY, Port 1 is GMII
  79. * connected to a switch
  80. */
  81. if (ipd_port == 0)
  82. return 4;
  83. else if (ipd_port == 1)
  84. return 9;
  85. else
  86. return -1;
  87. case CVMX_BOARD_TYPE_NAC38:
  88. /* Board has 8 RGMII ports PHYs are 0-7 */
  89. if ((ipd_port >= 0) && (ipd_port < 4))
  90. return ipd_port;
  91. else if ((ipd_port >= 16) && (ipd_port < 20))
  92. return ipd_port - 16 + 4;
  93. else
  94. return -1;
  95. case CVMX_BOARD_TYPE_EBH3000:
  96. /* Board has dual SPI4 and no PHYs */
  97. return -1;
  98. case CVMX_BOARD_TYPE_EBH5200:
  99. case CVMX_BOARD_TYPE_EBH5201:
  100. case CVMX_BOARD_TYPE_EBT5200:
  101. /* Board has 2 management ports */
  102. if ((ipd_port >= CVMX_HELPER_BOARD_MGMT_IPD_PORT) &&
  103. (ipd_port < (CVMX_HELPER_BOARD_MGMT_IPD_PORT + 2)))
  104. return ipd_port - CVMX_HELPER_BOARD_MGMT_IPD_PORT;
  105. /*
  106. * Board has 4 SGMII ports. The PHYs start right after the MII
  107. * ports MII0 = 0, MII1 = 1, SGMII = 2-5.
  108. */
  109. if ((ipd_port >= 0) && (ipd_port < 4))
  110. return ipd_port + 2;
  111. else
  112. return -1;
  113. case CVMX_BOARD_TYPE_EBH5600:
  114. case CVMX_BOARD_TYPE_EBH5601:
  115. case CVMX_BOARD_TYPE_EBH5610:
  116. /* Board has 1 management port */
  117. if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
  118. return 0;
  119. /*
  120. * Board has 8 SGMII ports. 4 connect out, two connect
  121. * to a switch, and 2 loop to each other
  122. */
  123. if ((ipd_port >= 0) && (ipd_port < 4))
  124. return ipd_port + 1;
  125. else
  126. return -1;
  127. case CVMX_BOARD_TYPE_CUST_NB5:
  128. if (ipd_port == 2)
  129. return 4;
  130. else
  131. return -1;
  132. case CVMX_BOARD_TYPE_NIC_XLE_4G:
  133. /* Board has 4 SGMII ports. connected QLM3(interface 1) */
  134. if ((ipd_port >= 16) && (ipd_port < 20))
  135. return ipd_port - 16 + 1;
  136. else
  137. return -1;
  138. case CVMX_BOARD_TYPE_NIC_XLE_10G:
  139. case CVMX_BOARD_TYPE_NIC10E:
  140. return -1;
  141. case CVMX_BOARD_TYPE_NIC4E:
  142. if (ipd_port >= 0 && ipd_port <= 3)
  143. return (ipd_port + 0x1f) & 0x1f;
  144. else
  145. return -1;
  146. case CVMX_BOARD_TYPE_NIC2E:
  147. if (ipd_port >= 0 && ipd_port <= 1)
  148. return ipd_port + 1;
  149. else
  150. return -1;
  151. case CVMX_BOARD_TYPE_BBGW_REF:
  152. /*
  153. * No PHYs are connected to Octeon, everything is
  154. * through switch.
  155. */
  156. return -1;
  157. case CVMX_BOARD_TYPE_CUST_WSX16:
  158. if (ipd_port >= 0 && ipd_port <= 3)
  159. return ipd_port;
  160. else if (ipd_port >= 16 && ipd_port <= 19)
  161. return ipd_port - 16 + 4;
  162. else
  163. return -1;
  164. case CVMX_BOARD_TYPE_UBNT_E100:
  165. if (ipd_port >= 0 && ipd_port <= 2)
  166. return 7 - ipd_port;
  167. else
  168. return -1;
  169. case CVMX_BOARD_TYPE_KONTRON_S1901:
  170. if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
  171. return 1;
  172. else
  173. return -1;
  174. }
  175. /* Some unknown board. Somebody forgot to update this function... */
  176. cvmx_dprintf
  177. ("cvmx_helper_board_get_mii_address: Unknown board type %d\n",
  178. cvmx_sysinfo_get()->board_type);
  179. return -1;
  180. }
  181. /**
  182. * This function is the board specific method of determining an
  183. * ethernet ports link speed. Most Octeon boards have Marvell PHYs
  184. * and are handled by the fall through case. This function must be
  185. * updated for boards that don't have the normal Marvell PHYs.
  186. *
  187. * This function must be modified for every new Octeon board.
  188. * Internally it uses switch statements based on the cvmx_sysinfo
  189. * data to determine board types and revisions. It relies on the
  190. * fact that every Octeon board receives a unique board type
  191. * enumeration from the bootloader.
  192. *
  193. * @ipd_port: IPD input port associated with the port we want to get link
  194. * status for.
  195. *
  196. * Returns The ports link status. If the link isn't fully resolved, this must
  197. * return zero.
  198. */
  199. cvmx_helper_link_info_t __cvmx_helper_board_link_get(int ipd_port)
  200. {
  201. cvmx_helper_link_info_t result;
  202. /* Unless we fix it later, all links are defaulted to down */
  203. result.u64 = 0;
  204. /*
  205. * This switch statement should handle all ports that either don't use
  206. * Marvell PHYS, or don't support in-band status.
  207. */
  208. switch (cvmx_sysinfo_get()->board_type) {
  209. case CVMX_BOARD_TYPE_SIM:
  210. /* The simulator gives you a simulated 1Gbps full duplex link */
  211. result.s.link_up = 1;
  212. result.s.full_duplex = 1;
  213. result.s.speed = 1000;
  214. return result;
  215. case CVMX_BOARD_TYPE_EBH3100:
  216. case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
  217. case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
  218. case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
  219. /* Port 1 on these boards is always Gigabit */
  220. if (ipd_port == 1) {
  221. result.s.link_up = 1;
  222. result.s.full_duplex = 1;
  223. result.s.speed = 1000;
  224. return result;
  225. }
  226. /* Fall through to the generic code below */
  227. break;
  228. case CVMX_BOARD_TYPE_CUST_NB5:
  229. /* Port 1 on these boards is always Gigabit */
  230. if (ipd_port == 1) {
  231. result.s.link_up = 1;
  232. result.s.full_duplex = 1;
  233. result.s.speed = 1000;
  234. return result;
  235. }
  236. break;
  237. case CVMX_BOARD_TYPE_BBGW_REF:
  238. /* Port 1 on these boards is always Gigabit */
  239. if (ipd_port == 2) {
  240. /* Port 2 is not hooked up */
  241. result.u64 = 0;
  242. return result;
  243. } else {
  244. /* Ports 0 and 1 connect to the switch */
  245. result.s.link_up = 1;
  246. result.s.full_duplex = 1;
  247. result.s.speed = 1000;
  248. return result;
  249. }
  250. break;
  251. }
  252. if (OCTEON_IS_MODEL(OCTEON_CN3XXX)
  253. || OCTEON_IS_MODEL(OCTEON_CN58XX)
  254. || OCTEON_IS_MODEL(OCTEON_CN50XX)) {
  255. /*
  256. * We don't have a PHY address, so attempt to use
  257. * in-band status. It is really important that boards
  258. * not supporting in-band status never get
  259. * here. Reading broken in-band status tends to do bad
  260. * things
  261. */
  262. union cvmx_gmxx_rxx_rx_inbnd inband_status;
  263. int interface = cvmx_helper_get_interface_num(ipd_port);
  264. int index = cvmx_helper_get_interface_index_num(ipd_port);
  265. inband_status.u64 =
  266. cvmx_read_csr(CVMX_GMXX_RXX_RX_INBND(index, interface));
  267. result.s.link_up = inband_status.s.status;
  268. result.s.full_duplex = inband_status.s.duplex;
  269. switch (inband_status.s.speed) {
  270. case 0: /* 10 Mbps */
  271. result.s.speed = 10;
  272. break;
  273. case 1: /* 100 Mbps */
  274. result.s.speed = 100;
  275. break;
  276. case 2: /* 1 Gbps */
  277. result.s.speed = 1000;
  278. break;
  279. case 3: /* Illegal */
  280. result.u64 = 0;
  281. break;
  282. }
  283. } else {
  284. /*
  285. * We don't have a PHY address and we don't have
  286. * in-band status. There is no way to determine the
  287. * link speed. Return down assuming this port isn't
  288. * wired
  289. */
  290. result.u64 = 0;
  291. }
  292. /* If link is down, return all fields as zero. */
  293. if (!result.s.link_up)
  294. result.u64 = 0;
  295. return result;
  296. }
  297. /**
  298. * This function is called by cvmx_helper_interface_probe() after it
  299. * determines the number of ports Octeon can support on a specific
  300. * interface. This function is the per board location to override
  301. * this value. It is called with the number of ports Octeon might
  302. * support and should return the number of actual ports on the
  303. * board.
  304. *
  305. * This function must be modifed for every new Octeon board.
  306. * Internally it uses switch statements based on the cvmx_sysinfo
  307. * data to determine board types and revisions. It relys on the
  308. * fact that every Octeon board receives a unique board type
  309. * enumeration from the bootloader.
  310. *
  311. * @interface: Interface to probe
  312. * @supported_ports:
  313. * Number of ports Octeon supports.
  314. *
  315. * Returns Number of ports the actual board supports. Many times this will
  316. * simple be "support_ports".
  317. */
  318. int __cvmx_helper_board_interface_probe(int interface, int supported_ports)
  319. {
  320. switch (cvmx_sysinfo_get()->board_type) {
  321. case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
  322. if (interface == 0)
  323. return 2;
  324. break;
  325. case CVMX_BOARD_TYPE_BBGW_REF:
  326. if (interface == 0)
  327. return 2;
  328. break;
  329. case CVMX_BOARD_TYPE_NIC_XLE_4G:
  330. if (interface == 0)
  331. return 0;
  332. break;
  333. /* The 2nd interface on the EBH5600 is connected to the Marvel switch,
  334. which we don't support. Disable ports connected to it */
  335. case CVMX_BOARD_TYPE_EBH5600:
  336. if (interface == 1)
  337. return 0;
  338. break;
  339. }
  340. return supported_ports;
  341. }
  342. /**
  343. * Enable packet input/output from the hardware. This function is
  344. * called after by cvmx_helper_packet_hardware_enable() to
  345. * perform board specific initialization. For most boards
  346. * nothing is needed.
  347. *
  348. * @interface: Interface to enable
  349. *
  350. * Returns Zero on success, negative on failure
  351. */
  352. int __cvmx_helper_board_hardware_enable(int interface)
  353. {
  354. if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_CN3005_EVB_HS5) {
  355. if (interface == 0) {
  356. /* Different config for switch port */
  357. cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0);
  358. cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0);
  359. /*
  360. * Boards with gigabit WAN ports need a
  361. * different setting that is compatible with
  362. * 100 Mbit settings
  363. */
  364. cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface),
  365. 0xc);
  366. cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface),
  367. 0xc);
  368. }
  369. } else if (cvmx_sysinfo_get()->board_type ==
  370. CVMX_BOARD_TYPE_UBNT_E100) {
  371. cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 0);
  372. cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 0x10);
  373. cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0);
  374. cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0x10);
  375. cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(2, interface), 0);
  376. cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(2, interface), 0x10);
  377. }
  378. return 0;
  379. }
  380. /**
  381. * Get the clock type used for the USB block based on board type.
  382. * Used by the USB code for auto configuration of clock type.
  383. *
  384. * Return USB clock type enumeration
  385. */
  386. enum cvmx_helper_board_usb_clock_types __cvmx_helper_board_usb_get_clock_type(void)
  387. {
  388. switch (cvmx_sysinfo_get()->board_type) {
  389. case CVMX_BOARD_TYPE_BBGW_REF:
  390. case CVMX_BOARD_TYPE_LANAI2_A:
  391. case CVMX_BOARD_TYPE_LANAI2_U:
  392. case CVMX_BOARD_TYPE_LANAI2_G:
  393. case CVMX_BOARD_TYPE_NIC10E_66:
  394. case CVMX_BOARD_TYPE_UBNT_E100:
  395. return USB_CLOCK_TYPE_CRYSTAL_12;
  396. case CVMX_BOARD_TYPE_NIC10E:
  397. return USB_CLOCK_TYPE_REF_12;
  398. default:
  399. break;
  400. }
  401. /* Most boards except NIC10e use a 12MHz crystal */
  402. if (OCTEON_IS_OCTEON2())
  403. return USB_CLOCK_TYPE_CRYSTAL_12;
  404. return USB_CLOCK_TYPE_REF_48;
  405. }