q40ints.c 7.9 KB

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  1. /*
  2. * arch/m68k/q40/q40ints.c
  3. *
  4. * Copyright (C) 1999,2001 Richard Zidlicky
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive
  8. * for more details.
  9. *
  10. * .. used to be loosely based on bvme6000ints.c
  11. *
  12. */
  13. #include <linux/types.h>
  14. #include <linux/kernel.h>
  15. #include <linux/errno.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/irq.h>
  18. #include <asm/ptrace.h>
  19. #include <asm/traps.h>
  20. #include <asm/q40_master.h>
  21. #include <asm/q40ints.h>
  22. /*
  23. * Q40 IRQs are defined as follows:
  24. * 3,4,5,6,7,10,11,14,15 : ISA dev IRQs
  25. * 16-31: reserved
  26. * 32 : keyboard int
  27. * 33 : frame int (50/200 Hz periodic timer)
  28. * 34 : sample int (10/20 KHz periodic timer)
  29. *
  30. */
  31. static void q40_irq_handler(unsigned int, struct pt_regs *fp);
  32. static void q40_irq_enable(struct irq_data *data);
  33. static void q40_irq_disable(struct irq_data *data);
  34. unsigned short q40_ablecount[35];
  35. unsigned short q40_state[35];
  36. static unsigned int q40_irq_startup(struct irq_data *data)
  37. {
  38. unsigned int irq = data->irq;
  39. /* test for ISA ints not implemented by HW */
  40. switch (irq) {
  41. case 1: case 2: case 8: case 9:
  42. case 11: case 12: case 13:
  43. printk("%s: ISA IRQ %d not implemented by HW\n", __func__, irq);
  44. /* FIXME return -ENXIO; */
  45. }
  46. return 0;
  47. }
  48. static void q40_irq_shutdown(struct irq_data *data)
  49. {
  50. }
  51. static struct irq_chip q40_irq_chip = {
  52. .name = "q40",
  53. .irq_startup = q40_irq_startup,
  54. .irq_shutdown = q40_irq_shutdown,
  55. .irq_enable = q40_irq_enable,
  56. .irq_disable = q40_irq_disable,
  57. };
  58. /*
  59. * void q40_init_IRQ (void)
  60. *
  61. * Parameters: None
  62. *
  63. * Returns: Nothing
  64. *
  65. * This function is called during kernel startup to initialize
  66. * the q40 IRQ handling routines.
  67. */
  68. static int disabled;
  69. void __init q40_init_IRQ(void)
  70. {
  71. m68k_setup_irq_controller(&q40_irq_chip, handle_simple_irq, 1,
  72. Q40_IRQ_MAX);
  73. /* setup handler for ISA ints */
  74. m68k_setup_auto_interrupt(q40_irq_handler);
  75. m68k_irq_startup_irq(IRQ_AUTO_2);
  76. m68k_irq_startup_irq(IRQ_AUTO_4);
  77. /* now enable some ints.. */
  78. master_outb(1, EXT_ENABLE_REG); /* ISA IRQ 5-15 */
  79. /* make sure keyboard IRQ is disabled */
  80. master_outb(0, KEY_IRQ_ENABLE_REG);
  81. }
  82. /*
  83. * this stuff doesn't really belong here..
  84. */
  85. int ql_ticks; /* 200Hz ticks since last jiffie */
  86. static int sound_ticks;
  87. #define SVOL 45
  88. void q40_mksound(unsigned int hz, unsigned int ticks)
  89. {
  90. /* for now ignore hz, except that hz==0 switches off sound */
  91. /* simply alternate the ampl (128-SVOL)-(128+SVOL)-..-.. at 200Hz */
  92. if (hz == 0) {
  93. if (sound_ticks)
  94. sound_ticks = 1;
  95. *DAC_LEFT = 128;
  96. *DAC_RIGHT = 128;
  97. return;
  98. }
  99. /* sound itself is done in q40_timer_int */
  100. if (sound_ticks == 0)
  101. sound_ticks = 1000; /* pretty long beep */
  102. sound_ticks = ticks << 1;
  103. }
  104. static irq_handler_t q40_timer_routine;
  105. static irqreturn_t q40_timer_int (int irq, void * dev)
  106. {
  107. ql_ticks = ql_ticks ? 0 : 1;
  108. if (sound_ticks) {
  109. unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
  110. sound_ticks--;
  111. *DAC_LEFT=sval;
  112. *DAC_RIGHT=sval;
  113. }
  114. if (!ql_ticks)
  115. q40_timer_routine(irq, dev);
  116. return IRQ_HANDLED;
  117. }
  118. void q40_sched_init (irq_handler_t timer_routine)
  119. {
  120. int timer_irq;
  121. q40_timer_routine = timer_routine;
  122. timer_irq = Q40_IRQ_FRAME;
  123. if (request_irq(timer_irq, q40_timer_int, 0,
  124. "timer", q40_timer_int))
  125. panic("Couldn't register timer int");
  126. master_outb(-1, FRAME_CLEAR_REG);
  127. master_outb( 1, FRAME_RATE_REG);
  128. }
  129. /*
  130. * tables to translate bits into IRQ numbers
  131. * it is a good idea to order the entries by priority
  132. *
  133. */
  134. struct IRQ_TABLE{ unsigned mask; int irq ;};
  135. #if 0
  136. static struct IRQ_TABLE iirqs[]={
  137. {Q40_IRQ_FRAME_MASK,Q40_IRQ_FRAME},
  138. {Q40_IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD},
  139. {0,0}};
  140. #endif
  141. static struct IRQ_TABLE eirqs[] = {
  142. { .mask = Q40_IRQ3_MASK, .irq = 3 }, /* ser 1 */
  143. { .mask = Q40_IRQ4_MASK, .irq = 4 }, /* ser 2 */
  144. { .mask = Q40_IRQ14_MASK, .irq = 14 }, /* IDE 1 */
  145. { .mask = Q40_IRQ15_MASK, .irq = 15 }, /* IDE 2 */
  146. { .mask = Q40_IRQ6_MASK, .irq = 6 }, /* floppy, handled elsewhere */
  147. { .mask = Q40_IRQ7_MASK, .irq = 7 }, /* par */
  148. { .mask = Q40_IRQ5_MASK, .irq = 5 },
  149. { .mask = Q40_IRQ10_MASK, .irq = 10 },
  150. {0,0}
  151. };
  152. /* complain only this many times about spurious ints : */
  153. static int ccleirq=60; /* ISA dev IRQs*/
  154. /*static int cclirq=60;*/ /* internal */
  155. /* FIXME: add shared ints,mask,unmask,probing.... */
  156. #define IRQ_INPROGRESS 1
  157. /*static unsigned short saved_mask;*/
  158. //static int do_tint=0;
  159. #define DEBUG_Q40INT
  160. /*#define IP_USE_DISABLE *//* would be nice, but crashes ???? */
  161. static int mext_disabled=0; /* ext irq disabled by master chip? */
  162. static int aliased_irq=0; /* how many times inside handler ?*/
  163. /* got interrupt, dispatch to ISA or keyboard/timer IRQs */
  164. static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
  165. {
  166. unsigned mir, mer;
  167. int i;
  168. //repeat:
  169. mir = master_inb(IIRQ_REG);
  170. #ifdef CONFIG_BLK_DEV_FD
  171. if ((mir & Q40_IRQ_EXT_MASK) &&
  172. (master_inb(EIRQ_REG) & Q40_IRQ6_MASK)) {
  173. floppy_hardint();
  174. return;
  175. }
  176. #endif
  177. switch (irq) {
  178. case 4:
  179. case 6:
  180. do_IRQ(Q40_IRQ_SAMPLE, fp);
  181. return;
  182. }
  183. if (mir & Q40_IRQ_FRAME_MASK) {
  184. do_IRQ(Q40_IRQ_FRAME, fp);
  185. master_outb(-1, FRAME_CLEAR_REG);
  186. }
  187. if ((mir & Q40_IRQ_SER_MASK) || (mir & Q40_IRQ_EXT_MASK)) {
  188. mer = master_inb(EIRQ_REG);
  189. for (i = 0; eirqs[i].mask; i++) {
  190. if (mer & eirqs[i].mask) {
  191. irq = eirqs[i].irq;
  192. /*
  193. * There is a little mess wrt which IRQ really caused this irq request. The
  194. * main problem is that IIRQ_REG and EIRQ_REG reflect the state when they
  195. * are read - which is long after the request came in. In theory IRQs should
  196. * not just go away but they occasionally do
  197. */
  198. if (irq > 4 && irq <= 15 && mext_disabled) {
  199. /*aliased_irq++;*/
  200. goto iirq;
  201. }
  202. if (q40_state[irq] & IRQ_INPROGRESS) {
  203. /* some handlers do local_irq_enable() for irq latency reasons, */
  204. /* however reentering an active irq handler is not permitted */
  205. #ifdef IP_USE_DISABLE
  206. /* in theory this is the better way to do it because it still */
  207. /* lets through eg the serial irqs, unfortunately it crashes */
  208. disable_irq(irq);
  209. disabled = 1;
  210. #else
  211. /*printk("IRQ_INPROGRESS detected for irq %d, disabling - %s disabled\n",
  212. irq, disabled ? "already" : "not yet"); */
  213. fp->sr = (((fp->sr) & (~0x700))+0x200);
  214. disabled = 1;
  215. #endif
  216. goto iirq;
  217. }
  218. q40_state[irq] |= IRQ_INPROGRESS;
  219. do_IRQ(irq, fp);
  220. q40_state[irq] &= ~IRQ_INPROGRESS;
  221. /* naively enable everything, if that fails than */
  222. /* this function will be reentered immediately thus */
  223. /* getting another chance to disable the IRQ */
  224. if (disabled) {
  225. #ifdef IP_USE_DISABLE
  226. if (irq > 4) {
  227. disabled = 0;
  228. enable_irq(irq);
  229. }
  230. #else
  231. disabled = 0;
  232. /*printk("reenabling irq %d\n", irq); */
  233. #endif
  234. }
  235. // used to do 'goto repeat;' here, this delayed bh processing too long
  236. return;
  237. }
  238. }
  239. if (mer && ccleirq > 0 && !aliased_irq) {
  240. printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer);
  241. ccleirq--;
  242. }
  243. }
  244. iirq:
  245. mir = master_inb(IIRQ_REG);
  246. /* should test whether keyboard irq is really enabled, doing it in defhand */
  247. if (mir & Q40_IRQ_KEYB_MASK)
  248. do_IRQ(Q40_IRQ_KEYBOARD, fp);
  249. return;
  250. }
  251. void q40_irq_enable(struct irq_data *data)
  252. {
  253. unsigned int irq = data->irq;
  254. if (irq >= 5 && irq <= 15) {
  255. mext_disabled--;
  256. if (mext_disabled > 0)
  257. printk("q40_irq_enable : nested disable/enable\n");
  258. if (mext_disabled == 0)
  259. master_outb(1, EXT_ENABLE_REG);
  260. }
  261. }
  262. void q40_irq_disable(struct irq_data *data)
  263. {
  264. unsigned int irq = data->irq;
  265. /* disable ISA iqs : only do something if the driver has been
  266. * verified to be Q40 "compatible" - right now IDE, NE2K
  267. * Any driver should not attempt to sleep across disable_irq !!
  268. */
  269. if (irq >= 5 && irq <= 15) {
  270. master_outb(0, EXT_ENABLE_REG);
  271. mext_disabled++;
  272. if (mext_disabled > 1)
  273. printk("disable_irq nesting count %d\n",mext_disabled);
  274. }
  275. }