config.c 10 KB

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  1. /*
  2. * arch/m68k/mvme16x/config.c
  3. *
  4. * Copyright (C) 1995 Richard Hirst [richard@sleepie.demon.co.uk]
  5. *
  6. * Based on:
  7. *
  8. * linux/amiga/config.c
  9. *
  10. * Copyright (C) 1993 Hamish Macdonald
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file README.legal in the main directory of this archive
  14. * for more details.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mm.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/tty.h>
  21. #include <linux/console.h>
  22. #include <linux/linkage.h>
  23. #include <linux/init.h>
  24. #include <linux/major.h>
  25. #include <linux/genhd.h>
  26. #include <linux/rtc.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/module.h>
  29. #include <asm/bootinfo.h>
  30. #include <asm/bootinfo-vme.h>
  31. #include <asm/byteorder.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/setup.h>
  34. #include <asm/irq.h>
  35. #include <asm/traps.h>
  36. #include <asm/machdep.h>
  37. #include <asm/mvme16xhw.h>
  38. extern t_bdid mvme_bdid;
  39. static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
  40. static void mvme16x_get_model(char *model);
  41. extern void mvme16x_sched_init(irq_handler_t handler);
  42. extern u32 mvme16x_gettimeoffset(void);
  43. extern int mvme16x_hwclk (int, struct rtc_time *);
  44. extern int mvme16x_set_clock_mmss (unsigned long);
  45. extern void mvme16x_reset (void);
  46. int bcd2int (unsigned char b);
  47. /* Save tick handler routine pointer, will point to xtime_update() in
  48. * kernel/time/timekeeping.c, called via mvme16x_process_int() */
  49. static irq_handler_t tick_handler;
  50. unsigned short mvme16x_config;
  51. EXPORT_SYMBOL(mvme16x_config);
  52. int __init mvme16x_parse_bootinfo(const struct bi_record *bi)
  53. {
  54. uint16_t tag = be16_to_cpu(bi->tag);
  55. if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
  56. return 0;
  57. else
  58. return 1;
  59. }
  60. void mvme16x_reset(void)
  61. {
  62. printk ("\r\n\nCalled mvme16x_reset\r\n"
  63. "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
  64. /* The string of returns is to delay the reset until the whole
  65. * message is output. Assert reset bit in GCSR */
  66. *(volatile char *)0xfff40107 = 0x80;
  67. }
  68. static void mvme16x_get_model(char *model)
  69. {
  70. p_bdid p = &mvme_bdid;
  71. char suf[4];
  72. suf[1] = p->brdsuffix[0];
  73. suf[2] = p->brdsuffix[1];
  74. suf[3] = '\0';
  75. suf[0] = suf[1] ? '-' : '\0';
  76. sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf);
  77. }
  78. static void mvme16x_get_hardware_list(struct seq_file *m)
  79. {
  80. uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
  81. if (brdno == 0x0162 || brdno == 0x0172)
  82. {
  83. unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
  84. seq_printf (m, "VMEchip2 %spresent\n",
  85. rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
  86. seq_printf (m, "SCSI interface %spresent\n",
  87. rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
  88. seq_printf (m, "Ethernet i/f %spresent\n",
  89. rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
  90. }
  91. }
  92. /*
  93. * This function is called during kernel startup to initialize
  94. * the mvme16x IRQ handling routines. Should probably ensure
  95. * that the base vectors for the VMEChip2 and PCCChip2 are valid.
  96. */
  97. static void __init mvme16x_init_IRQ (void)
  98. {
  99. m68k_setup_user_interrupt(VEC_USER, 192);
  100. }
  101. #define pcc2chip ((volatile u_char *)0xfff42000)
  102. #define PccSCCMICR 0x1d
  103. #define PccSCCTICR 0x1e
  104. #define PccSCCRICR 0x1f
  105. #define PccTPIACKR 0x25
  106. #ifdef CONFIG_EARLY_PRINTK
  107. /**** cd2401 registers ****/
  108. #define CD2401_ADDR (0xfff45000)
  109. #define CyGFRCR (0x81)
  110. #define CyCCR (0x13)
  111. #define CyCLR_CHAN (0x40)
  112. #define CyINIT_CHAN (0x20)
  113. #define CyCHIP_RESET (0x10)
  114. #define CyENB_XMTR (0x08)
  115. #define CyDIS_XMTR (0x04)
  116. #define CyENB_RCVR (0x02)
  117. #define CyDIS_RCVR (0x01)
  118. #define CyCAR (0xee)
  119. #define CyIER (0x11)
  120. #define CyMdmCh (0x80)
  121. #define CyRxExc (0x20)
  122. #define CyRxData (0x08)
  123. #define CyTxMpty (0x02)
  124. #define CyTxRdy (0x01)
  125. #define CyLICR (0x26)
  126. #define CyRISR (0x89)
  127. #define CyTIMEOUT (0x80)
  128. #define CySPECHAR (0x70)
  129. #define CyOVERRUN (0x08)
  130. #define CyPARITY (0x04)
  131. #define CyFRAME (0x02)
  132. #define CyBREAK (0x01)
  133. #define CyREOIR (0x84)
  134. #define CyTEOIR (0x85)
  135. #define CyMEOIR (0x86)
  136. #define CyNOTRANS (0x08)
  137. #define CyRFOC (0x30)
  138. #define CyRDR (0xf8)
  139. #define CyTDR (0xf8)
  140. #define CyMISR (0x8b)
  141. #define CyRISR (0x89)
  142. #define CyTISR (0x8a)
  143. #define CyMSVR1 (0xde)
  144. #define CyMSVR2 (0xdf)
  145. #define CyDSR (0x80)
  146. #define CyDCD (0x40)
  147. #define CyCTS (0x20)
  148. #define CyDTR (0x02)
  149. #define CyRTS (0x01)
  150. #define CyRTPRL (0x25)
  151. #define CyRTPRH (0x24)
  152. #define CyCOR1 (0x10)
  153. #define CyPARITY_NONE (0x00)
  154. #define CyPARITY_E (0x40)
  155. #define CyPARITY_O (0xC0)
  156. #define Cy_5_BITS (0x04)
  157. #define Cy_6_BITS (0x05)
  158. #define Cy_7_BITS (0x06)
  159. #define Cy_8_BITS (0x07)
  160. #define CyCOR2 (0x17)
  161. #define CyETC (0x20)
  162. #define CyCtsAE (0x02)
  163. #define CyCOR3 (0x16)
  164. #define Cy_1_STOP (0x02)
  165. #define Cy_2_STOP (0x04)
  166. #define CyCOR4 (0x15)
  167. #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
  168. #define CyCOR5 (0x14)
  169. #define CyCOR6 (0x18)
  170. #define CyCOR7 (0x07)
  171. #define CyRBPR (0xcb)
  172. #define CyRCOR (0xc8)
  173. #define CyTBPR (0xc3)
  174. #define CyTCOR (0xc0)
  175. #define CySCHR1 (0x1f)
  176. #define CySCHR2 (0x1e)
  177. #define CyTPR (0xda)
  178. #define CyPILR1 (0xe3)
  179. #define CyPILR2 (0xe0)
  180. #define CyPILR3 (0xe1)
  181. #define CyCMR (0x1b)
  182. #define CyASYNC (0x02)
  183. #define CyLICR (0x26)
  184. #define CyLIVR (0x09)
  185. #define CySCRL (0x23)
  186. #define CySCRH (0x22)
  187. #define CyTFTC (0x80)
  188. void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
  189. {
  190. volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
  191. volatile u_char sink;
  192. u_char ier;
  193. int port;
  194. u_char do_lf = 0;
  195. int i = 0;
  196. /* Ensure transmitter is enabled! */
  197. port = 0;
  198. base_addr[CyCAR] = (u_char)port;
  199. while (base_addr[CyCCR])
  200. ;
  201. base_addr[CyCCR] = CyENB_XMTR;
  202. ier = base_addr[CyIER];
  203. base_addr[CyIER] = CyTxMpty;
  204. while (1) {
  205. if (pcc2chip[PccSCCTICR] & 0x20)
  206. {
  207. /* We have a Tx int. Acknowledge it */
  208. sink = pcc2chip[PccTPIACKR];
  209. if ((base_addr[CyLICR] >> 2) == port) {
  210. if (i == count) {
  211. /* Last char of string is now output */
  212. base_addr[CyTEOIR] = CyNOTRANS;
  213. break;
  214. }
  215. if (do_lf) {
  216. base_addr[CyTDR] = '\n';
  217. str++;
  218. i++;
  219. do_lf = 0;
  220. }
  221. else if (*str == '\n') {
  222. base_addr[CyTDR] = '\r';
  223. do_lf = 1;
  224. }
  225. else {
  226. base_addr[CyTDR] = *str++;
  227. i++;
  228. }
  229. base_addr[CyTEOIR] = 0;
  230. }
  231. else
  232. base_addr[CyTEOIR] = CyNOTRANS;
  233. }
  234. }
  235. base_addr[CyIER] = ier;
  236. }
  237. #endif
  238. void __init config_mvme16x(void)
  239. {
  240. p_bdid p = &mvme_bdid;
  241. char id[40];
  242. uint16_t brdno = be16_to_cpu(p->brdno);
  243. mach_max_dma_address = 0xffffffff;
  244. mach_sched_init = mvme16x_sched_init;
  245. mach_init_IRQ = mvme16x_init_IRQ;
  246. arch_gettimeoffset = mvme16x_gettimeoffset;
  247. mach_hwclk = mvme16x_hwclk;
  248. mach_set_clock_mmss = mvme16x_set_clock_mmss;
  249. mach_reset = mvme16x_reset;
  250. mach_get_model = mvme16x_get_model;
  251. mach_get_hardware_list = mvme16x_get_hardware_list;
  252. /* Report board revision */
  253. if (strncmp("BDID", p->bdid, 4))
  254. {
  255. printk ("\n\nBug call .BRD_ID returned garbage - giving up\n\n");
  256. while (1)
  257. ;
  258. }
  259. /* Board type is only set by newer versions of vmelilo/tftplilo */
  260. if (vme_brdtype == 0)
  261. vme_brdtype = brdno;
  262. mvme16x_get_model(id);
  263. printk ("\nBRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev>>4,
  264. p->rev&0xf, p->yr, p->mth, p->day);
  265. if (brdno == 0x0162 || brdno == 0x172)
  266. {
  267. unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
  268. mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
  269. printk ("MVME%x Hardware status:\n", brdno);
  270. printk (" CPU Type 68%s040\n",
  271. rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
  272. printk (" CPU clock %dMHz\n",
  273. rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
  274. printk (" VMEchip2 %spresent\n",
  275. rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
  276. printk (" SCSI interface %spresent\n",
  277. rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
  278. printk (" Ethernet interface %spresent\n",
  279. rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
  280. }
  281. else
  282. {
  283. mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
  284. }
  285. }
  286. static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
  287. {
  288. unsigned long *new = (unsigned long *)vectors;
  289. unsigned long *old = (unsigned long *)0xffe00000;
  290. volatile unsigned char uc, *ucp;
  291. uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
  292. if (brdno == 0x0162 || brdno == 0x172)
  293. {
  294. ucp = (volatile unsigned char *)0xfff42043;
  295. uc = *ucp | 8;
  296. *ucp = uc;
  297. }
  298. else
  299. {
  300. *(volatile unsigned long *)0xfff40074 = 0x40000000;
  301. }
  302. *(new+4) = *(old+4); /* Illegal instruction */
  303. *(new+9) = *(old+9); /* Trace */
  304. *(new+47) = *(old+47); /* Trap #15 */
  305. if (brdno == 0x0162 || brdno == 0x172)
  306. *(new+0x5e) = *(old+0x5e); /* ABORT switch */
  307. else
  308. *(new+0x6e) = *(old+0x6e); /* ABORT switch */
  309. return IRQ_HANDLED;
  310. }
  311. static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
  312. {
  313. *(volatile unsigned char *)0xfff4201b |= 8;
  314. return tick_handler(irq, dev_id);
  315. }
  316. void mvme16x_sched_init (irq_handler_t timer_routine)
  317. {
  318. uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
  319. int irq;
  320. tick_handler = timer_routine;
  321. /* Using PCCchip2 or MC2 chip tick timer 1 */
  322. *(volatile unsigned long *)0xfff42008 = 0;
  323. *(volatile unsigned long *)0xfff42004 = 10000; /* 10ms */
  324. *(volatile unsigned char *)0xfff42017 |= 3;
  325. *(volatile unsigned char *)0xfff4201b = 0x16;
  326. if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0,
  327. "timer", mvme16x_timer_int))
  328. panic ("Couldn't register timer int");
  329. if (brdno == 0x0162 || brdno == 0x172)
  330. irq = MVME162_IRQ_ABORT;
  331. else
  332. irq = MVME167_IRQ_ABORT;
  333. if (request_irq(irq, mvme16x_abort_int, 0,
  334. "abort", mvme16x_abort_int))
  335. panic ("Couldn't register abort int");
  336. }
  337. /* This is always executed with interrupts disabled. */
  338. u32 mvme16x_gettimeoffset(void)
  339. {
  340. return (*(volatile u32 *)0xfff42008) * 1000;
  341. }
  342. int bcd2int (unsigned char b)
  343. {
  344. return ((b>>4)*10 + (b&15));
  345. }
  346. int mvme16x_hwclk(int op, struct rtc_time *t)
  347. {
  348. #warning check me!
  349. if (!op) {
  350. rtc->ctrl = RTC_READ;
  351. t->tm_year = bcd2int (rtc->bcd_year);
  352. t->tm_mon = bcd2int (rtc->bcd_mth);
  353. t->tm_mday = bcd2int (rtc->bcd_dom);
  354. t->tm_hour = bcd2int (rtc->bcd_hr);
  355. t->tm_min = bcd2int (rtc->bcd_min);
  356. t->tm_sec = bcd2int (rtc->bcd_sec);
  357. rtc->ctrl = 0;
  358. }
  359. return 0;
  360. }
  361. int mvme16x_set_clock_mmss (unsigned long nowtime)
  362. {
  363. return 0;
  364. }