bitops.h 6.6 KB

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  1. /*
  2. * Bit operations for the Hexagon architecture
  3. *
  4. * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 and
  9. * only version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  19. * 02110-1301, USA.
  20. */
  21. #ifndef _ASM_BITOPS_H
  22. #define _ASM_BITOPS_H
  23. #include <linux/compiler.h>
  24. #include <asm/byteorder.h>
  25. #include <asm/atomic.h>
  26. #include <asm/barrier.h>
  27. #ifdef __KERNEL__
  28. /*
  29. * The offset calculations for these are based on BITS_PER_LONG == 32
  30. * (i.e. I get to shift by #5-2 (32 bits per long, 4 bytes per access),
  31. * mask by 0x0000001F)
  32. *
  33. * Typically, R10 is clobbered for address, R11 bit nr, and R12 is temp
  34. */
  35. /**
  36. * test_and_clear_bit - clear a bit and return its old value
  37. * @nr: bit number to clear
  38. * @addr: pointer to memory
  39. */
  40. static inline int test_and_clear_bit(int nr, volatile void *addr)
  41. {
  42. int oldval;
  43. __asm__ __volatile__ (
  44. " {R10 = %1; R11 = asr(%2,#5); }\n"
  45. " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
  46. "1: R12 = memw_locked(R10);\n"
  47. " { P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n"
  48. " memw_locked(R10,P1) = R12;\n"
  49. " {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
  50. : "=&r" (oldval)
  51. : "r" (addr), "r" (nr)
  52. : "r10", "r11", "r12", "p0", "p1", "memory"
  53. );
  54. return oldval;
  55. }
  56. /**
  57. * test_and_set_bit - set a bit and return its old value
  58. * @nr: bit number to set
  59. * @addr: pointer to memory
  60. */
  61. static inline int test_and_set_bit(int nr, volatile void *addr)
  62. {
  63. int oldval;
  64. __asm__ __volatile__ (
  65. " {R10 = %1; R11 = asr(%2,#5); }\n"
  66. " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
  67. "1: R12 = memw_locked(R10);\n"
  68. " { P0 = tstbit(R12,R11); R12 = setbit(R12,R11); }\n"
  69. " memw_locked(R10,P1) = R12;\n"
  70. " {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
  71. : "=&r" (oldval)
  72. : "r" (addr), "r" (nr)
  73. : "r10", "r11", "r12", "p0", "p1", "memory"
  74. );
  75. return oldval;
  76. }
  77. /**
  78. * test_and_change_bit - toggle a bit and return its old value
  79. * @nr: bit number to set
  80. * @addr: pointer to memory
  81. */
  82. static inline int test_and_change_bit(int nr, volatile void *addr)
  83. {
  84. int oldval;
  85. __asm__ __volatile__ (
  86. " {R10 = %1; R11 = asr(%2,#5); }\n"
  87. " {R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
  88. "1: R12 = memw_locked(R10);\n"
  89. " { P0 = tstbit(R12,R11); R12 = togglebit(R12,R11); }\n"
  90. " memw_locked(R10,P1) = R12;\n"
  91. " {if !P1 jump 1b; %0 = mux(P0,#1,#0);}\n"
  92. : "=&r" (oldval)
  93. : "r" (addr), "r" (nr)
  94. : "r10", "r11", "r12", "p0", "p1", "memory"
  95. );
  96. return oldval;
  97. }
  98. /*
  99. * Atomic, but doesn't care about the return value.
  100. * Rewrite later to save a cycle or two.
  101. */
  102. static inline void clear_bit(int nr, volatile void *addr)
  103. {
  104. test_and_clear_bit(nr, addr);
  105. }
  106. static inline void set_bit(int nr, volatile void *addr)
  107. {
  108. test_and_set_bit(nr, addr);
  109. }
  110. static inline void change_bit(int nr, volatile void *addr)
  111. {
  112. test_and_change_bit(nr, addr);
  113. }
  114. /*
  115. * These are allowed to be non-atomic. In fact the generic flavors are
  116. * in non-atomic.h. Would it be better to use intrinsics for this?
  117. *
  118. * OK, writes in our architecture do not invalidate LL/SC, so this has to
  119. * be atomic, particularly for things like slab_lock and slab_unlock.
  120. *
  121. */
  122. static inline void __clear_bit(int nr, volatile unsigned long *addr)
  123. {
  124. test_and_clear_bit(nr, addr);
  125. }
  126. static inline void __set_bit(int nr, volatile unsigned long *addr)
  127. {
  128. test_and_set_bit(nr, addr);
  129. }
  130. static inline void __change_bit(int nr, volatile unsigned long *addr)
  131. {
  132. test_and_change_bit(nr, addr);
  133. }
  134. /* Apparently, at least some of these are allowed to be non-atomic */
  135. static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
  136. {
  137. return test_and_clear_bit(nr, addr);
  138. }
  139. static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
  140. {
  141. return test_and_set_bit(nr, addr);
  142. }
  143. static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
  144. {
  145. return test_and_change_bit(nr, addr);
  146. }
  147. static inline int __test_bit(int nr, const volatile unsigned long *addr)
  148. {
  149. int retval;
  150. asm volatile(
  151. "{P0 = tstbit(%1,%2); if (P0.new) %0 = #1; if (!P0.new) %0 = #0;}\n"
  152. : "=&r" (retval)
  153. : "r" (addr[BIT_WORD(nr)]), "r" (nr % BITS_PER_LONG)
  154. : "p0"
  155. );
  156. return retval;
  157. }
  158. #define test_bit(nr, addr) __test_bit(nr, addr)
  159. /*
  160. * ffz - find first zero in word.
  161. * @word: The word to search
  162. *
  163. * Undefined if no zero exists, so code should check against ~0UL first.
  164. */
  165. static inline long ffz(int x)
  166. {
  167. int r;
  168. asm("%0 = ct1(%1);\n"
  169. : "=&r" (r)
  170. : "r" (x));
  171. return r;
  172. }
  173. /*
  174. * fls - find last (most-significant) bit set
  175. * @x: the word to search
  176. *
  177. * This is defined the same way as ffs.
  178. * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
  179. */
  180. static inline long fls(int x)
  181. {
  182. int r;
  183. asm("{ %0 = cl0(%1);}\n"
  184. "%0 = sub(#32,%0);\n"
  185. : "=&r" (r)
  186. : "r" (x)
  187. : "p0");
  188. return r;
  189. }
  190. /*
  191. * ffs - find first bit set
  192. * @x: the word to search
  193. *
  194. * This is defined the same way as
  195. * the libc and compiler builtin ffs routines, therefore
  196. * differs in spirit from the above ffz (man ffs).
  197. */
  198. static inline long ffs(int x)
  199. {
  200. int r;
  201. asm("{ P0 = cmp.eq(%1,#0); %0 = ct0(%1);}\n"
  202. "{ if P0 %0 = #0; if !P0 %0 = add(%0,#1);}\n"
  203. : "=&r" (r)
  204. : "r" (x)
  205. : "p0");
  206. return r;
  207. }
  208. /*
  209. * __ffs - find first bit in word.
  210. * @word: The word to search
  211. *
  212. * Undefined if no bit exists, so code should check against 0 first.
  213. *
  214. * bits_per_long assumed to be 32
  215. * numbering starts at 0 I think (instead of 1 like ffs)
  216. */
  217. static inline unsigned long __ffs(unsigned long word)
  218. {
  219. int num;
  220. asm("%0 = ct0(%1);\n"
  221. : "=&r" (num)
  222. : "r" (word));
  223. return num;
  224. }
  225. /*
  226. * __fls - find last (most-significant) set bit in a long word
  227. * @word: the word to search
  228. *
  229. * Undefined if no set bit exists, so code should check against 0 first.
  230. * bits_per_long assumed to be 32
  231. */
  232. static inline unsigned long __fls(unsigned long word)
  233. {
  234. int num;
  235. asm("%0 = cl0(%1);\n"
  236. "%0 = sub(#31,%0);\n"
  237. : "=&r" (num)
  238. : "r" (word));
  239. return num;
  240. }
  241. #include <asm-generic/bitops/lock.h>
  242. #include <asm-generic/bitops/find.h>
  243. #include <asm-generic/bitops/fls64.h>
  244. #include <asm-generic/bitops/sched.h>
  245. #include <asm-generic/bitops/hweight.h>
  246. #include <asm-generic/bitops/le.h>
  247. #include <asm-generic/bitops/ext2-atomic.h>
  248. #endif /* __KERNEL__ */
  249. #endif