marb_foo_defs.h 19 KB

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  1. #ifndef __marb_foo_defs_h
  2. #define __marb_foo_defs_h
  3. /*
  4. * This file is autogenerated from
  5. * file: marb_foo.r
  6. *
  7. * by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r
  8. * Any changes here will be lost.
  9. *
  10. * -*- buffer-read-only: t -*-
  11. */
  12. /* Main access macros */
  13. #ifndef REG_RD
  14. #define REG_RD( scope, inst, reg ) \
  15. REG_READ( reg_##scope##_##reg, \
  16. (inst) + REG_RD_ADDR_##scope##_##reg )
  17. #endif
  18. #ifndef REG_WR
  19. #define REG_WR( scope, inst, reg, val ) \
  20. REG_WRITE( reg_##scope##_##reg, \
  21. (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  22. #endif
  23. #ifndef REG_RD_VECT
  24. #define REG_RD_VECT( scope, inst, reg, index ) \
  25. REG_READ( reg_##scope##_##reg, \
  26. (inst) + REG_RD_ADDR_##scope##_##reg + \
  27. (index) * STRIDE_##scope##_##reg )
  28. #endif
  29. #ifndef REG_WR_VECT
  30. #define REG_WR_VECT( scope, inst, reg, index, val ) \
  31. REG_WRITE( reg_##scope##_##reg, \
  32. (inst) + REG_WR_ADDR_##scope##_##reg + \
  33. (index) * STRIDE_##scope##_##reg, (val) )
  34. #endif
  35. #ifndef REG_RD_INT
  36. #define REG_RD_INT( scope, inst, reg ) \
  37. REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  38. #endif
  39. #ifndef REG_WR_INT
  40. #define REG_WR_INT( scope, inst, reg, val ) \
  41. REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  42. #endif
  43. #ifndef REG_RD_INT_VECT
  44. #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  45. REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  46. (index) * STRIDE_##scope##_##reg )
  47. #endif
  48. #ifndef REG_WR_INT_VECT
  49. #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  50. REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  51. (index) * STRIDE_##scope##_##reg, (val) )
  52. #endif
  53. #ifndef REG_TYPE_CONV
  54. #define REG_TYPE_CONV( type, orgtype, val ) \
  55. ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  56. #endif
  57. #ifndef reg_page_size
  58. #define reg_page_size 8192
  59. #endif
  60. #ifndef REG_ADDR
  61. #define REG_ADDR( scope, inst, reg ) \
  62. ( (inst) + REG_RD_ADDR_##scope##_##reg )
  63. #endif
  64. #ifndef REG_ADDR_VECT
  65. #define REG_ADDR_VECT( scope, inst, reg, index ) \
  66. ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  67. (index) * STRIDE_##scope##_##reg )
  68. #endif
  69. /* C-code for register scope marb_foo */
  70. #define STRIDE_marb_foo_rw_intm_slots 4
  71. /* Register rw_intm_slots, scope marb_foo, type rw */
  72. typedef struct {
  73. unsigned int owner : 4;
  74. unsigned int dummy1 : 28;
  75. } reg_marb_foo_rw_intm_slots;
  76. #define REG_RD_ADDR_marb_foo_rw_intm_slots 0
  77. #define REG_WR_ADDR_marb_foo_rw_intm_slots 0
  78. #define STRIDE_marb_foo_rw_l2_slots 4
  79. /* Register rw_l2_slots, scope marb_foo, type rw */
  80. typedef struct {
  81. unsigned int owner : 4;
  82. unsigned int dummy1 : 28;
  83. } reg_marb_foo_rw_l2_slots;
  84. #define REG_RD_ADDR_marb_foo_rw_l2_slots 256
  85. #define REG_WR_ADDR_marb_foo_rw_l2_slots 256
  86. #define STRIDE_marb_foo_rw_regs_slots 4
  87. /* Register rw_regs_slots, scope marb_foo, type rw */
  88. typedef struct {
  89. unsigned int owner : 4;
  90. unsigned int dummy1 : 28;
  91. } reg_marb_foo_rw_regs_slots;
  92. #define REG_RD_ADDR_marb_foo_rw_regs_slots 512
  93. #define REG_WR_ADDR_marb_foo_rw_regs_slots 512
  94. /* Register rw_sclr_burst, scope marb_foo, type rw */
  95. typedef struct {
  96. unsigned int intm_bsize : 2;
  97. unsigned int l2_bsize : 2;
  98. unsigned int dummy1 : 28;
  99. } reg_marb_foo_rw_sclr_burst;
  100. #define REG_RD_ADDR_marb_foo_rw_sclr_burst 528
  101. #define REG_WR_ADDR_marb_foo_rw_sclr_burst 528
  102. /* Register rw_dma0_burst, scope marb_foo, type rw */
  103. typedef struct {
  104. unsigned int intm_bsize : 2;
  105. unsigned int l2_bsize : 2;
  106. unsigned int dummy1 : 28;
  107. } reg_marb_foo_rw_dma0_burst;
  108. #define REG_RD_ADDR_marb_foo_rw_dma0_burst 532
  109. #define REG_WR_ADDR_marb_foo_rw_dma0_burst 532
  110. /* Register rw_dma1_burst, scope marb_foo, type rw */
  111. typedef struct {
  112. unsigned int intm_bsize : 2;
  113. unsigned int l2_bsize : 2;
  114. unsigned int dummy1 : 28;
  115. } reg_marb_foo_rw_dma1_burst;
  116. #define REG_RD_ADDR_marb_foo_rw_dma1_burst 536
  117. #define REG_WR_ADDR_marb_foo_rw_dma1_burst 536
  118. /* Register rw_dma2_burst, scope marb_foo, type rw */
  119. typedef struct {
  120. unsigned int intm_bsize : 2;
  121. unsigned int l2_bsize : 2;
  122. unsigned int dummy1 : 28;
  123. } reg_marb_foo_rw_dma2_burst;
  124. #define REG_RD_ADDR_marb_foo_rw_dma2_burst 540
  125. #define REG_WR_ADDR_marb_foo_rw_dma2_burst 540
  126. /* Register rw_dma3_burst, scope marb_foo, type rw */
  127. typedef struct {
  128. unsigned int intm_bsize : 2;
  129. unsigned int l2_bsize : 2;
  130. unsigned int dummy1 : 28;
  131. } reg_marb_foo_rw_dma3_burst;
  132. #define REG_RD_ADDR_marb_foo_rw_dma3_burst 544
  133. #define REG_WR_ADDR_marb_foo_rw_dma3_burst 544
  134. /* Register rw_dma4_burst, scope marb_foo, type rw */
  135. typedef struct {
  136. unsigned int intm_bsize : 2;
  137. unsigned int l2_bsize : 2;
  138. unsigned int dummy1 : 28;
  139. } reg_marb_foo_rw_dma4_burst;
  140. #define REG_RD_ADDR_marb_foo_rw_dma4_burst 548
  141. #define REG_WR_ADDR_marb_foo_rw_dma4_burst 548
  142. /* Register rw_dma5_burst, scope marb_foo, type rw */
  143. typedef struct {
  144. unsigned int intm_bsize : 2;
  145. unsigned int l2_bsize : 2;
  146. unsigned int dummy1 : 28;
  147. } reg_marb_foo_rw_dma5_burst;
  148. #define REG_RD_ADDR_marb_foo_rw_dma5_burst 552
  149. #define REG_WR_ADDR_marb_foo_rw_dma5_burst 552
  150. /* Register rw_dma6_burst, scope marb_foo, type rw */
  151. typedef struct {
  152. unsigned int intm_bsize : 2;
  153. unsigned int l2_bsize : 2;
  154. unsigned int dummy1 : 28;
  155. } reg_marb_foo_rw_dma6_burst;
  156. #define REG_RD_ADDR_marb_foo_rw_dma6_burst 556
  157. #define REG_WR_ADDR_marb_foo_rw_dma6_burst 556
  158. /* Register rw_dma7_burst, scope marb_foo, type rw */
  159. typedef struct {
  160. unsigned int intm_bsize : 2;
  161. unsigned int l2_bsize : 2;
  162. unsigned int dummy1 : 28;
  163. } reg_marb_foo_rw_dma7_burst;
  164. #define REG_RD_ADDR_marb_foo_rw_dma7_burst 560
  165. #define REG_WR_ADDR_marb_foo_rw_dma7_burst 560
  166. /* Register rw_dma9_burst, scope marb_foo, type rw */
  167. typedef struct {
  168. unsigned int intm_bsize : 2;
  169. unsigned int l2_bsize : 2;
  170. unsigned int dummy1 : 28;
  171. } reg_marb_foo_rw_dma9_burst;
  172. #define REG_RD_ADDR_marb_foo_rw_dma9_burst 564
  173. #define REG_WR_ADDR_marb_foo_rw_dma9_burst 564
  174. /* Register rw_dma11_burst, scope marb_foo, type rw */
  175. typedef struct {
  176. unsigned int intm_bsize : 2;
  177. unsigned int l2_bsize : 2;
  178. unsigned int dummy1 : 28;
  179. } reg_marb_foo_rw_dma11_burst;
  180. #define REG_RD_ADDR_marb_foo_rw_dma11_burst 568
  181. #define REG_WR_ADDR_marb_foo_rw_dma11_burst 568
  182. /* Register rw_cpui_burst, scope marb_foo, type rw */
  183. typedef struct {
  184. unsigned int intm_bsize : 2;
  185. unsigned int l2_bsize : 2;
  186. unsigned int dummy1 : 28;
  187. } reg_marb_foo_rw_cpui_burst;
  188. #define REG_RD_ADDR_marb_foo_rw_cpui_burst 572
  189. #define REG_WR_ADDR_marb_foo_rw_cpui_burst 572
  190. /* Register rw_cpud_burst, scope marb_foo, type rw */
  191. typedef struct {
  192. unsigned int intm_bsize : 2;
  193. unsigned int l2_bsize : 2;
  194. unsigned int dummy1 : 28;
  195. } reg_marb_foo_rw_cpud_burst;
  196. #define REG_RD_ADDR_marb_foo_rw_cpud_burst 576
  197. #define REG_WR_ADDR_marb_foo_rw_cpud_burst 576
  198. /* Register rw_iop_burst, scope marb_foo, type rw */
  199. typedef struct {
  200. unsigned int intm_bsize : 2;
  201. unsigned int l2_bsize : 2;
  202. unsigned int dummy1 : 28;
  203. } reg_marb_foo_rw_iop_burst;
  204. #define REG_RD_ADDR_marb_foo_rw_iop_burst 580
  205. #define REG_WR_ADDR_marb_foo_rw_iop_burst 580
  206. /* Register rw_ccdstat_burst, scope marb_foo, type rw */
  207. typedef struct {
  208. unsigned int intm_bsize : 2;
  209. unsigned int l2_bsize : 2;
  210. unsigned int dummy1 : 28;
  211. } reg_marb_foo_rw_ccdstat_burst;
  212. #define REG_RD_ADDR_marb_foo_rw_ccdstat_burst 584
  213. #define REG_WR_ADDR_marb_foo_rw_ccdstat_burst 584
  214. /* Register rw_intr_mask, scope marb_foo, type rw */
  215. typedef struct {
  216. unsigned int bp0 : 1;
  217. unsigned int bp1 : 1;
  218. unsigned int bp2 : 1;
  219. unsigned int bp3 : 1;
  220. unsigned int dummy1 : 28;
  221. } reg_marb_foo_rw_intr_mask;
  222. #define REG_RD_ADDR_marb_foo_rw_intr_mask 588
  223. #define REG_WR_ADDR_marb_foo_rw_intr_mask 588
  224. /* Register rw_ack_intr, scope marb_foo, type rw */
  225. typedef struct {
  226. unsigned int bp0 : 1;
  227. unsigned int bp1 : 1;
  228. unsigned int bp2 : 1;
  229. unsigned int bp3 : 1;
  230. unsigned int dummy1 : 28;
  231. } reg_marb_foo_rw_ack_intr;
  232. #define REG_RD_ADDR_marb_foo_rw_ack_intr 592
  233. #define REG_WR_ADDR_marb_foo_rw_ack_intr 592
  234. /* Register r_intr, scope marb_foo, type r */
  235. typedef struct {
  236. unsigned int bp0 : 1;
  237. unsigned int bp1 : 1;
  238. unsigned int bp2 : 1;
  239. unsigned int bp3 : 1;
  240. unsigned int dummy1 : 28;
  241. } reg_marb_foo_r_intr;
  242. #define REG_RD_ADDR_marb_foo_r_intr 596
  243. /* Register r_masked_intr, scope marb_foo, type r */
  244. typedef struct {
  245. unsigned int bp0 : 1;
  246. unsigned int bp1 : 1;
  247. unsigned int bp2 : 1;
  248. unsigned int bp3 : 1;
  249. unsigned int dummy1 : 28;
  250. } reg_marb_foo_r_masked_intr;
  251. #define REG_RD_ADDR_marb_foo_r_masked_intr 600
  252. /* Register rw_stop_mask, scope marb_foo, type rw */
  253. typedef struct {
  254. unsigned int sclr : 1;
  255. unsigned int dma0 : 1;
  256. unsigned int dma1 : 1;
  257. unsigned int dma2 : 1;
  258. unsigned int dma3 : 1;
  259. unsigned int dma4 : 1;
  260. unsigned int dma5 : 1;
  261. unsigned int dma6 : 1;
  262. unsigned int dma7 : 1;
  263. unsigned int dma9 : 1;
  264. unsigned int dma11 : 1;
  265. unsigned int cpui : 1;
  266. unsigned int cpud : 1;
  267. unsigned int iop : 1;
  268. unsigned int ccdstat : 1;
  269. unsigned int dummy1 : 17;
  270. } reg_marb_foo_rw_stop_mask;
  271. #define REG_RD_ADDR_marb_foo_rw_stop_mask 604
  272. #define REG_WR_ADDR_marb_foo_rw_stop_mask 604
  273. /* Register r_stopped, scope marb_foo, type r */
  274. typedef struct {
  275. unsigned int sclr : 1;
  276. unsigned int dma0 : 1;
  277. unsigned int dma1 : 1;
  278. unsigned int dma2 : 1;
  279. unsigned int dma3 : 1;
  280. unsigned int dma4 : 1;
  281. unsigned int dma5 : 1;
  282. unsigned int dma6 : 1;
  283. unsigned int dma7 : 1;
  284. unsigned int dma9 : 1;
  285. unsigned int dma11 : 1;
  286. unsigned int cpui : 1;
  287. unsigned int cpud : 1;
  288. unsigned int iop : 1;
  289. unsigned int ccdstat : 1;
  290. unsigned int dummy1 : 17;
  291. } reg_marb_foo_r_stopped;
  292. #define REG_RD_ADDR_marb_foo_r_stopped 608
  293. /* Register rw_no_snoop, scope marb_foo, type rw */
  294. typedef struct {
  295. unsigned int sclr : 1;
  296. unsigned int dma0 : 1;
  297. unsigned int dma1 : 1;
  298. unsigned int dma2 : 1;
  299. unsigned int dma3 : 1;
  300. unsigned int dma4 : 1;
  301. unsigned int dma5 : 1;
  302. unsigned int dma6 : 1;
  303. unsigned int dma7 : 1;
  304. unsigned int dma9 : 1;
  305. unsigned int dma11 : 1;
  306. unsigned int cpui : 1;
  307. unsigned int cpud : 1;
  308. unsigned int iop : 1;
  309. unsigned int ccdstat : 1;
  310. unsigned int dummy1 : 17;
  311. } reg_marb_foo_rw_no_snoop;
  312. #define REG_RD_ADDR_marb_foo_rw_no_snoop 896
  313. #define REG_WR_ADDR_marb_foo_rw_no_snoop 896
  314. /* Register rw_no_snoop_rq, scope marb_foo, type rw */
  315. typedef struct {
  316. unsigned int dummy1 : 11;
  317. unsigned int cpui : 1;
  318. unsigned int cpud : 1;
  319. unsigned int dummy2 : 19;
  320. } reg_marb_foo_rw_no_snoop_rq;
  321. #define REG_RD_ADDR_marb_foo_rw_no_snoop_rq 900
  322. #define REG_WR_ADDR_marb_foo_rw_no_snoop_rq 900
  323. /* Constants */
  324. enum {
  325. regk_marb_foo_ccdstat = 0x0000000e,
  326. regk_marb_foo_cpud = 0x0000000c,
  327. regk_marb_foo_cpui = 0x0000000b,
  328. regk_marb_foo_dma0 = 0x00000001,
  329. regk_marb_foo_dma1 = 0x00000002,
  330. regk_marb_foo_dma11 = 0x0000000a,
  331. regk_marb_foo_dma2 = 0x00000003,
  332. regk_marb_foo_dma3 = 0x00000004,
  333. regk_marb_foo_dma4 = 0x00000005,
  334. regk_marb_foo_dma5 = 0x00000006,
  335. regk_marb_foo_dma6 = 0x00000007,
  336. regk_marb_foo_dma7 = 0x00000008,
  337. regk_marb_foo_dma9 = 0x00000009,
  338. regk_marb_foo_iop = 0x0000000d,
  339. regk_marb_foo_no = 0x00000000,
  340. regk_marb_foo_r_stopped_default = 0x00000000,
  341. regk_marb_foo_rw_ccdstat_burst_default = 0x00000000,
  342. regk_marb_foo_rw_cpud_burst_default = 0x00000000,
  343. regk_marb_foo_rw_cpui_burst_default = 0x00000000,
  344. regk_marb_foo_rw_dma0_burst_default = 0x00000000,
  345. regk_marb_foo_rw_dma11_burst_default = 0x00000000,
  346. regk_marb_foo_rw_dma1_burst_default = 0x00000000,
  347. regk_marb_foo_rw_dma2_burst_default = 0x00000000,
  348. regk_marb_foo_rw_dma3_burst_default = 0x00000000,
  349. regk_marb_foo_rw_dma4_burst_default = 0x00000000,
  350. regk_marb_foo_rw_dma5_burst_default = 0x00000000,
  351. regk_marb_foo_rw_dma6_burst_default = 0x00000000,
  352. regk_marb_foo_rw_dma7_burst_default = 0x00000000,
  353. regk_marb_foo_rw_dma9_burst_default = 0x00000000,
  354. regk_marb_foo_rw_intm_slots_default = 0x00000000,
  355. regk_marb_foo_rw_intm_slots_size = 0x00000040,
  356. regk_marb_foo_rw_intr_mask_default = 0x00000000,
  357. regk_marb_foo_rw_iop_burst_default = 0x00000000,
  358. regk_marb_foo_rw_l2_slots_default = 0x00000000,
  359. regk_marb_foo_rw_l2_slots_size = 0x00000040,
  360. regk_marb_foo_rw_no_snoop_default = 0x00000000,
  361. regk_marb_foo_rw_no_snoop_rq_default = 0x00000000,
  362. regk_marb_foo_rw_regs_slots_default = 0x00000000,
  363. regk_marb_foo_rw_regs_slots_size = 0x00000004,
  364. regk_marb_foo_rw_sclr_burst_default = 0x00000000,
  365. regk_marb_foo_rw_stop_mask_default = 0x00000000,
  366. regk_marb_foo_sclr = 0x00000000,
  367. regk_marb_foo_yes = 0x00000001
  368. };
  369. #endif /* __marb_foo_defs_h */
  370. #ifndef __marb_foo_bp_defs_h
  371. #define __marb_foo_bp_defs_h
  372. /*
  373. * This file is autogenerated from
  374. * file: marb_foo.r
  375. *
  376. * by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r
  377. * Any changes here will be lost.
  378. *
  379. * -*- buffer-read-only: t -*-
  380. */
  381. /* Main access macros */
  382. #ifndef REG_RD
  383. #define REG_RD( scope, inst, reg ) \
  384. REG_READ( reg_##scope##_##reg, \
  385. (inst) + REG_RD_ADDR_##scope##_##reg )
  386. #endif
  387. #ifndef REG_WR
  388. #define REG_WR( scope, inst, reg, val ) \
  389. REG_WRITE( reg_##scope##_##reg, \
  390. (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  391. #endif
  392. #ifndef REG_RD_VECT
  393. #define REG_RD_VECT( scope, inst, reg, index ) \
  394. REG_READ( reg_##scope##_##reg, \
  395. (inst) + REG_RD_ADDR_##scope##_##reg + \
  396. (index) * STRIDE_##scope##_##reg )
  397. #endif
  398. #ifndef REG_WR_VECT
  399. #define REG_WR_VECT( scope, inst, reg, index, val ) \
  400. REG_WRITE( reg_##scope##_##reg, \
  401. (inst) + REG_WR_ADDR_##scope##_##reg + \
  402. (index) * STRIDE_##scope##_##reg, (val) )
  403. #endif
  404. #ifndef REG_RD_INT
  405. #define REG_RD_INT( scope, inst, reg ) \
  406. REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  407. #endif
  408. #ifndef REG_WR_INT
  409. #define REG_WR_INT( scope, inst, reg, val ) \
  410. REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  411. #endif
  412. #ifndef REG_RD_INT_VECT
  413. #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  414. REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  415. (index) * STRIDE_##scope##_##reg )
  416. #endif
  417. #ifndef REG_WR_INT_VECT
  418. #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  419. REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  420. (index) * STRIDE_##scope##_##reg, (val) )
  421. #endif
  422. #ifndef REG_TYPE_CONV
  423. #define REG_TYPE_CONV( type, orgtype, val ) \
  424. ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  425. #endif
  426. #ifndef reg_page_size
  427. #define reg_page_size 8192
  428. #endif
  429. #ifndef REG_ADDR
  430. #define REG_ADDR( scope, inst, reg ) \
  431. ( (inst) + REG_RD_ADDR_##scope##_##reg )
  432. #endif
  433. #ifndef REG_ADDR_VECT
  434. #define REG_ADDR_VECT( scope, inst, reg, index ) \
  435. ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  436. (index) * STRIDE_##scope##_##reg )
  437. #endif
  438. /* C-code for register scope marb_foo_bp */
  439. /* Register rw_first_addr, scope marb_foo_bp, type rw */
  440. typedef unsigned int reg_marb_foo_bp_rw_first_addr;
  441. #define REG_RD_ADDR_marb_foo_bp_rw_first_addr 0
  442. #define REG_WR_ADDR_marb_foo_bp_rw_first_addr 0
  443. /* Register rw_last_addr, scope marb_foo_bp, type rw */
  444. typedef unsigned int reg_marb_foo_bp_rw_last_addr;
  445. #define REG_RD_ADDR_marb_foo_bp_rw_last_addr 4
  446. #define REG_WR_ADDR_marb_foo_bp_rw_last_addr 4
  447. /* Register rw_op, scope marb_foo_bp, type rw */
  448. typedef struct {
  449. unsigned int rd : 1;
  450. unsigned int wr : 1;
  451. unsigned int rd_excl : 1;
  452. unsigned int pri_wr : 1;
  453. unsigned int us_rd : 1;
  454. unsigned int us_wr : 1;
  455. unsigned int us_rd_excl : 1;
  456. unsigned int us_pri_wr : 1;
  457. unsigned int dummy1 : 24;
  458. } reg_marb_foo_bp_rw_op;
  459. #define REG_RD_ADDR_marb_foo_bp_rw_op 8
  460. #define REG_WR_ADDR_marb_foo_bp_rw_op 8
  461. /* Register rw_clients, scope marb_foo_bp, type rw */
  462. typedef struct {
  463. unsigned int sclr : 1;
  464. unsigned int dma0 : 1;
  465. unsigned int dma1 : 1;
  466. unsigned int dma2 : 1;
  467. unsigned int dma3 : 1;
  468. unsigned int dma4 : 1;
  469. unsigned int dma5 : 1;
  470. unsigned int dma6 : 1;
  471. unsigned int dma7 : 1;
  472. unsigned int dma9 : 1;
  473. unsigned int dma11 : 1;
  474. unsigned int cpui : 1;
  475. unsigned int cpud : 1;
  476. unsigned int iop : 1;
  477. unsigned int ccdstat : 1;
  478. unsigned int dummy1 : 17;
  479. } reg_marb_foo_bp_rw_clients;
  480. #define REG_RD_ADDR_marb_foo_bp_rw_clients 12
  481. #define REG_WR_ADDR_marb_foo_bp_rw_clients 12
  482. /* Register rw_options, scope marb_foo_bp, type rw */
  483. typedef struct {
  484. unsigned int wrap : 1;
  485. unsigned int dummy1 : 31;
  486. } reg_marb_foo_bp_rw_options;
  487. #define REG_RD_ADDR_marb_foo_bp_rw_options 16
  488. #define REG_WR_ADDR_marb_foo_bp_rw_options 16
  489. /* Register r_brk_addr, scope marb_foo_bp, type r */
  490. typedef unsigned int reg_marb_foo_bp_r_brk_addr;
  491. #define REG_RD_ADDR_marb_foo_bp_r_brk_addr 20
  492. /* Register r_brk_op, scope marb_foo_bp, type r */
  493. typedef struct {
  494. unsigned int rd : 1;
  495. unsigned int wr : 1;
  496. unsigned int rd_excl : 1;
  497. unsigned int pri_wr : 1;
  498. unsigned int us_rd : 1;
  499. unsigned int us_wr : 1;
  500. unsigned int us_rd_excl : 1;
  501. unsigned int us_pri_wr : 1;
  502. unsigned int dummy1 : 24;
  503. } reg_marb_foo_bp_r_brk_op;
  504. #define REG_RD_ADDR_marb_foo_bp_r_brk_op 24
  505. /* Register r_brk_clients, scope marb_foo_bp, type r */
  506. typedef struct {
  507. unsigned int sclr : 1;
  508. unsigned int dma0 : 1;
  509. unsigned int dma1 : 1;
  510. unsigned int dma2 : 1;
  511. unsigned int dma3 : 1;
  512. unsigned int dma4 : 1;
  513. unsigned int dma5 : 1;
  514. unsigned int dma6 : 1;
  515. unsigned int dma7 : 1;
  516. unsigned int dma9 : 1;
  517. unsigned int dma11 : 1;
  518. unsigned int cpui : 1;
  519. unsigned int cpud : 1;
  520. unsigned int iop : 1;
  521. unsigned int ccdstat : 1;
  522. unsigned int dummy1 : 17;
  523. } reg_marb_foo_bp_r_brk_clients;
  524. #define REG_RD_ADDR_marb_foo_bp_r_brk_clients 28
  525. /* Register r_brk_first_client, scope marb_foo_bp, type r */
  526. typedef struct {
  527. unsigned int sclr : 1;
  528. unsigned int dma0 : 1;
  529. unsigned int dma1 : 1;
  530. unsigned int dma2 : 1;
  531. unsigned int dma3 : 1;
  532. unsigned int dma4 : 1;
  533. unsigned int dma5 : 1;
  534. unsigned int dma6 : 1;
  535. unsigned int dma7 : 1;
  536. unsigned int dma9 : 1;
  537. unsigned int dma11 : 1;
  538. unsigned int cpui : 1;
  539. unsigned int cpud : 1;
  540. unsigned int iop : 1;
  541. unsigned int ccdstat : 1;
  542. unsigned int dummy1 : 17;
  543. } reg_marb_foo_bp_r_brk_first_client;
  544. #define REG_RD_ADDR_marb_foo_bp_r_brk_first_client 32
  545. /* Register r_brk_size, scope marb_foo_bp, type r */
  546. typedef unsigned int reg_marb_foo_bp_r_brk_size;
  547. #define REG_RD_ADDR_marb_foo_bp_r_brk_size 36
  548. /* Register rw_ack, scope marb_foo_bp, type rw */
  549. typedef unsigned int reg_marb_foo_bp_rw_ack;
  550. #define REG_RD_ADDR_marb_foo_bp_rw_ack 40
  551. #define REG_WR_ADDR_marb_foo_bp_rw_ack 40
  552. /* Constants */
  553. enum {
  554. regk_marb_foo_bp_no = 0x00000000,
  555. regk_marb_foo_bp_rw_op_default = 0x00000000,
  556. regk_marb_foo_bp_rw_options_default = 0x00000000,
  557. regk_marb_foo_bp_yes = 0x00000001
  558. };
  559. #endif /* __marb_foo_bp_defs_h */