irqchip.c 3.2 KB

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  1. /*
  2. * Copyright 2005-2009 Analog Devices Inc.
  3. *
  4. * Licensed under the GPL-2 or later
  5. */
  6. #include <linux/kernel_stat.h>
  7. #include <linux/module.h>
  8. #include <linux/random.h>
  9. #include <linux/seq_file.h>
  10. #include <linux/kallsyms.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/irq.h>
  13. #include <linux/seq_file.h>
  14. #include <asm/irq_handler.h>
  15. #include <asm/trace.h>
  16. #include <asm/pda.h>
  17. static atomic_t irq_err_count;
  18. void ack_bad_irq(unsigned int irq)
  19. {
  20. atomic_inc(&irq_err_count);
  21. printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq);
  22. }
  23. static struct irq_desc bad_irq_desc = {
  24. .handle_irq = handle_bad_irq,
  25. .lock = __RAW_SPIN_LOCK_UNLOCKED(bad_irq_desc.lock),
  26. };
  27. #ifdef CONFIG_CPUMASK_OFFSTACK
  28. /* We are not allocating a variable-sized bad_irq_desc.affinity */
  29. #error "Blackfin architecture does not support CONFIG_CPUMASK_OFFSTACK."
  30. #endif
  31. #ifdef CONFIG_PROC_FS
  32. int arch_show_interrupts(struct seq_file *p, int prec)
  33. {
  34. int j;
  35. seq_printf(p, "%*s: ", prec, "NMI");
  36. for_each_online_cpu(j)
  37. seq_printf(p, "%10u ", cpu_pda[j].__nmi_count);
  38. seq_printf(p, " CORE Non Maskable Interrupt\n");
  39. seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
  40. return 0;
  41. }
  42. #endif
  43. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  44. static void check_stack_overflow(int irq)
  45. {
  46. /* Debugging check for stack overflow: is there less than STACK_WARN free? */
  47. long sp = __get_SP() & (THREAD_SIZE - 1);
  48. if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) {
  49. dump_stack();
  50. pr_emerg("irq%i: possible stack overflow only %ld bytes free\n",
  51. irq, sp - sizeof(struct thread_info));
  52. }
  53. }
  54. #else
  55. static inline void check_stack_overflow(int irq) { }
  56. #endif
  57. #ifndef CONFIG_IPIPE
  58. static void maybe_lower_to_irq14(void)
  59. {
  60. unsigned short pending, other_ints;
  61. /*
  62. * If we're the only interrupt running (ignoring IRQ15 which
  63. * is for syscalls), lower our priority to IRQ14 so that
  64. * softirqs run at that level. If there's another,
  65. * lower-level interrupt, irq_exit will defer softirqs to
  66. * that. If the interrupt pipeline is enabled, we are already
  67. * running at IRQ14 priority, so we don't need this code.
  68. */
  69. CSYNC();
  70. pending = bfin_read_IPEND() & ~0x8000;
  71. other_ints = pending & (pending - 1);
  72. if (other_ints == 0)
  73. lower_to_irq14();
  74. }
  75. #else
  76. static inline void maybe_lower_to_irq14(void) { }
  77. #endif
  78. /*
  79. * do_IRQ handles all hardware IRQs. Decoded IRQs should not
  80. * come via this function. Instead, they should provide their
  81. * own 'handler'
  82. */
  83. #ifdef CONFIG_DO_IRQ_L1
  84. __attribute__((l1_text))
  85. #endif
  86. asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
  87. {
  88. struct pt_regs *old_regs = set_irq_regs(regs);
  89. irq_enter();
  90. check_stack_overflow(irq);
  91. /*
  92. * Some hardware gives randomly wrong interrupts. Rather
  93. * than crashing, do something sensible.
  94. */
  95. if (irq >= NR_IRQS)
  96. handle_bad_irq(&bad_irq_desc);
  97. else
  98. generic_handle_irq(irq);
  99. maybe_lower_to_irq14();
  100. irq_exit();
  101. set_irq_regs(old_regs);
  102. }
  103. void __init init_IRQ(void)
  104. {
  105. init_arch_irq();
  106. #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
  107. /* Now that evt_ivhw is set up, turn this on */
  108. trace_buff_offset = 0;
  109. bfin_write_TBUFCTL(BFIN_TRACE_ON);
  110. printk(KERN_INFO "Hardware Trace expanded to %ik\n",
  111. 1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN);
  112. #endif
  113. }