spear310.c 5.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260
  1. /*
  2. * arch/arm/mach-spear3xx/spear310.c
  3. *
  4. * SPEAr310 machine source file
  5. *
  6. * Copyright (C) 2009-2012 ST Microelectronics
  7. * Viresh Kumar <vireshk@kernel.org>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #define pr_fmt(fmt) "SPEAr310: " fmt
  14. #include <linux/amba/pl08x.h>
  15. #include <linux/amba/serial.h>
  16. #include <linux/of_platform.h>
  17. #include <asm/mach/arch.h>
  18. #include "generic.h"
  19. #include <mach/spear.h>
  20. #define SPEAR310_UART1_BASE UL(0xB2000000)
  21. #define SPEAR310_UART2_BASE UL(0xB2080000)
  22. #define SPEAR310_UART3_BASE UL(0xB2100000)
  23. #define SPEAR310_UART4_BASE UL(0xB2180000)
  24. #define SPEAR310_UART5_BASE UL(0xB2200000)
  25. /* DMAC platform data's slave info */
  26. struct pl08x_channel_data spear310_dma_info[] = {
  27. {
  28. .bus_id = "uart0_rx",
  29. .min_signal = 2,
  30. .max_signal = 2,
  31. .muxval = 0,
  32. .periph_buses = PL08X_AHB1,
  33. }, {
  34. .bus_id = "uart0_tx",
  35. .min_signal = 3,
  36. .max_signal = 3,
  37. .muxval = 0,
  38. .periph_buses = PL08X_AHB1,
  39. }, {
  40. .bus_id = "ssp0_rx",
  41. .min_signal = 8,
  42. .max_signal = 8,
  43. .muxval = 0,
  44. .periph_buses = PL08X_AHB1,
  45. }, {
  46. .bus_id = "ssp0_tx",
  47. .min_signal = 9,
  48. .max_signal = 9,
  49. .muxval = 0,
  50. .periph_buses = PL08X_AHB1,
  51. }, {
  52. .bus_id = "i2c_rx",
  53. .min_signal = 10,
  54. .max_signal = 10,
  55. .muxval = 0,
  56. .periph_buses = PL08X_AHB1,
  57. }, {
  58. .bus_id = "i2c_tx",
  59. .min_signal = 11,
  60. .max_signal = 11,
  61. .muxval = 0,
  62. .periph_buses = PL08X_AHB1,
  63. }, {
  64. .bus_id = "irda",
  65. .min_signal = 12,
  66. .max_signal = 12,
  67. .muxval = 0,
  68. .periph_buses = PL08X_AHB1,
  69. }, {
  70. .bus_id = "adc",
  71. .min_signal = 13,
  72. .max_signal = 13,
  73. .muxval = 0,
  74. .periph_buses = PL08X_AHB1,
  75. }, {
  76. .bus_id = "to_jpeg",
  77. .min_signal = 14,
  78. .max_signal = 14,
  79. .muxval = 0,
  80. .periph_buses = PL08X_AHB1,
  81. }, {
  82. .bus_id = "from_jpeg",
  83. .min_signal = 15,
  84. .max_signal = 15,
  85. .muxval = 0,
  86. .periph_buses = PL08X_AHB1,
  87. }, {
  88. .bus_id = "uart1_rx",
  89. .min_signal = 0,
  90. .max_signal = 0,
  91. .muxval = 1,
  92. .periph_buses = PL08X_AHB1,
  93. }, {
  94. .bus_id = "uart1_tx",
  95. .min_signal = 1,
  96. .max_signal = 1,
  97. .muxval = 1,
  98. .periph_buses = PL08X_AHB1,
  99. }, {
  100. .bus_id = "uart2_rx",
  101. .min_signal = 2,
  102. .max_signal = 2,
  103. .muxval = 1,
  104. .periph_buses = PL08X_AHB1,
  105. }, {
  106. .bus_id = "uart2_tx",
  107. .min_signal = 3,
  108. .max_signal = 3,
  109. .muxval = 1,
  110. .periph_buses = PL08X_AHB1,
  111. }, {
  112. .bus_id = "uart3_rx",
  113. .min_signal = 4,
  114. .max_signal = 4,
  115. .muxval = 1,
  116. .periph_buses = PL08X_AHB1,
  117. }, {
  118. .bus_id = "uart3_tx",
  119. .min_signal = 5,
  120. .max_signal = 5,
  121. .muxval = 1,
  122. .periph_buses = PL08X_AHB1,
  123. }, {
  124. .bus_id = "uart4_rx",
  125. .min_signal = 6,
  126. .max_signal = 6,
  127. .muxval = 1,
  128. .periph_buses = PL08X_AHB1,
  129. }, {
  130. .bus_id = "uart4_tx",
  131. .min_signal = 7,
  132. .max_signal = 7,
  133. .muxval = 1,
  134. .periph_buses = PL08X_AHB1,
  135. }, {
  136. .bus_id = "uart5_rx",
  137. .min_signal = 8,
  138. .max_signal = 8,
  139. .muxval = 1,
  140. .periph_buses = PL08X_AHB1,
  141. }, {
  142. .bus_id = "uart5_tx",
  143. .min_signal = 9,
  144. .max_signal = 9,
  145. .muxval = 1,
  146. .periph_buses = PL08X_AHB1,
  147. }, {
  148. .bus_id = "ras5_rx",
  149. .min_signal = 10,
  150. .max_signal = 10,
  151. .muxval = 1,
  152. .periph_buses = PL08X_AHB1,
  153. }, {
  154. .bus_id = "ras5_tx",
  155. .min_signal = 11,
  156. .max_signal = 11,
  157. .muxval = 1,
  158. .periph_buses = PL08X_AHB1,
  159. }, {
  160. .bus_id = "ras6_rx",
  161. .min_signal = 12,
  162. .max_signal = 12,
  163. .muxval = 1,
  164. .periph_buses = PL08X_AHB1,
  165. }, {
  166. .bus_id = "ras6_tx",
  167. .min_signal = 13,
  168. .max_signal = 13,
  169. .muxval = 1,
  170. .periph_buses = PL08X_AHB1,
  171. }, {
  172. .bus_id = "ras7_rx",
  173. .min_signal = 14,
  174. .max_signal = 14,
  175. .muxval = 1,
  176. .periph_buses = PL08X_AHB1,
  177. }, {
  178. .bus_id = "ras7_tx",
  179. .min_signal = 15,
  180. .max_signal = 15,
  181. .muxval = 1,
  182. .periph_buses = PL08X_AHB1,
  183. },
  184. };
  185. /* uart devices plat data */
  186. static struct amba_pl011_data spear310_uart_data[] = {
  187. {
  188. .dma_filter = pl08x_filter_id,
  189. .dma_tx_param = "uart1_tx",
  190. .dma_rx_param = "uart1_rx",
  191. }, {
  192. .dma_filter = pl08x_filter_id,
  193. .dma_tx_param = "uart2_tx",
  194. .dma_rx_param = "uart2_rx",
  195. }, {
  196. .dma_filter = pl08x_filter_id,
  197. .dma_tx_param = "uart3_tx",
  198. .dma_rx_param = "uart3_rx",
  199. }, {
  200. .dma_filter = pl08x_filter_id,
  201. .dma_tx_param = "uart4_tx",
  202. .dma_rx_param = "uart4_rx",
  203. }, {
  204. .dma_filter = pl08x_filter_id,
  205. .dma_tx_param = "uart5_tx",
  206. .dma_rx_param = "uart5_rx",
  207. },
  208. };
  209. /* Add SPEAr310 auxdata to pass platform data */
  210. static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = {
  211. OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
  212. &pl022_plat_data),
  213. OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
  214. &pl080_plat_data),
  215. OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL,
  216. &spear310_uart_data[0]),
  217. OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL,
  218. &spear310_uart_data[1]),
  219. OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART3_BASE, NULL,
  220. &spear310_uart_data[2]),
  221. OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART4_BASE, NULL,
  222. &spear310_uart_data[3]),
  223. OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART5_BASE, NULL,
  224. &spear310_uart_data[4]),
  225. {}
  226. };
  227. static void __init spear310_dt_init(void)
  228. {
  229. pl080_plat_data.slave_channels = spear310_dma_info;
  230. pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear310_dma_info);
  231. of_platform_default_populate(NULL, spear310_auxdata_lookup, NULL);
  232. }
  233. static const char * const spear310_dt_board_compat[] = {
  234. "st,spear310",
  235. "st,spear310-evb",
  236. NULL,
  237. };
  238. static void __init spear310_map_io(void)
  239. {
  240. spear3xx_map_io();
  241. }
  242. DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree")
  243. .map_io = spear310_map_io,
  244. .init_time = spear3xx_timer_init,
  245. .init_machine = spear310_dt_init,
  246. .restart = spear_restart,
  247. .dt_compat = spear310_dt_board_compat,
  248. MACHINE_END