mce.h 4.0 KB

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  1. #ifndef __ALPHA_MCE_H
  2. #define __ALPHA_MCE_H
  3. /*
  4. * This is the logout header that should be common to all platforms
  5. * (assuming they are running OSF/1 PALcode, I guess).
  6. */
  7. struct el_common {
  8. unsigned int size; /* size in bytes of logout area */
  9. unsigned int sbz1 : 30; /* should be zero */
  10. unsigned int err2 : 1; /* second error */
  11. unsigned int retry : 1; /* retry flag */
  12. unsigned int proc_offset; /* processor-specific offset */
  13. unsigned int sys_offset; /* system-specific offset */
  14. unsigned int code; /* machine check code */
  15. unsigned int frame_rev; /* frame revision */
  16. };
  17. /* Machine Check Frame for uncorrectable errors (Large format)
  18. * --- This is used to log uncorrectable errors such as
  19. * double bit ECC errors.
  20. * --- These errors are detected by both processor and systems.
  21. */
  22. struct el_common_EV5_uncorrectable_mcheck {
  23. unsigned long shadow[8]; /* Shadow reg. 8-14, 25 */
  24. unsigned long paltemp[24]; /* PAL TEMP REGS. */
  25. unsigned long exc_addr; /* Address of excepting instruction*/
  26. unsigned long exc_sum; /* Summary of arithmetic traps. */
  27. unsigned long exc_mask; /* Exception mask (from exc_sum). */
  28. unsigned long pal_base; /* Base address for PALcode. */
  29. unsigned long isr; /* Interrupt Status Reg. */
  30. unsigned long icsr; /* CURRENT SETUP OF EV5 IBOX */
  31. unsigned long ic_perr_stat; /* I-CACHE Reg. <11> set Data parity
  32. <12> set TAG parity*/
  33. unsigned long dc_perr_stat; /* D-CACHE error Reg. Bits set to 1:
  34. <2> Data error in bank 0
  35. <3> Data error in bank 1
  36. <4> Tag error in bank 0
  37. <5> Tag error in bank 1 */
  38. unsigned long va; /* Effective VA of fault or miss. */
  39. unsigned long mm_stat; /* Holds the reason for D-stream
  40. fault or D-cache parity errors */
  41. unsigned long sc_addr; /* Address that was being accessed
  42. when EV5 detected Secondary cache
  43. failure. */
  44. unsigned long sc_stat; /* Helps determine if the error was
  45. TAG/Data parity(Secondary Cache)*/
  46. unsigned long bc_tag_addr; /* Contents of EV5 BC_TAG_ADDR */
  47. unsigned long ei_addr; /* Physical address of any transfer
  48. that is logged in EV5 EI_STAT */
  49. unsigned long fill_syndrome; /* For correcting ECC errors. */
  50. unsigned long ei_stat; /* Helps identify reason of any
  51. processor uncorrectable error
  52. at its external interface. */
  53. unsigned long ld_lock; /* Contents of EV5 LD_LOCK register*/
  54. };
  55. struct el_common_EV6_mcheck {
  56. unsigned int FrameSize; /* Bytes, including this field */
  57. unsigned int FrameFlags; /* <31> = Retry, <30> = Second Error */
  58. unsigned int CpuOffset; /* Offset to CPU-specific info */
  59. unsigned int SystemOffset; /* Offset to system-specific info */
  60. unsigned int MCHK_Code;
  61. unsigned int MCHK_Frame_Rev;
  62. unsigned long I_STAT; /* EV6 Internal Processor Registers */
  63. unsigned long DC_STAT; /* (See the 21264 Spec) */
  64. unsigned long C_ADDR;
  65. unsigned long DC1_SYNDROME;
  66. unsigned long DC0_SYNDROME;
  67. unsigned long C_STAT;
  68. unsigned long C_STS;
  69. unsigned long MM_STAT;
  70. unsigned long EXC_ADDR;
  71. unsigned long IER_CM;
  72. unsigned long ISUM;
  73. unsigned long RESERVED0;
  74. unsigned long PAL_BASE;
  75. unsigned long I_CTL;
  76. unsigned long PCTX;
  77. };
  78. #endif /* __ALPHA_MCE_H */