boot-options.txt 11 KB

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  1. AMD64 specific boot options
  2. There are many others (usually documented in driver documentation), but
  3. only the AMD64 specific ones are listed here.
  4. Machine check
  5. Please see Documentation/x86/x86_64/machinecheck for sysfs runtime tunables.
  6. mce=off
  7. Disable machine check
  8. mce=no_cmci
  9. Disable CMCI(Corrected Machine Check Interrupt) that
  10. Intel processor supports. Usually this disablement is
  11. not recommended, but it might be handy if your hardware
  12. is misbehaving.
  13. Note that you'll get more problems without CMCI than with
  14. due to the shared banks, i.e. you might get duplicated
  15. error logs.
  16. mce=dont_log_ce
  17. Don't make logs for corrected errors. All events reported
  18. as corrected are silently cleared by OS.
  19. This option will be useful if you have no interest in any
  20. of corrected errors.
  21. mce=ignore_ce
  22. Disable features for corrected errors, e.g. polling timer
  23. and CMCI. All events reported as corrected are not cleared
  24. by OS and remained in its error banks.
  25. Usually this disablement is not recommended, however if
  26. there is an agent checking/clearing corrected errors
  27. (e.g. BIOS or hardware monitoring applications), conflicting
  28. with OS's error handling, and you cannot deactivate the agent,
  29. then this option will be a help.
  30. mce=no_lmce
  31. Do not opt-in to Local MCE delivery. Use legacy method
  32. to broadcast MCEs.
  33. mce=bootlog
  34. Enable logging of machine checks left over from booting.
  35. Disabled by default on AMD because some BIOS leave bogus ones.
  36. If your BIOS doesn't do that it's a good idea to enable though
  37. to make sure you log even machine check events that result
  38. in a reboot. On Intel systems it is enabled by default.
  39. mce=nobootlog
  40. Disable boot machine check logging.
  41. mce=tolerancelevel[,monarchtimeout] (number,number)
  42. tolerance levels:
  43. 0: always panic on uncorrected errors, log corrected errors
  44. 1: panic or SIGBUS on uncorrected errors, log corrected errors
  45. 2: SIGBUS or log uncorrected errors, log corrected errors
  46. 3: never panic or SIGBUS, log all errors (for testing only)
  47. Default is 1
  48. Can be also set using sysfs which is preferable.
  49. monarchtimeout:
  50. Sets the time in us to wait for other CPUs on machine checks. 0
  51. to disable.
  52. mce=bios_cmci_threshold
  53. Don't overwrite the bios-set CMCI threshold. This boot option
  54. prevents Linux from overwriting the CMCI threshold set by the
  55. bios. Without this option, Linux always sets the CMCI
  56. threshold to 1. Enabling this may make memory predictive failure
  57. analysis less effective if the bios sets thresholds for memory
  58. errors since we will not see details for all errors.
  59. mce=recovery
  60. Force-enable recoverable machine check code paths
  61. nomce (for compatibility with i386): same as mce=off
  62. Everything else is in sysfs now.
  63. APICs
  64. apic Use IO-APIC. Default
  65. noapic Don't use the IO-APIC.
  66. disableapic Don't use the local APIC
  67. nolapic Don't use the local APIC (alias for i386 compatibility)
  68. pirq=... See Documentation/x86/i386/IO-APIC.txt
  69. noapictimer Don't set up the APIC timer
  70. no_timer_check Don't check the IO-APIC timer. This can work around
  71. problems with incorrect timer initialization on some boards.
  72. apicpmtimer
  73. Do APIC timer calibration using the pmtimer. Implies
  74. apicmaintimer. Useful when your PIT timer is totally
  75. broken.
  76. Timing
  77. notsc
  78. Don't use the CPU time stamp counter to read the wall time.
  79. This can be used to work around timing problems on multiprocessor systems
  80. with not properly synchronized CPUs.
  81. nohpet
  82. Don't use the HPET timer.
  83. Idle loop
  84. idle=poll
  85. Don't do power saving in the idle loop using HLT, but poll for rescheduling
  86. event. This will make the CPUs eat a lot more power, but may be useful
  87. to get slightly better performance in multiprocessor benchmarks. It also
  88. makes some profiling using performance counters more accurate.
  89. Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
  90. CPUs) this option has no performance advantage over the normal idle loop.
  91. It may also interact badly with hyperthreading.
  92. Rebooting
  93. reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old]
  94. bios Use the CPU reboot vector for warm reset
  95. warm Don't set the cold reboot flag
  96. cold Set the cold reboot flag
  97. triple Force a triple fault (init)
  98. kbd Use the keyboard controller. cold reset (default)
  99. acpi Use the ACPI RESET_REG in the FADT. If ACPI is not configured or the
  100. ACPI reset does not work, the reboot path attempts the reset using
  101. the keyboard controller.
  102. efi Use efi reset_system runtime service. If EFI is not configured or the
  103. EFI reset does not work, the reboot path attempts the reset using
  104. the keyboard controller.
  105. Using warm reset will be much faster especially on big memory
  106. systems because the BIOS will not go through the memory check.
  107. Disadvantage is that not all hardware will be completely reinitialized
  108. on reboot so there may be boot problems on some systems.
  109. reboot=force
  110. Don't stop other CPUs on reboot. This can make reboot more reliable
  111. in some cases.
  112. Non Executable Mappings
  113. noexec=on|off
  114. on Enable(default)
  115. off Disable
  116. NUMA
  117. numa=off Only set up a single NUMA node spanning all memory.
  118. numa=noacpi Don't parse the SRAT table for NUMA setup
  119. numa=fake=<size>[MG]
  120. If given as a memory unit, fills all system RAM with nodes of
  121. size interleaved over physical nodes.
  122. numa=fake=<N>
  123. If given as an integer, fills all system RAM with N fake nodes
  124. interleaved over physical nodes.
  125. ACPI
  126. acpi=off Don't enable ACPI
  127. acpi=ht Use ACPI boot table parsing, but don't enable ACPI
  128. interpreter
  129. acpi=force Force ACPI on (currently not needed)
  130. acpi=strict Disable out of spec ACPI workarounds.
  131. acpi_sci={edge,level,high,low} Set up ACPI SCI interrupt.
  132. acpi=noirq Don't route interrupts
  133. acpi=nocmcff Disable firmware first mode for corrected errors. This
  134. disables parsing the HEST CMC error source to check if
  135. firmware has set the FF flag. This may result in
  136. duplicate corrected error reports.
  137. PCI
  138. pci=off Don't use PCI
  139. pci=conf1 Use conf1 access.
  140. pci=conf2 Use conf2 access.
  141. pci=rom Assign ROMs.
  142. pci=assign-busses Assign busses
  143. pci=irqmask=MASK Set PCI interrupt mask to MASK
  144. pci=lastbus=NUMBER Scan up to NUMBER busses, no matter what the mptable says.
  145. pci=noacpi Don't use ACPI to set up PCI interrupt routing.
  146. IOMMU (input/output memory management unit)
  147. Currently four x86-64 PCI-DMA mapping implementations exist:
  148. 1. <arch/x86_64/kernel/pci-nommu.c>: use no hardware/software IOMMU at all
  149. (e.g. because you have < 3 GB memory).
  150. Kernel boot message: "PCI-DMA: Disabling IOMMU"
  151. 2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
  152. Kernel boot message: "PCI-DMA: using GART IOMMU"
  153. 3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
  154. e.g. if there is no hardware IOMMU in the system and it is need because
  155. you have >3GB memory or told the kernel to us it (iommu=soft))
  156. Kernel boot message: "PCI-DMA: Using software bounce buffering
  157. for IO (SWIOTLB)"
  158. 4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
  159. pSeries and xSeries servers. This hardware IOMMU supports DMA address
  160. mapping with memory protection, etc.
  161. Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
  162. iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
  163. [,memaper[=<order>]][,merge][,forcesac][,fullflush][,nomerge]
  164. [,noaperture][,calgary]
  165. General iommu options:
  166. off Don't initialize and use any kind of IOMMU.
  167. noforce Don't force hardware IOMMU usage when it is not needed.
  168. (default).
  169. force Force the use of the hardware IOMMU even when it is
  170. not actually needed (e.g. because < 3 GB memory).
  171. soft Use software bounce buffering (SWIOTLB) (default for
  172. Intel machines). This can be used to prevent the usage
  173. of an available hardware IOMMU.
  174. iommu options only relevant to the AMD GART hardware IOMMU:
  175. <size> Set the size of the remapping area in bytes.
  176. allowed Overwrite iommu off workarounds for specific chipsets.
  177. fullflush Flush IOMMU on each allocation (default).
  178. nofullflush Don't use IOMMU fullflush.
  179. leak Turn on simple iommu leak tracing (only when
  180. CONFIG_IOMMU_LEAK is on). Default number of leak pages
  181. is 20.
  182. memaper[=<order>] Allocate an own aperture over RAM with size 32MB<<order.
  183. (default: order=1, i.e. 64MB)
  184. merge Do scatter-gather (SG) merging. Implies "force"
  185. (experimental).
  186. nomerge Don't do scatter-gather (SG) merging.
  187. noaperture Ask the IOMMU not to touch the aperture for AGP.
  188. forcesac Force single-address cycle (SAC) mode for masks <40bits
  189. (experimental).
  190. noagp Don't initialize the AGP driver and use full aperture.
  191. allowdac Allow double-address cycle (DAC) mode, i.e. DMA >4GB.
  192. DAC is used with 32-bit PCI to push a 64-bit address in
  193. two cycles. When off all DMA over >4GB is forced through
  194. an IOMMU or software bounce buffering.
  195. nodac Forbid DAC mode, i.e. DMA >4GB.
  196. panic Always panic when IOMMU overflows.
  197. calgary Use the Calgary IOMMU if it is available
  198. iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
  199. implementation:
  200. swiotlb=<pages>[,force]
  201. <pages> Prereserve that many 128K pages for the software IO
  202. bounce buffering.
  203. force Force all IO through the software TLB.
  204. Settings for the IBM Calgary hardware IOMMU currently found in IBM
  205. pSeries and xSeries machines:
  206. calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
  207. calgary=[translate_empty_slots]
  208. calgary=[disable=<PCI bus number>]
  209. panic Always panic when IOMMU overflows
  210. 64k,...,8M - Set the size of each PCI slot's translation table
  211. when using the Calgary IOMMU. This is the size of the translation
  212. table itself in main memory. The smallest table, 64k, covers an IO
  213. space of 32MB; the largest, 8MB table, can cover an IO space of
  214. 4GB. Normally the kernel will make the right choice by itself.
  215. translate_empty_slots - Enable translation even on slots that have
  216. no devices attached to them, in case a device will be hotplugged
  217. in the future.
  218. disable=<PCI bus number> - Disable translation on a given PHB. For
  219. example, the built-in graphics adapter resides on the first bridge
  220. (PCI bus number 0); if translation (isolation) is enabled on this
  221. bridge, X servers that access the hardware directly from user
  222. space might stop working. Use this option if you have devices that
  223. are accessed from userspace directly on some PCI host bridge.
  224. Debugging
  225. kstack=N Print N words from the kernel stack in oops dumps.
  226. Miscellaneous
  227. nogbpages
  228. Do not use GB pages for kernel direct mappings.
  229. gbpages
  230. Use GB pages for kernel direct mappings.