booting-without-of.txt 63 KB

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  1. Booting the Linux/ppc kernel without Open Firmware
  2. --------------------------------------------------
  3. (c) 2005 Benjamin Herrenschmidt <benh at kernel.crashing.org>,
  4. IBM Corp.
  5. (c) 2005 Becky Bruce <becky.bruce at freescale.com>,
  6. Freescale Semiconductor, FSL SOC and 32-bit additions
  7. (c) 2006 MontaVista Software, Inc.
  8. Flash chip node definition
  9. Table of Contents
  10. =================
  11. I - Introduction
  12. 1) Entry point for arch/arm
  13. 2) Entry point for arch/powerpc
  14. 3) Entry point for arch/x86
  15. 4) Entry point for arch/mips/bmips
  16. 5) Entry point for arch/sh
  17. II - The DT block format
  18. 1) Header
  19. 2) Device tree generalities
  20. 3) Device tree "structure" block
  21. 4) Device tree "strings" block
  22. III - Required content of the device tree
  23. 1) Note about cells and address representation
  24. 2) Note about "compatible" properties
  25. 3) Note about "name" properties
  26. 4) Note about node and property names and character set
  27. 5) Required nodes and properties
  28. a) The root node
  29. b) The /cpus node
  30. c) The /cpus/* nodes
  31. d) the /memory node(s)
  32. e) The /chosen node
  33. f) the /soc<SOCname> node
  34. IV - "dtc", the device tree compiler
  35. V - Recommendations for a bootloader
  36. VI - System-on-a-chip devices and nodes
  37. 1) Defining child nodes of an SOC
  38. 2) Representing devices without a current OF specification
  39. VII - Specifying interrupt information for devices
  40. 1) interrupts property
  41. 2) interrupt-parent property
  42. 3) OpenPIC Interrupt Controllers
  43. 4) ISA Interrupt Controllers
  44. VIII - Specifying device power management information (sleep property)
  45. IX - Specifying dma bus information
  46. Appendix A - Sample SOC node for MPC8540
  47. Revision Information
  48. ====================
  49. May 18, 2005: Rev 0.1 - Initial draft, no chapter III yet.
  50. May 19, 2005: Rev 0.2 - Add chapter III and bits & pieces here or
  51. clarifies the fact that a lot of things are
  52. optional, the kernel only requires a very
  53. small device tree, though it is encouraged
  54. to provide an as complete one as possible.
  55. May 24, 2005: Rev 0.3 - Precise that DT block has to be in RAM
  56. - Misc fixes
  57. - Define version 3 and new format version 16
  58. for the DT block (version 16 needs kernel
  59. patches, will be fwd separately).
  60. String block now has a size, and full path
  61. is replaced by unit name for more
  62. compactness.
  63. linux,phandle is made optional, only nodes
  64. that are referenced by other nodes need it.
  65. "name" property is now automatically
  66. deduced from the unit name
  67. June 1, 2005: Rev 0.4 - Correct confusion between OF_DT_END and
  68. OF_DT_END_NODE in structure definition.
  69. - Change version 16 format to always align
  70. property data to 4 bytes. Since tokens are
  71. already aligned, that means no specific
  72. required alignment between property size
  73. and property data. The old style variable
  74. alignment would make it impossible to do
  75. "simple" insertion of properties using
  76. memmove (thanks Milton for
  77. noticing). Updated kernel patch as well
  78. - Correct a few more alignment constraints
  79. - Add a chapter about the device-tree
  80. compiler and the textural representation of
  81. the tree that can be "compiled" by dtc.
  82. November 21, 2005: Rev 0.5
  83. - Additions/generalizations for 32-bit
  84. - Changed to reflect the new arch/powerpc
  85. structure
  86. - Added chapter VI
  87. ToDo:
  88. - Add some definitions of interrupt tree (simple/complex)
  89. - Add some definitions for PCI host bridges
  90. - Add some common address format examples
  91. - Add definitions for standard properties and "compatible"
  92. names for cells that are not already defined by the existing
  93. OF spec.
  94. - Compare FSL SOC use of PCI to standard and make sure no new
  95. node definition required.
  96. - Add more information about node definitions for SOC devices
  97. that currently have no standard, like the FSL CPM.
  98. I - Introduction
  99. ================
  100. During the development of the Linux/ppc64 kernel, and more
  101. specifically, the addition of new platform types outside of the old
  102. IBM pSeries/iSeries pair, it was decided to enforce some strict rules
  103. regarding the kernel entry and bootloader <-> kernel interfaces, in
  104. order to avoid the degeneration that had become the ppc32 kernel entry
  105. point and the way a new platform should be added to the kernel. The
  106. legacy iSeries platform breaks those rules as it predates this scheme,
  107. but no new board support will be accepted in the main tree that
  108. doesn't follow them properly. In addition, since the advent of the
  109. arch/powerpc merged architecture for ppc32 and ppc64, new 32-bit
  110. platforms and 32-bit platforms which move into arch/powerpc will be
  111. required to use these rules as well.
  112. The main requirement that will be defined in more detail below is
  113. the presence of a device-tree whose format is defined after Open
  114. Firmware specification. However, in order to make life easier
  115. to embedded board vendors, the kernel doesn't require the device-tree
  116. to represent every device in the system and only requires some nodes
  117. and properties to be present. This will be described in detail in
  118. section III, but, for example, the kernel does not require you to
  119. create a node for every PCI device in the system. It is a requirement
  120. to have a node for PCI host bridges in order to provide interrupt
  121. routing information and memory/IO ranges, among others. It is also
  122. recommended to define nodes for on chip devices and other buses that
  123. don't specifically fit in an existing OF specification. This creates a
  124. great flexibility in the way the kernel can then probe those and match
  125. drivers to device, without having to hard code all sorts of tables. It
  126. also makes it more flexible for board vendors to do minor hardware
  127. upgrades without significantly impacting the kernel code or cluttering
  128. it with special cases.
  129. 1) Entry point for arch/arm
  130. ---------------------------
  131. There is one single entry point to the kernel, at the start
  132. of the kernel image. That entry point supports two calling
  133. conventions. A summary of the interface is described here. A full
  134. description of the boot requirements is documented in
  135. Documentation/arm/Booting
  136. a) ATAGS interface. Minimal information is passed from firmware
  137. to the kernel with a tagged list of predefined parameters.
  138. r0 : 0
  139. r1 : Machine type number
  140. r2 : Physical address of tagged list in system RAM
  141. b) Entry with a flattened device-tree block. Firmware loads the
  142. physical address of the flattened device tree block (dtb) into r2,
  143. r1 is not used, but it is considered good practice to use a valid
  144. machine number as described in Documentation/arm/Booting.
  145. r0 : 0
  146. r1 : Valid machine type number. When using a device tree,
  147. a single machine type number will often be assigned to
  148. represent a class or family of SoCs.
  149. r2 : physical pointer to the device-tree block
  150. (defined in chapter II) in RAM. Device tree can be located
  151. anywhere in system RAM, but it should be aligned on a 64 bit
  152. boundary.
  153. The kernel will differentiate between ATAGS and device tree booting by
  154. reading the memory pointed to by r2 and looking for either the flattened
  155. device tree block magic value (0xd00dfeed) or the ATAG_CORE value at
  156. offset 0x4 from r2 (0x54410001).
  157. 2) Entry point for arch/powerpc
  158. -------------------------------
  159. There is one single entry point to the kernel, at the start
  160. of the kernel image. That entry point supports two calling
  161. conventions:
  162. a) Boot from Open Firmware. If your firmware is compatible
  163. with Open Firmware (IEEE 1275) or provides an OF compatible
  164. client interface API (support for "interpret" callback of
  165. forth words isn't required), you can enter the kernel with:
  166. r5 : OF callback pointer as defined by IEEE 1275
  167. bindings to powerpc. Only the 32-bit client interface
  168. is currently supported
  169. r3, r4 : address & length of an initrd if any or 0
  170. The MMU is either on or off; the kernel will run the
  171. trampoline located in arch/powerpc/kernel/prom_init.c to
  172. extract the device-tree and other information from open
  173. firmware and build a flattened device-tree as described
  174. in b). prom_init() will then re-enter the kernel using
  175. the second method. This trampoline code runs in the
  176. context of the firmware, which is supposed to handle all
  177. exceptions during that time.
  178. b) Direct entry with a flattened device-tree block. This entry
  179. point is called by a) after the OF trampoline and can also be
  180. called directly by a bootloader that does not support the Open
  181. Firmware client interface. It is also used by "kexec" to
  182. implement "hot" booting of a new kernel from a previous
  183. running one. This method is what I will describe in more
  184. details in this document, as method a) is simply standard Open
  185. Firmware, and thus should be implemented according to the
  186. various standard documents defining it and its binding to the
  187. PowerPC platform. The entry point definition then becomes:
  188. r3 : physical pointer to the device-tree block
  189. (defined in chapter II) in RAM
  190. r4 : physical pointer to the kernel itself. This is
  191. used by the assembly code to properly disable the MMU
  192. in case you are entering the kernel with MMU enabled
  193. and a non-1:1 mapping.
  194. r5 : NULL (as to differentiate with method a)
  195. Note about SMP entry: Either your firmware puts your other
  196. CPUs in some sleep loop or spin loop in ROM where you can get
  197. them out via a soft reset or some other means, in which case
  198. you don't need to care, or you'll have to enter the kernel
  199. with all CPUs. The way to do that with method b) will be
  200. described in a later revision of this document.
  201. Board supports (platforms) are not exclusive config options. An
  202. arbitrary set of board supports can be built in a single kernel
  203. image. The kernel will "know" what set of functions to use for a
  204. given platform based on the content of the device-tree. Thus, you
  205. should:
  206. a) add your platform support as a _boolean_ option in
  207. arch/powerpc/Kconfig, following the example of PPC_PSERIES,
  208. PPC_PMAC and PPC_MAPLE. The later is probably a good
  209. example of a board support to start from.
  210. b) create your main platform file as
  211. "arch/powerpc/platforms/myplatform/myboard_setup.c" and add it
  212. to the Makefile under the condition of your CONFIG_
  213. option. This file will define a structure of type "ppc_md"
  214. containing the various callbacks that the generic code will
  215. use to get to your platform specific code
  216. A kernel image may support multiple platforms, but only if the
  217. platforms feature the same core architecture. A single kernel build
  218. cannot support both configurations with Book E and configurations
  219. with classic Powerpc architectures.
  220. 3) Entry point for arch/x86
  221. -------------------------------
  222. There is one single 32bit entry point to the kernel at code32_start,
  223. the decompressor (the real mode entry point goes to the same 32bit
  224. entry point once it switched into protected mode). That entry point
  225. supports one calling convention which is documented in
  226. Documentation/x86/boot.txt
  227. The physical pointer to the device-tree block (defined in chapter II)
  228. is passed via setup_data which requires at least boot protocol 2.09.
  229. The type filed is defined as
  230. #define SETUP_DTB 2
  231. This device-tree is used as an extension to the "boot page". As such it
  232. does not parse / consider data which is already covered by the boot
  233. page. This includes memory size, reserved ranges, command line arguments
  234. or initrd address. It simply holds information which can not be retrieved
  235. otherwise like interrupt routing or a list of devices behind an I2C bus.
  236. 4) Entry point for arch/mips/bmips
  237. ----------------------------------
  238. Some bootloaders only support a single entry point, at the start of the
  239. kernel image. Other bootloaders will jump to the ELF start address.
  240. Both schemes are supported; CONFIG_BOOT_RAW=y and CONFIG_NO_EXCEPT_FILL=y,
  241. so the first instruction immediately jumps to kernel_entry().
  242. Similar to the arch/arm case (b), a DT-aware bootloader is expected to
  243. set up the following registers:
  244. a0 : 0
  245. a1 : 0xffffffff
  246. a2 : Physical pointer to the device tree block (defined in chapter
  247. II) in RAM. The device tree can be located anywhere in the first
  248. 512MB of the physical address space (0x00000000 - 0x1fffffff),
  249. aligned on a 64 bit boundary.
  250. Legacy bootloaders do not use this convention, and they do not pass in a
  251. DT block. In this case, Linux will look for a builtin DTB, selected via
  252. CONFIG_DT_*.
  253. This convention is defined for 32-bit systems only, as there are not
  254. currently any 64-bit BMIPS implementations.
  255. 5) Entry point for arch/sh
  256. --------------------------
  257. Device-tree-compatible SH bootloaders are expected to provide the physical
  258. address of the device tree blob in r4. Since legacy bootloaders did not
  259. guarantee any particular initial register state, kernels built to
  260. inter-operate with old bootloaders must either use a builtin DTB or
  261. select a legacy board option (something other than CONFIG_SH_DEVICE_TREE)
  262. that does not use device tree. Support for the latter is being phased out
  263. in favor of device tree.
  264. II - The DT block format
  265. ========================
  266. This chapter defines the actual format of the flattened device-tree
  267. passed to the kernel. The actual content of it and kernel requirements
  268. are described later. You can find example of code manipulating that
  269. format in various places, including arch/powerpc/kernel/prom_init.c
  270. which will generate a flattened device-tree from the Open Firmware
  271. representation, or the fs2dt utility which is part of the kexec tools
  272. which will generate one from a filesystem representation. It is
  273. expected that a bootloader like uboot provides a bit more support,
  274. that will be discussed later as well.
  275. Note: The block has to be in main memory. It has to be accessible in
  276. both real mode and virtual mode with no mapping other than main
  277. memory. If you are writing a simple flash bootloader, it should copy
  278. the block to RAM before passing it to the kernel.
  279. 1) Header
  280. ---------
  281. The kernel is passed the physical address pointing to an area of memory
  282. that is roughly described in include/linux/of_fdt.h by the structure
  283. boot_param_header:
  284. struct boot_param_header {
  285. u32 magic; /* magic word OF_DT_HEADER */
  286. u32 totalsize; /* total size of DT block */
  287. u32 off_dt_struct; /* offset to structure */
  288. u32 off_dt_strings; /* offset to strings */
  289. u32 off_mem_rsvmap; /* offset to memory reserve map
  290. */
  291. u32 version; /* format version */
  292. u32 last_comp_version; /* last compatible version */
  293. /* version 2 fields below */
  294. u32 boot_cpuid_phys; /* Which physical CPU id we're
  295. booting on */
  296. /* version 3 fields below */
  297. u32 size_dt_strings; /* size of the strings block */
  298. /* version 17 fields below */
  299. u32 size_dt_struct; /* size of the DT structure block */
  300. };
  301. Along with the constants:
  302. /* Definitions used by the flattened device tree */
  303. #define OF_DT_HEADER 0xd00dfeed /* 4: version,
  304. 4: total size */
  305. #define OF_DT_BEGIN_NODE 0x1 /* Start node: full name
  306. */
  307. #define OF_DT_END_NODE 0x2 /* End node */
  308. #define OF_DT_PROP 0x3 /* Property: name off,
  309. size, content */
  310. #define OF_DT_END 0x9
  311. All values in this header are in big endian format, the various
  312. fields in this header are defined more precisely below. All
  313. "offset" values are in bytes from the start of the header; that is
  314. from the physical base address of the device tree block.
  315. - magic
  316. This is a magic value that "marks" the beginning of the
  317. device-tree block header. It contains the value 0xd00dfeed and is
  318. defined by the constant OF_DT_HEADER
  319. - totalsize
  320. This is the total size of the DT block including the header. The
  321. "DT" block should enclose all data structures defined in this
  322. chapter (who are pointed to by offsets in this header). That is,
  323. the device-tree structure, strings, and the memory reserve map.
  324. - off_dt_struct
  325. This is an offset from the beginning of the header to the start
  326. of the "structure" part the device tree. (see 2) device tree)
  327. - off_dt_strings
  328. This is an offset from the beginning of the header to the start
  329. of the "strings" part of the device-tree
  330. - off_mem_rsvmap
  331. This is an offset from the beginning of the header to the start
  332. of the reserved memory map. This map is a list of pairs of 64-
  333. bit integers. Each pair is a physical address and a size. The
  334. list is terminated by an entry of size 0. This map provides the
  335. kernel with a list of physical memory areas that are "reserved"
  336. and thus not to be used for memory allocations, especially during
  337. early initialization. The kernel needs to allocate memory during
  338. boot for things like un-flattening the device-tree, allocating an
  339. MMU hash table, etc... Those allocations must be done in such a
  340. way to avoid overriding critical things like, on Open Firmware
  341. capable machines, the RTAS instance, or on some pSeries, the TCE
  342. tables used for the iommu. Typically, the reserve map should
  343. contain _at least_ this DT block itself (header,total_size). If
  344. you are passing an initrd to the kernel, you should reserve it as
  345. well. You do not need to reserve the kernel image itself. The map
  346. should be 64-bit aligned.
  347. - version
  348. This is the version of this structure. Version 1 stops
  349. here. Version 2 adds an additional field boot_cpuid_phys.
  350. Version 3 adds the size of the strings block, allowing the kernel
  351. to reallocate it easily at boot and free up the unused flattened
  352. structure after expansion. Version 16 introduces a new more
  353. "compact" format for the tree itself that is however not backward
  354. compatible. Version 17 adds an additional field, size_dt_struct,
  355. allowing it to be reallocated or moved more easily (this is
  356. particularly useful for bootloaders which need to make
  357. adjustments to a device tree based on probed information). You
  358. should always generate a structure of the highest version defined
  359. at the time of your implementation. Currently that is version 17,
  360. unless you explicitly aim at being backward compatible.
  361. - last_comp_version
  362. Last compatible version. This indicates down to what version of
  363. the DT block you are backward compatible. For example, version 2
  364. is backward compatible with version 1 (that is, a kernel build
  365. for version 1 will be able to boot with a version 2 format). You
  366. should put a 1 in this field if you generate a device tree of
  367. version 1 to 3, or 16 if you generate a tree of version 16 or 17
  368. using the new unit name format.
  369. - boot_cpuid_phys
  370. This field only exist on version 2 headers. It indicate which
  371. physical CPU ID is calling the kernel entry point. This is used,
  372. among others, by kexec. If you are on an SMP system, this value
  373. should match the content of the "reg" property of the CPU node in
  374. the device-tree corresponding to the CPU calling the kernel entry
  375. point (see further chapters for more information on the required
  376. device-tree contents)
  377. - size_dt_strings
  378. This field only exists on version 3 and later headers. It
  379. gives the size of the "strings" section of the device tree (which
  380. starts at the offset given by off_dt_strings).
  381. - size_dt_struct
  382. This field only exists on version 17 and later headers. It gives
  383. the size of the "structure" section of the device tree (which
  384. starts at the offset given by off_dt_struct).
  385. So the typical layout of a DT block (though the various parts don't
  386. need to be in that order) looks like this (addresses go from top to
  387. bottom):
  388. ------------------------------
  389. base -> | struct boot_param_header |
  390. ------------------------------
  391. | (alignment gap) (*) |
  392. ------------------------------
  393. | memory reserve map |
  394. ------------------------------
  395. | (alignment gap) |
  396. ------------------------------
  397. | |
  398. | device-tree structure |
  399. | |
  400. ------------------------------
  401. | (alignment gap) |
  402. ------------------------------
  403. | |
  404. | device-tree strings |
  405. | |
  406. -----> ------------------------------
  407. |
  408. |
  409. --- (base + totalsize)
  410. (*) The alignment gaps are not necessarily present; their presence
  411. and size are dependent on the various alignment requirements of
  412. the individual data blocks.
  413. 2) Device tree generalities
  414. ---------------------------
  415. This device-tree itself is separated in two different blocks, a
  416. structure block and a strings block. Both need to be aligned to a 4
  417. byte boundary.
  418. First, let's quickly describe the device-tree concept before detailing
  419. the storage format. This chapter does _not_ describe the detail of the
  420. required types of nodes & properties for the kernel, this is done
  421. later in chapter III.
  422. The device-tree layout is strongly inherited from the definition of
  423. the Open Firmware IEEE 1275 device-tree. It's basically a tree of
  424. nodes, each node having two or more named properties. A property can
  425. have a value or not.
  426. It is a tree, so each node has one and only one parent except for the
  427. root node who has no parent.
  428. A node has 2 names. The actual node name is generally contained in a
  429. property of type "name" in the node property list whose value is a
  430. zero terminated string and is mandatory for version 1 to 3 of the
  431. format definition (as it is in Open Firmware). Version 16 makes it
  432. optional as it can generate it from the unit name defined below.
  433. There is also a "unit name" that is used to differentiate nodes with
  434. the same name at the same level, it is usually made of the node
  435. names, the "@" sign, and a "unit address", which definition is
  436. specific to the bus type the node sits on.
  437. The unit name doesn't exist as a property per-se but is included in
  438. the device-tree structure. It is typically used to represent "path" in
  439. the device-tree. More details about the actual format of these will be
  440. below.
  441. The kernel generic code does not make any formal use of the
  442. unit address (though some board support code may do) so the only real
  443. requirement here for the unit address is to ensure uniqueness of
  444. the node unit name at a given level of the tree. Nodes with no notion
  445. of address and no possible sibling of the same name (like /memory or
  446. /cpus) may omit the unit address in the context of this specification,
  447. or use the "@0" default unit address. The unit name is used to define
  448. a node "full path", which is the concatenation of all parent node
  449. unit names separated with "/".
  450. The root node doesn't have a defined name, and isn't required to have
  451. a name property either if you are using version 3 or earlier of the
  452. format. It also has no unit address (no @ symbol followed by a unit
  453. address). The root node unit name is thus an empty string. The full
  454. path to the root node is "/".
  455. Every node which actually represents an actual device (that is, a node
  456. which isn't only a virtual "container" for more nodes, like "/cpus"
  457. is) is also required to have a "compatible" property indicating the
  458. specific hardware and an optional list of devices it is fully
  459. backwards compatible with.
  460. Finally, every node that can be referenced from a property in another
  461. node is required to have either a "phandle" or a "linux,phandle"
  462. property. Real Open Firmware implementations provide a unique
  463. "phandle" value for every node that the "prom_init()" trampoline code
  464. turns into "linux,phandle" properties. However, this is made optional
  465. if the flattened device tree is used directly. An example of a node
  466. referencing another node via "phandle" is when laying out the
  467. interrupt tree which will be described in a further version of this
  468. document.
  469. The "phandle" property is a 32-bit value that uniquely
  470. identifies a node. You are free to use whatever values or system of
  471. values, internal pointers, or whatever to generate these, the only
  472. requirement is that every node for which you provide that property has
  473. a unique value for it.
  474. Here is an example of a simple device-tree. In this example, an "o"
  475. designates a node followed by the node unit name. Properties are
  476. presented with their name followed by their content. "content"
  477. represents an ASCII string (zero terminated) value, while <content>
  478. represents a 32-bit value, specified in decimal or hexadecimal (the
  479. latter prefixed 0x). The various nodes in this example will be
  480. discussed in a later chapter. At this point, it is only meant to give
  481. you a idea of what a device-tree looks like. I have purposefully kept
  482. the "name" and "linux,phandle" properties which aren't necessary in
  483. order to give you a better idea of what the tree looks like in
  484. practice.
  485. / o device-tree
  486. |- name = "device-tree"
  487. |- model = "MyBoardName"
  488. |- compatible = "MyBoardFamilyName"
  489. |- #address-cells = <2>
  490. |- #size-cells = <2>
  491. |- linux,phandle = <0>
  492. |
  493. o cpus
  494. | | - name = "cpus"
  495. | | - linux,phandle = <1>
  496. | | - #address-cells = <1>
  497. | | - #size-cells = <0>
  498. | |
  499. | o PowerPC,970@0
  500. | |- name = "PowerPC,970"
  501. | |- device_type = "cpu"
  502. | |- reg = <0>
  503. | |- clock-frequency = <0x5f5e1000>
  504. | |- 64-bit
  505. | |- linux,phandle = <2>
  506. |
  507. o memory@0
  508. | |- name = "memory"
  509. | |- device_type = "memory"
  510. | |- reg = <0x00000000 0x00000000 0x00000000 0x20000000>
  511. | |- linux,phandle = <3>
  512. |
  513. o chosen
  514. |- name = "chosen"
  515. |- bootargs = "root=/dev/sda2"
  516. |- linux,phandle = <4>
  517. This tree is almost a minimal tree. It pretty much contains the
  518. minimal set of required nodes and properties to boot a linux kernel;
  519. that is, some basic model information at the root, the CPUs, and the
  520. physical memory layout. It also includes misc information passed
  521. through /chosen, like in this example, the platform type (mandatory)
  522. and the kernel command line arguments (optional).
  523. The /cpus/PowerPC,970@0/64-bit property is an example of a
  524. property without a value. All other properties have a value. The
  525. significance of the #address-cells and #size-cells properties will be
  526. explained in chapter IV which defines precisely the required nodes and
  527. properties and their content.
  528. 3) Device tree "structure" block
  529. The structure of the device tree is a linearized tree structure. The
  530. "OF_DT_BEGIN_NODE" token starts a new node, and the "OF_DT_END_NODE"
  531. ends that node definition. Child nodes are simply defined before
  532. "OF_DT_END_NODE" (that is nodes within the node). A 'token' is a 32
  533. bit value. The tree has to be "finished" with a OF_DT_END token
  534. Here's the basic structure of a single node:
  535. * token OF_DT_BEGIN_NODE (that is 0x00000001)
  536. * for version 1 to 3, this is the node full path as a zero
  537. terminated string, starting with "/". For version 16 and later,
  538. this is the node unit name only (or an empty string for the
  539. root node)
  540. * [align gap to next 4 bytes boundary]
  541. * for each property:
  542. * token OF_DT_PROP (that is 0x00000003)
  543. * 32-bit value of property value size in bytes (or 0 if no
  544. value)
  545. * 32-bit value of offset in string block of property name
  546. * property value data if any
  547. * [align gap to next 4 bytes boundary]
  548. * [child nodes if any]
  549. * token OF_DT_END_NODE (that is 0x00000002)
  550. So the node content can be summarized as a start token, a full path,
  551. a list of properties, a list of child nodes, and an end token. Every
  552. child node is a full node structure itself as defined above.
  553. NOTE: The above definition requires that all property definitions for
  554. a particular node MUST precede any subnode definitions for that node.
  555. Although the structure would not be ambiguous if properties and
  556. subnodes were intermingled, the kernel parser requires that the
  557. properties come first (up until at least 2.6.22). Any tools
  558. manipulating a flattened tree must take care to preserve this
  559. constraint.
  560. 4) Device tree "strings" block
  561. In order to save space, property names, which are generally redundant,
  562. are stored separately in the "strings" block. This block is simply the
  563. whole bunch of zero terminated strings for all property names
  564. concatenated together. The device-tree property definitions in the
  565. structure block will contain offset values from the beginning of the
  566. strings block.
  567. III - Required content of the device tree
  568. =========================================
  569. WARNING: All "linux,*" properties defined in this document apply only
  570. to a flattened device-tree. If your platform uses a real
  571. implementation of Open Firmware or an implementation compatible with
  572. the Open Firmware client interface, those properties will be created
  573. by the trampoline code in the kernel's prom_init() file. For example,
  574. that's where you'll have to add code to detect your board model and
  575. set the platform number. However, when using the flattened device-tree
  576. entry point, there is no prom_init() pass, and thus you have to
  577. provide those properties yourself.
  578. 1) Note about cells and address representation
  579. ----------------------------------------------
  580. The general rule is documented in the various Open Firmware
  581. documentations. If you choose to describe a bus with the device-tree
  582. and there exist an OF bus binding, then you should follow the
  583. specification. However, the kernel does not require every single
  584. device or bus to be described by the device tree.
  585. In general, the format of an address for a device is defined by the
  586. parent bus type, based on the #address-cells and #size-cells
  587. properties. Note that the parent's parent definitions of #address-cells
  588. and #size-cells are not inherited so every node with children must specify
  589. them. The kernel requires the root node to have those properties defining
  590. addresses format for devices directly mapped on the processor bus.
  591. Those 2 properties define 'cells' for representing an address and a
  592. size. A "cell" is a 32-bit number. For example, if both contain 2
  593. like the example tree given above, then an address and a size are both
  594. composed of 2 cells, and each is a 64-bit number (cells are
  595. concatenated and expected to be in big endian format). Another example
  596. is the way Apple firmware defines them, with 2 cells for an address
  597. and one cell for a size. Most 32-bit implementations should define
  598. #address-cells and #size-cells to 1, which represents a 32-bit value.
  599. Some 32-bit processors allow for physical addresses greater than 32
  600. bits; these processors should define #address-cells as 2.
  601. "reg" properties are always a tuple of the type "address size" where
  602. the number of cells of address and size is specified by the bus
  603. #address-cells and #size-cells. When a bus supports various address
  604. spaces and other flags relative to a given address allocation (like
  605. prefetchable, etc...) those flags are usually added to the top level
  606. bits of the physical address. For example, a PCI physical address is
  607. made of 3 cells, the bottom two containing the actual address itself
  608. while the top cell contains address space indication, flags, and pci
  609. bus & device numbers.
  610. For buses that support dynamic allocation, it's the accepted practice
  611. to then not provide the address in "reg" (keep it 0) though while
  612. providing a flag indicating the address is dynamically allocated, and
  613. then, to provide a separate "assigned-addresses" property that
  614. contains the fully allocated addresses. See the PCI OF bindings for
  615. details.
  616. In general, a simple bus with no address space bits and no dynamic
  617. allocation is preferred if it reflects your hardware, as the existing
  618. kernel address parsing functions will work out of the box. If you
  619. define a bus type with a more complex address format, including things
  620. like address space bits, you'll have to add a bus translator to the
  621. prom_parse.c file of the recent kernels for your bus type.
  622. The "reg" property only defines addresses and sizes (if #size-cells is
  623. non-0) within a given bus. In order to translate addresses upward
  624. (that is into parent bus addresses, and possibly into CPU physical
  625. addresses), all buses must contain a "ranges" property. If the
  626. "ranges" property is missing at a given level, it's assumed that
  627. translation isn't possible, i.e., the registers are not visible on the
  628. parent bus. The format of the "ranges" property for a bus is a list
  629. of:
  630. bus address, parent bus address, size
  631. "bus address" is in the format of the bus this bus node is defining,
  632. that is, for a PCI bridge, it would be a PCI address. Thus, (bus
  633. address, size) defines a range of addresses for child devices. "parent
  634. bus address" is in the format of the parent bus of this bus. For
  635. example, for a PCI host controller, that would be a CPU address. For a
  636. PCI<->ISA bridge, that would be a PCI address. It defines the base
  637. address in the parent bus where the beginning of that range is mapped.
  638. For new 64-bit board support, I recommend either the 2/2 format or
  639. Apple's 2/1 format which is slightly more compact since sizes usually
  640. fit in a single 32-bit word. New 32-bit board support should use a
  641. 1/1 format, unless the processor supports physical addresses greater
  642. than 32-bits, in which case a 2/1 format is recommended.
  643. Alternatively, the "ranges" property may be empty, indicating that the
  644. registers are visible on the parent bus using an identity mapping
  645. translation. In other words, the parent bus address space is the same
  646. as the child bus address space.
  647. 2) Note about "compatible" properties
  648. -------------------------------------
  649. These properties are optional, but recommended in devices and the root
  650. node. The format of a "compatible" property is a list of concatenated
  651. zero terminated strings. They allow a device to express its
  652. compatibility with a family of similar devices, in some cases,
  653. allowing a single driver to match against several devices regardless
  654. of their actual names.
  655. 3) Note about "name" properties
  656. -------------------------------
  657. While earlier users of Open Firmware like OldWorld macintoshes tended
  658. to use the actual device name for the "name" property, it's nowadays
  659. considered a good practice to use a name that is closer to the device
  660. class (often equal to device_type). For example, nowadays, Ethernet
  661. controllers are named "ethernet", an additional "model" property
  662. defining precisely the chip type/model, and "compatible" property
  663. defining the family in case a single driver can driver more than one
  664. of these chips. However, the kernel doesn't generally put any
  665. restriction on the "name" property; it is simply considered good
  666. practice to follow the standard and its evolutions as closely as
  667. possible.
  668. Note also that the new format version 16 makes the "name" property
  669. optional. If it's absent for a node, then the node's unit name is then
  670. used to reconstruct the name. That is, the part of the unit name
  671. before the "@" sign is used (or the entire unit name if no "@" sign
  672. is present).
  673. 4) Note about node and property names and character set
  674. -------------------------------------------------------
  675. While Open Firmware provides more flexible usage of 8859-1, this
  676. specification enforces more strict rules. Nodes and properties should
  677. be comprised only of ASCII characters 'a' to 'z', '0' to
  678. '9', ',', '.', '_', '+', '#', '?', and '-'. Node names additionally
  679. allow uppercase characters 'A' to 'Z' (property names should be
  680. lowercase. The fact that vendors like Apple don't respect this rule is
  681. irrelevant here). Additionally, node and property names should always
  682. begin with a character in the range 'a' to 'z' (or 'A' to 'Z' for node
  683. names).
  684. The maximum number of characters for both nodes and property names
  685. is 31. In the case of node names, this is only the leftmost part of
  686. a unit name (the pure "name" property), it doesn't include the unit
  687. address which can extend beyond that limit.
  688. 5) Required nodes and properties
  689. --------------------------------
  690. These are all that are currently required. However, it is strongly
  691. recommended that you expose PCI host bridges as documented in the
  692. PCI binding to Open Firmware, and your interrupt tree as documented
  693. in OF interrupt tree specification.
  694. a) The root node
  695. The root node requires some properties to be present:
  696. - model : this is your board name/model
  697. - #address-cells : address representation for "root" devices
  698. - #size-cells: the size representation for "root" devices
  699. - compatible : the board "family" generally finds its way here,
  700. for example, if you have 2 board models with a similar layout,
  701. that typically get driven by the same platform code in the
  702. kernel, you would specify the exact board model in the
  703. compatible property followed by an entry that represents the SoC
  704. model.
  705. The root node is also generally where you add additional properties
  706. specific to your board like the serial number if any, that sort of
  707. thing. It is recommended that if you add any "custom" property whose
  708. name may clash with standard defined ones, you prefix them with your
  709. vendor name and a comma.
  710. Additional properties for the root node:
  711. - serial-number : a string representing the device's serial number
  712. b) The /cpus node
  713. This node is the parent of all individual CPU nodes. It doesn't
  714. have any specific requirements, though it's generally good practice
  715. to have at least:
  716. #address-cells = <00000001>
  717. #size-cells = <00000000>
  718. This defines that the "address" for a CPU is a single cell, and has
  719. no meaningful size. This is not necessary but the kernel will assume
  720. that format when reading the "reg" properties of a CPU node, see
  721. below
  722. c) The /cpus/* nodes
  723. So under /cpus, you are supposed to create a node for every CPU on
  724. the machine. There is no specific restriction on the name of the
  725. CPU, though it's common to call it <architecture>,<core>. For
  726. example, Apple uses PowerPC,G5 while IBM uses PowerPC,970FX.
  727. However, the Generic Names convention suggests that it would be
  728. better to simply use 'cpu' for each cpu node and use the compatible
  729. property to identify the specific cpu core.
  730. Required properties:
  731. - device_type : has to be "cpu"
  732. - reg : This is the physical CPU number, it's a single 32-bit cell
  733. and is also used as-is as the unit number for constructing the
  734. unit name in the full path. For example, with 2 CPUs, you would
  735. have the full path:
  736. /cpus/PowerPC,970FX@0
  737. /cpus/PowerPC,970FX@1
  738. (unit addresses do not require leading zeroes)
  739. - d-cache-block-size : one cell, L1 data cache block size in bytes (*)
  740. - i-cache-block-size : one cell, L1 instruction cache block size in
  741. bytes
  742. - d-cache-size : one cell, size of L1 data cache in bytes
  743. - i-cache-size : one cell, size of L1 instruction cache in bytes
  744. (*) The cache "block" size is the size on which the cache management
  745. instructions operate. Historically, this document used the cache
  746. "line" size here which is incorrect. The kernel will prefer the cache
  747. block size and will fallback to cache line size for backward
  748. compatibility.
  749. Recommended properties:
  750. - timebase-frequency : a cell indicating the frequency of the
  751. timebase in Hz. This is not directly used by the generic code,
  752. but you are welcome to copy/paste the pSeries code for setting
  753. the kernel timebase/decrementer calibration based on this
  754. value.
  755. - clock-frequency : a cell indicating the CPU core clock frequency
  756. in Hz. A new property will be defined for 64-bit values, but if
  757. your frequency is < 4Ghz, one cell is enough. Here as well as
  758. for the above, the common code doesn't use that property, but
  759. you are welcome to re-use the pSeries or Maple one. A future
  760. kernel version might provide a common function for this.
  761. - d-cache-line-size : one cell, L1 data cache line size in bytes
  762. if different from the block size
  763. - i-cache-line-size : one cell, L1 instruction cache line size in
  764. bytes if different from the block size
  765. You are welcome to add any property you find relevant to your board,
  766. like some information about the mechanism used to soft-reset the
  767. CPUs. For example, Apple puts the GPIO number for CPU soft reset
  768. lines in there as a "soft-reset" property since they start secondary
  769. CPUs by soft-resetting them.
  770. d) the /memory node(s)
  771. To define the physical memory layout of your board, you should
  772. create one or more memory node(s). You can either create a single
  773. node with all memory ranges in its reg property, or you can create
  774. several nodes, as you wish. The unit address (@ part) used for the
  775. full path is the address of the first range of memory defined by a
  776. given node. If you use a single memory node, this will typically be
  777. @0.
  778. Required properties:
  779. - device_type : has to be "memory"
  780. - reg : This property contains all the physical memory ranges of
  781. your board. It's a list of addresses/sizes concatenated
  782. together, with the number of cells of each defined by the
  783. #address-cells and #size-cells of the root node. For example,
  784. with both of these properties being 2 like in the example given
  785. earlier, a 970 based machine with 6Gb of RAM could typically
  786. have a "reg" property here that looks like:
  787. 00000000 00000000 00000000 80000000
  788. 00000001 00000000 00000001 00000000
  789. That is a range starting at 0 of 0x80000000 bytes and a range
  790. starting at 0x100000000 and of 0x100000000 bytes. You can see
  791. that there is no memory covering the IO hole between 2Gb and
  792. 4Gb. Some vendors prefer splitting those ranges into smaller
  793. segments, but the kernel doesn't care.
  794. e) The /chosen node
  795. This node is a bit "special". Normally, that's where Open Firmware
  796. puts some variable environment information, like the arguments, or
  797. the default input/output devices.
  798. This specification makes a few of these mandatory, but also defines
  799. some linux-specific properties that would be normally constructed by
  800. the prom_init() trampoline when booting with an OF client interface,
  801. but that you have to provide yourself when using the flattened format.
  802. Recommended properties:
  803. - bootargs : This zero-terminated string is passed as the kernel
  804. command line
  805. - linux,stdout-path : This is the full path to your standard
  806. console device if any. Typically, if you have serial devices on
  807. your board, you may want to put the full path to the one set as
  808. the default console in the firmware here, for the kernel to pick
  809. it up as its own default console.
  810. Note that u-boot creates and fills in the chosen node for platforms
  811. that use it.
  812. (Note: a practice that is now obsolete was to include a property
  813. under /chosen called interrupt-controller which had a phandle value
  814. that pointed to the main interrupt controller)
  815. f) the /soc<SOCname> node
  816. This node is used to represent a system-on-a-chip (SoC) and must be
  817. present if the processor is a SoC. The top-level soc node contains
  818. information that is global to all devices on the SoC. The node name
  819. should contain a unit address for the SoC, which is the base address
  820. of the memory-mapped register set for the SoC. The name of an SoC
  821. node should start with "soc", and the remainder of the name should
  822. represent the part number for the soc. For example, the MPC8540's
  823. soc node would be called "soc8540".
  824. Required properties:
  825. - ranges : Should be defined as specified in 1) to describe the
  826. translation of SoC addresses for memory mapped SoC registers.
  827. - bus-frequency: Contains the bus frequency for the SoC node.
  828. Typically, the value of this field is filled in by the boot
  829. loader.
  830. - compatible : Exact model of the SoC
  831. Recommended properties:
  832. - reg : This property defines the address and size of the
  833. memory-mapped registers that are used for the SOC node itself.
  834. It does not include the child device registers - these will be
  835. defined inside each child node. The address specified in the
  836. "reg" property should match the unit address of the SOC node.
  837. - #address-cells : Address representation for "soc" devices. The
  838. format of this field may vary depending on whether or not the
  839. device registers are memory mapped. For memory mapped
  840. registers, this field represents the number of cells needed to
  841. represent the address of the registers. For SOCs that do not
  842. use MMIO, a special address format should be defined that
  843. contains enough cells to represent the required information.
  844. See 1) above for more details on defining #address-cells.
  845. - #size-cells : Size representation for "soc" devices
  846. - #interrupt-cells : Defines the width of cells used to represent
  847. interrupts. Typically this value is <2>, which includes a
  848. 32-bit number that represents the interrupt number, and a
  849. 32-bit number that represents the interrupt sense and level.
  850. This field is only needed if the SOC contains an interrupt
  851. controller.
  852. The SOC node may contain child nodes for each SOC device that the
  853. platform uses. Nodes should not be created for devices which exist
  854. on the SOC but are not used by a particular platform. See chapter VI
  855. for more information on how to specify devices that are part of a SOC.
  856. Example SOC node for the MPC8540:
  857. soc8540@e0000000 {
  858. #address-cells = <1>;
  859. #size-cells = <1>;
  860. #interrupt-cells = <2>;
  861. device_type = "soc";
  862. ranges = <0x00000000 0xe0000000 0x00100000>
  863. reg = <0xe0000000 0x00003000>;
  864. bus-frequency = <0>;
  865. }
  866. IV - "dtc", the device tree compiler
  867. ====================================
  868. dtc source code can be found at
  869. <http://git.jdl.com/gitweb/?p=dtc.git>
  870. WARNING: This version is still in early development stage; the
  871. resulting device-tree "blobs" have not yet been validated with the
  872. kernel. The current generated block lacks a useful reserve map (it will
  873. be fixed to generate an empty one, it's up to the bootloader to fill
  874. it up) among others. The error handling needs work, bugs are lurking,
  875. etc...
  876. dtc basically takes a device-tree in a given format and outputs a
  877. device-tree in another format. The currently supported formats are:
  878. Input formats:
  879. -------------
  880. - "dtb": "blob" format, that is a flattened device-tree block
  881. with
  882. header all in a binary blob.
  883. - "dts": "source" format. This is a text file containing a
  884. "source" for a device-tree. The format is defined later in this
  885. chapter.
  886. - "fs" format. This is a representation equivalent to the
  887. output of /proc/device-tree, that is nodes are directories and
  888. properties are files
  889. Output formats:
  890. ---------------
  891. - "dtb": "blob" format
  892. - "dts": "source" format
  893. - "asm": assembly language file. This is a file that can be
  894. sourced by gas to generate a device-tree "blob". That file can
  895. then simply be added to your Makefile. Additionally, the
  896. assembly file exports some symbols that can be used.
  897. The syntax of the dtc tool is
  898. dtc [-I <input-format>] [-O <output-format>]
  899. [-o output-filename] [-V output_version] input_filename
  900. The "output_version" defines what version of the "blob" format will be
  901. generated. Supported versions are 1,2,3 and 16. The default is
  902. currently version 3 but that may change in the future to version 16.
  903. Additionally, dtc performs various sanity checks on the tree, like the
  904. uniqueness of linux, phandle properties, validity of strings, etc...
  905. The format of the .dts "source" file is "C" like, supports C and C++
  906. style comments.
  907. / {
  908. }
  909. The above is the "device-tree" definition. It's the only statement
  910. supported currently at the toplevel.
  911. / {
  912. property1 = "string_value"; /* define a property containing a 0
  913. * terminated string
  914. */
  915. property2 = <0x1234abcd>; /* define a property containing a
  916. * numerical 32-bit value (hexadecimal)
  917. */
  918. property3 = <0x12345678 0x12345678 0xdeadbeef>;
  919. /* define a property containing 3
  920. * numerical 32-bit values (cells) in
  921. * hexadecimal
  922. */
  923. property4 = [0x0a 0x0b 0x0c 0x0d 0xde 0xea 0xad 0xbe 0xef];
  924. /* define a property whose content is
  925. * an arbitrary array of bytes
  926. */
  927. childnode@address { /* define a child node named "childnode"
  928. * whose unit name is "childnode at
  929. * address"
  930. */
  931. childprop = "hello\n"; /* define a property "childprop" of
  932. * childnode (in this case, a string)
  933. */
  934. };
  935. };
  936. Nodes can contain other nodes etc... thus defining the hierarchical
  937. structure of the tree.
  938. Strings support common escape sequences from C: "\n", "\t", "\r",
  939. "\(octal value)", "\x(hex value)".
  940. It is also suggested that you pipe your source file through cpp (gcc
  941. preprocessor) so you can use #include's, #define for constants, etc...
  942. Finally, various options are planned but not yet implemented, like
  943. automatic generation of phandles, labels (exported to the asm file so
  944. you can point to a property content and change it easily from whatever
  945. you link the device-tree with), label or path instead of numeric value
  946. in some cells to "point" to a node (replaced by a phandle at compile
  947. time), export of reserve map address to the asm file, ability to
  948. specify reserve map content at compile time, etc...
  949. We may provide a .h include file with common definitions of that
  950. proves useful for some properties (like building PCI properties or
  951. interrupt maps) though it may be better to add a notion of struct
  952. definitions to the compiler...
  953. V - Recommendations for a bootloader
  954. ====================================
  955. Here are some various ideas/recommendations that have been proposed
  956. while all this has been defined and implemented.
  957. - The bootloader may want to be able to use the device-tree itself
  958. and may want to manipulate it (to add/edit some properties,
  959. like physical memory size or kernel arguments). At this point, 2
  960. choices can be made. Either the bootloader works directly on the
  961. flattened format, or the bootloader has its own internal tree
  962. representation with pointers (similar to the kernel one) and
  963. re-flattens the tree when booting the kernel. The former is a bit
  964. more difficult to edit/modify, the later requires probably a bit
  965. more code to handle the tree structure. Note that the structure
  966. format has been designed so it's relatively easy to "insert"
  967. properties or nodes or delete them by just memmoving things
  968. around. It contains no internal offsets or pointers for this
  969. purpose.
  970. - An example of code for iterating nodes & retrieving properties
  971. directly from the flattened tree format can be found in the kernel
  972. file drivers/of/fdt.c. Look at the of_scan_flat_dt() function,
  973. its usage in early_init_devtree(), and the corresponding various
  974. early_init_dt_scan_*() callbacks. That code can be re-used in a
  975. GPL bootloader, and as the author of that code, I would be happy
  976. to discuss possible free licensing to any vendor who wishes to
  977. integrate all or part of this code into a non-GPL bootloader.
  978. (reference needed; who is 'I' here? ---gcl Jan 31, 2011)
  979. VI - System-on-a-chip devices and nodes
  980. =======================================
  981. Many companies are now starting to develop system-on-a-chip
  982. processors, where the processor core (CPU) and many peripheral devices
  983. exist on a single piece of silicon. For these SOCs, an SOC node
  984. should be used that defines child nodes for the devices that make
  985. up the SOC. While platforms are not required to use this model in
  986. order to boot the kernel, it is highly encouraged that all SOC
  987. implementations define as complete a flat-device-tree as possible to
  988. describe the devices on the SOC. This will allow for the
  989. genericization of much of the kernel code.
  990. 1) Defining child nodes of an SOC
  991. ---------------------------------
  992. Each device that is part of an SOC may have its own node entry inside
  993. the SOC node. For each device that is included in the SOC, the unit
  994. address property represents the address offset for this device's
  995. memory-mapped registers in the parent's address space. The parent's
  996. address space is defined by the "ranges" property in the top-level soc
  997. node. The "reg" property for each node that exists directly under the
  998. SOC node should contain the address mapping from the child address space
  999. to the parent SOC address space and the size of the device's
  1000. memory-mapped register file.
  1001. For many devices that may exist inside an SOC, there are predefined
  1002. specifications for the format of the device tree node. All SOC child
  1003. nodes should follow these specifications, except where noted in this
  1004. document.
  1005. See appendix A for an example partial SOC node definition for the
  1006. MPC8540.
  1007. 2) Representing devices without a current OF specification
  1008. ----------------------------------------------------------
  1009. Currently, there are many devices on SoCs that do not have a standard
  1010. representation defined as part of the Open Firmware specifications,
  1011. mainly because the boards that contain these SoCs are not currently
  1012. booted using Open Firmware. Binding documentation for new devices
  1013. should be added to the Documentation/devicetree/bindings directory.
  1014. That directory will expand as device tree support is added to more and
  1015. more SoCs.
  1016. VII - Specifying interrupt information for devices
  1017. ===================================================
  1018. The device tree represents the buses and devices of a hardware
  1019. system in a form similar to the physical bus topology of the
  1020. hardware.
  1021. In addition, a logical 'interrupt tree' exists which represents the
  1022. hierarchy and routing of interrupts in the hardware.
  1023. The interrupt tree model is fully described in the
  1024. document "Open Firmware Recommended Practice: Interrupt
  1025. Mapping Version 0.9". The document is available at:
  1026. <http://www.openfirmware.org/ofwg/practice/>
  1027. 1) interrupts property
  1028. ----------------------
  1029. Devices that generate interrupts to a single interrupt controller
  1030. should use the conventional OF representation described in the
  1031. OF interrupt mapping documentation.
  1032. Each device which generates interrupts must have an 'interrupt'
  1033. property. The interrupt property value is an arbitrary number of
  1034. of 'interrupt specifier' values which describe the interrupt or
  1035. interrupts for the device.
  1036. The encoding of an interrupt specifier is determined by the
  1037. interrupt domain in which the device is located in the
  1038. interrupt tree. The root of an interrupt domain specifies in
  1039. its #interrupt-cells property the number of 32-bit cells
  1040. required to encode an interrupt specifier. See the OF interrupt
  1041. mapping documentation for a detailed description of domains.
  1042. For example, the binding for the OpenPIC interrupt controller
  1043. specifies an #interrupt-cells value of 2 to encode the interrupt
  1044. number and level/sense information. All interrupt children in an
  1045. OpenPIC interrupt domain use 2 cells per interrupt in their interrupts
  1046. property.
  1047. The PCI bus binding specifies a #interrupt-cell value of 1 to encode
  1048. which interrupt pin (INTA,INTB,INTC,INTD) is used.
  1049. 2) interrupt-parent property
  1050. ----------------------------
  1051. The interrupt-parent property is specified to define an explicit
  1052. link between a device node and its interrupt parent in
  1053. the interrupt tree. The value of interrupt-parent is the
  1054. phandle of the parent node.
  1055. If the interrupt-parent property is not defined for a node, its
  1056. interrupt parent is assumed to be an ancestor in the node's
  1057. _device tree_ hierarchy.
  1058. 3) OpenPIC Interrupt Controllers
  1059. --------------------------------
  1060. OpenPIC interrupt controllers require 2 cells to encode
  1061. interrupt information. The first cell defines the interrupt
  1062. number. The second cell defines the sense and level
  1063. information.
  1064. Sense and level information should be encoded as follows:
  1065. 0 = low to high edge sensitive type enabled
  1066. 1 = active low level sensitive type enabled
  1067. 2 = active high level sensitive type enabled
  1068. 3 = high to low edge sensitive type enabled
  1069. 4) ISA Interrupt Controllers
  1070. ----------------------------
  1071. ISA PIC interrupt controllers require 2 cells to encode
  1072. interrupt information. The first cell defines the interrupt
  1073. number. The second cell defines the sense and level
  1074. information.
  1075. ISA PIC interrupt controllers should adhere to the ISA PIC
  1076. encodings listed below:
  1077. 0 = active low level sensitive type enabled
  1078. 1 = active high level sensitive type enabled
  1079. 2 = high to low edge sensitive type enabled
  1080. 3 = low to high edge sensitive type enabled
  1081. VIII - Specifying Device Power Management Information (sleep property)
  1082. ===================================================================
  1083. Devices on SOCs often have mechanisms for placing devices into low-power
  1084. states that are decoupled from the devices' own register blocks. Sometimes,
  1085. this information is more complicated than a cell-index property can
  1086. reasonably describe. Thus, each device controlled in such a manner
  1087. may contain a "sleep" property which describes these connections.
  1088. The sleep property consists of one or more sleep resources, each of
  1089. which consists of a phandle to a sleep controller, followed by a
  1090. controller-specific sleep specifier of zero or more cells.
  1091. The semantics of what type of low power modes are possible are defined
  1092. by the sleep controller. Some examples of the types of low power modes
  1093. that may be supported are:
  1094. - Dynamic: The device may be disabled or enabled at any time.
  1095. - System Suspend: The device may request to be disabled or remain
  1096. awake during system suspend, but will not be disabled until then.
  1097. - Permanent: The device is disabled permanently (until the next hard
  1098. reset).
  1099. Some devices may share a clock domain with each other, such that they should
  1100. only be suspended when none of the devices are in use. Where reasonable,
  1101. such nodes should be placed on a virtual bus, where the bus has the sleep
  1102. property. If the clock domain is shared among devices that cannot be
  1103. reasonably grouped in this manner, then create a virtual sleep controller
  1104. (similar to an interrupt nexus, except that defining a standardized
  1105. sleep-map should wait until its necessity is demonstrated).
  1106. IX - Specifying dma bus information
  1107. Some devices may have DMA memory range shifted relatively to the beginning of
  1108. RAM, or even placed outside of kernel RAM. For example, the Keystone 2 SoC
  1109. worked in LPAE mode with 4G memory has:
  1110. - RAM range: [0x8 0000 0000, 0x8 FFFF FFFF]
  1111. - DMA range: [ 0x8000 0000, 0xFFFF FFFF]
  1112. and DMA range is aliased into first 2G of RAM in HW.
  1113. In such cases, DMA addresses translation should be performed between CPU phys
  1114. and DMA addresses. The "dma-ranges" property is intended to be used
  1115. for describing the configuration of such system in DT.
  1116. In addition, each DMA master device on the DMA bus may or may not support
  1117. coherent DMA operations. The "dma-coherent" property is intended to be used
  1118. for identifying devices supported coherent DMA operations in DT.
  1119. * DMA Bus master
  1120. Optional property:
  1121. - dma-ranges: <prop-encoded-array> encoded as arbitrary number of triplets of
  1122. (child-bus-address, parent-bus-address, length). Each triplet specified
  1123. describes a contiguous DMA address range.
  1124. The dma-ranges property is used to describe the direct memory access (DMA)
  1125. structure of a memory-mapped bus whose device tree parent can be accessed
  1126. from DMA operations originating from the bus. It provides a means of
  1127. defining a mapping or translation between the physical address space of
  1128. the bus and the physical address space of the parent of the bus.
  1129. (for more information see ePAPR specification)
  1130. * DMA Bus child
  1131. Optional property:
  1132. - dma-ranges: <empty> value. if present - It means that DMA addresses
  1133. translation has to be enabled for this device.
  1134. - dma-coherent: Present if dma operations are coherent
  1135. Example:
  1136. soc {
  1137. compatible = "ti,keystone","simple-bus";
  1138. ranges = <0x0 0x0 0x0 0xc0000000>;
  1139. dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
  1140. [...]
  1141. usb: usb@2680000 {
  1142. compatible = "ti,keystone-dwc3";
  1143. [...]
  1144. dma-coherent;
  1145. };
  1146. };
  1147. Appendix A - Sample SOC node for MPC8540
  1148. ========================================
  1149. soc@e0000000 {
  1150. #address-cells = <1>;
  1151. #size-cells = <1>;
  1152. compatible = "fsl,mpc8540-ccsr", "simple-bus";
  1153. device_type = "soc";
  1154. ranges = <0x00000000 0xe0000000 0x00100000>
  1155. bus-frequency = <0>;
  1156. interrupt-parent = <&pic>;
  1157. ethernet@24000 {
  1158. #address-cells = <1>;
  1159. #size-cells = <1>;
  1160. device_type = "network";
  1161. model = "TSEC";
  1162. compatible = "gianfar", "simple-bus";
  1163. reg = <0x24000 0x1000>;
  1164. local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x00 ];
  1165. interrupts = <0x29 2 0x30 2 0x34 2>;
  1166. phy-handle = <&phy0>;
  1167. sleep = <&pmc 0x00000080>;
  1168. ranges;
  1169. mdio@24520 {
  1170. reg = <0x24520 0x20>;
  1171. compatible = "fsl,gianfar-mdio";
  1172. phy0: ethernet-phy@0 {
  1173. interrupts = <5 1>;
  1174. reg = <0>;
  1175. };
  1176. phy1: ethernet-phy@1 {
  1177. interrupts = <5 1>;
  1178. reg = <1>;
  1179. };
  1180. phy3: ethernet-phy@3 {
  1181. interrupts = <7 1>;
  1182. reg = <3>;
  1183. };
  1184. };
  1185. };
  1186. ethernet@25000 {
  1187. device_type = "network";
  1188. model = "TSEC";
  1189. compatible = "gianfar";
  1190. reg = <0x25000 0x1000>;
  1191. local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x01 ];
  1192. interrupts = <0x13 2 0x14 2 0x18 2>;
  1193. phy-handle = <&phy1>;
  1194. sleep = <&pmc 0x00000040>;
  1195. };
  1196. ethernet@26000 {
  1197. device_type = "network";
  1198. model = "FEC";
  1199. compatible = "gianfar";
  1200. reg = <0x26000 0x1000>;
  1201. local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x02 ];
  1202. interrupts = <0x41 2>;
  1203. phy-handle = <&phy3>;
  1204. sleep = <&pmc 0x00000020>;
  1205. };
  1206. serial@4500 {
  1207. #address-cells = <1>;
  1208. #size-cells = <1>;
  1209. compatible = "fsl,mpc8540-duart", "simple-bus";
  1210. sleep = <&pmc 0x00000002>;
  1211. ranges;
  1212. serial@4500 {
  1213. device_type = "serial";
  1214. compatible = "ns16550";
  1215. reg = <0x4500 0x100>;
  1216. clock-frequency = <0>;
  1217. interrupts = <0x42 2>;
  1218. };
  1219. serial@4600 {
  1220. device_type = "serial";
  1221. compatible = "ns16550";
  1222. reg = <0x4600 0x100>;
  1223. clock-frequency = <0>;
  1224. interrupts = <0x42 2>;
  1225. };
  1226. };
  1227. pic: pic@40000 {
  1228. interrupt-controller;
  1229. #address-cells = <0>;
  1230. #interrupt-cells = <2>;
  1231. reg = <0x40000 0x40000>;
  1232. compatible = "chrp,open-pic";
  1233. device_type = "open-pic";
  1234. };
  1235. i2c@3000 {
  1236. interrupts = <0x43 2>;
  1237. reg = <0x3000 0x100>;
  1238. compatible = "fsl-i2c";
  1239. dfsrr;
  1240. sleep = <&pmc 0x00000004>;
  1241. };
  1242. pmc: power@e0070 {
  1243. compatible = "fsl,mpc8540-pmc", "fsl,mpc8548-pmc";
  1244. reg = <0xe0070 0x20>;
  1245. };
  1246. };