rcpm.txt 2.2 KB

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  1. * Run Control and Power Management
  2. -------------------------------------------
  3. The RCPM performs all device-level tasks associated with device run control
  4. and power management.
  5. Required properites:
  6. - reg : Offset and length of the register set of the RCPM block.
  7. - fsl,#rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the
  8. fsl,rcpm-wakeup property.
  9. - compatible : Must contain a chip-specific RCPM block compatible string
  10. and (if applicable) may contain a chassis-version RCPM compatible
  11. string. Chip-specific strings are of the form "fsl,<chip>-rcpm",
  12. such as:
  13. * "fsl,p2041-rcpm"
  14. * "fsl,p5020-rcpm"
  15. * "fsl,t4240-rcpm"
  16. Chassis-version strings are of the form "fsl,qoriq-rcpm-<version>",
  17. such as:
  18. * "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
  19. * "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
  20. * "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm
  21. All references to "1.0" and "2.0" refer to the QorIQ chassis version to
  22. which the chip complies.
  23. Chassis Version Example Chips
  24. --------------- -------------------------------
  25. 1.0 p4080, p5020, p5040, p2041, p3041
  26. 2.0 t4240, b4860, b4420
  27. 2.1 t1040, ls1021
  28. Example:
  29. The RCPM node for T4240:
  30. rcpm: global-utilities@e2000 {
  31. compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
  32. reg = <0xe2000 0x1000>;
  33. fsl,#rcpm-wakeup-cells = <2>;
  34. };
  35. * Freescale RCPM Wakeup Source Device Tree Bindings
  36. -------------------------------------------
  37. Required fsl,rcpm-wakeup property should be added to a device node if the device
  38. can be used as a wakeup source.
  39. - fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR
  40. register cells. The number of IPPDEXPCR register cells is defined in
  41. "fsl,#rcpm-wakeup-cells" in the rcpm node. The first register cell is
  42. the bit mask that should be set in IPPDEXPCR0, and the second register
  43. cell is for IPPDEXPCR1, and so on.
  44. Note: IPPDEXPCR(IP Powerdown Exception Control Register) provides a
  45. mechanism for keeping certain blocks awake during STANDBY and MEM, in
  46. order to use them as wake-up sources.
  47. Example:
  48. lpuart0: serial@2950000 {
  49. compatible = "fsl,ls1021a-lpuart";
  50. reg = <0x0 0x2950000 0x0 0x1000>;
  51. interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
  52. clocks = <&sysclk>;
  53. clock-names = "ipg";
  54. fsl,rcpm-wakeup = <&rcpm 0x0 0x40000000>;
  55. };