aardvark-pci.txt 1.8 KB

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  1. Aardvark PCIe controller
  2. This PCIe controller is used on the Marvell Armada 3700 ARM64 SoC.
  3. The Device Tree node describing an Aardvark PCIe controller must
  4. contain the following properties:
  5. - compatible: Should be "marvell,armada-3700-pcie"
  6. - reg: range of registers for the PCIe controller
  7. - interrupts: the interrupt line of the PCIe controller
  8. - #address-cells: set to <3>
  9. - #size-cells: set to <2>
  10. - device_type: set to "pci"
  11. - ranges: ranges for the PCI memory and I/O regions
  12. - #interrupt-cells: set to <1>
  13. - msi-controller: indicates that the PCIe controller can itself
  14. handle MSI interrupts
  15. - msi-parent: pointer to the MSI controller to be used
  16. - interrupt-map-mask and interrupt-map: standard PCI properties to
  17. define the mapping of the PCIe interface to interrupt numbers.
  18. - bus-range: PCI bus numbers covered
  19. In addition, the Device Tree describing an Aardvark PCIe controller
  20. must include a sub-node that describes the legacy interrupt controller
  21. built into the PCIe controller. This sub-node must have the following
  22. properties:
  23. - interrupt-controller
  24. - #interrupt-cells: set to <1>
  25. Example:
  26. pcie0: pcie@d0070000 {
  27. compatible = "marvell,armada-3700-pcie";
  28. device_type = "pci";
  29. status = "disabled";
  30. reg = <0 0xd0070000 0 0x20000>;
  31. #address-cells = <3>;
  32. #size-cells = <2>;
  33. bus-range = <0x00 0xff>;
  34. interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
  35. #interrupt-cells = <1>;
  36. msi-controller;
  37. msi-parent = <&pcie0>;
  38. ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000 /* Port 0 MEM */
  39. 0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>; /* Port 0 IO*/
  40. interrupt-map-mask = <0 0 0 7>;
  41. interrupt-map = <0 0 0 1 &pcie_intc 0>,
  42. <0 0 0 2 &pcie_intc 1>,
  43. <0 0 0 3 &pcie_intc 2>,
  44. <0 0 0 4 &pcie_intc 3>;
  45. pcie_intc: interrupt-controller {
  46. interrupt-controller;
  47. #interrupt-cells = <1>;
  48. };
  49. };