mediatek-vcodec.txt 2.4 KB

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  1. Mediatek Video Codec
  2. Mediatek Video Codec is the video codec hw present in Mediatek SoCs which
  3. supports high resolution encoding functionalities.
  4. Required properties:
  5. - compatible : "mediatek,mt8173-vcodec-enc" for encoder
  6. - reg : Physical base address of the video codec registers and length of
  7. memory mapped region.
  8. - interrupts : interrupt number to the cpu.
  9. - mediatek,larb : must contain the local arbiters in the current Socs.
  10. - clocks : list of clock specifiers, corresponding to entries in
  11. the clock-names property.
  12. - clock-names: encoder must contain "venc_sel_src", "venc_sel",
  13. - "venc_lt_sel_src", "venc_lt_sel".
  14. - iommus : should point to the respective IOMMU block with master port as
  15. argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
  16. for details.
  17. - mediatek,vpu : the node of video processor unit
  18. Example:
  19. vcodec_enc: vcodec@0x18002000 {
  20. compatible = "mediatek,mt8173-vcodec-enc";
  21. reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/
  22. <0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/
  23. interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>,
  24. <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;
  25. mediatek,larb = <&larb3>,
  26. <&larb5>;
  27. iommus = <&iommu M4U_PORT_VENC_RCPU>,
  28. <&iommu M4U_PORT_VENC_REC>,
  29. <&iommu M4U_PORT_VENC_BSDMA>,
  30. <&iommu M4U_PORT_VENC_SV_COMV>,
  31. <&iommu M4U_PORT_VENC_RD_COMV>,
  32. <&iommu M4U_PORT_VENC_CUR_LUMA>,
  33. <&iommu M4U_PORT_VENC_CUR_CHROMA>,
  34. <&iommu M4U_PORT_VENC_REF_LUMA>,
  35. <&iommu M4U_PORT_VENC_REF_CHROMA>,
  36. <&iommu M4U_PORT_VENC_NBM_RDMA>,
  37. <&iommu M4U_PORT_VENC_NBM_WDMA>,
  38. <&iommu M4U_PORT_VENC_RCPU_SET2>,
  39. <&iommu M4U_PORT_VENC_REC_FRM_SET2>,
  40. <&iommu M4U_PORT_VENC_BSDMA_SET2>,
  41. <&iommu M4U_PORT_VENC_SV_COMA_SET2>,
  42. <&iommu M4U_PORT_VENC_RD_COMA_SET2>,
  43. <&iommu M4U_PORT_VENC_CUR_LUMA_SET2>,
  44. <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>,
  45. <&iommu M4U_PORT_VENC_REF_LUMA_SET2>,
  46. <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>;
  47. mediatek,vpu = <&vpu>;
  48. clocks = <&topckgen CLK_TOP_VENCPLL_D2>,
  49. <&topckgen CLK_TOP_VENC_SEL>,
  50. <&topckgen CLK_TOP_UNIVPLL1_D2>,
  51. <&topckgen CLK_TOP_VENC_LT_SEL>;
  52. clock-names = "venc_sel_src",
  53. "venc_sel",
  54. "venc_lt_sel_src",
  55. "venc_lt_sel";
  56. };