hisilicon-hns-roce.txt 2.7 KB

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  1. Hisilicon RoCE DT description
  2. Hisilicon RoCE engine is a part of network subsystem.
  3. It works depending on other part of network wubsytem, such as, gmac and
  4. dsa fabric.
  5. Additional properties are described here:
  6. Required properties:
  7. - compatible: Should contain "hisilicon,hns-roce-v1".
  8. - reg: Physical base address of the RoCE driver and
  9. length of memory mapped region.
  10. - eth-handle: phandle, specifies a reference to a node
  11. representing a ethernet device.
  12. - dsaf-handle: phandle, specifies a reference to a node
  13. representing a dsaf device.
  14. - node_guid: a number that uniquely identifies a device or component
  15. - #address-cells: must be 2
  16. - #size-cells: must be 2
  17. Optional properties:
  18. - dma-coherent: Present if DMA operations are coherent.
  19. - interrupt-parent: the interrupt parent of this device.
  20. - interrupts: should contain 32 completion event irq,1 async event irq
  21. and 1 event overflow irq.
  22. - interrupt-names:should be one of 34 irqs for roce device
  23. - hns-roce-comp-0 ~ hns-roce-comp-31: 32 complete event irq
  24. - hns-roce-async: 1 async event irq
  25. - hns-roce-common: named common exception warning irq
  26. Example:
  27. infiniband@c4000000 {
  28. compatible = "hisilicon,hns-roce-v1";
  29. reg = <0x0 0xc4000000 0x0 0x100000>;
  30. dma-coherent;
  31. eth-handle = <&eth2 &eth3 &eth4 &eth5 &eth6 &eth7>;
  32. dsaf-handle = <&soc0_dsa>;
  33. node-guid = [00 9A CD 00 00 01 02 03];
  34. #address-cells = <2>;
  35. #size-cells = <2>;
  36. interrupt-parent = <&mbigen_dsa>;
  37. interrupts = <722 1>,
  38. <723 1>,
  39. <724 1>,
  40. <725 1>,
  41. <726 1>,
  42. <727 1>,
  43. <728 1>,
  44. <729 1>,
  45. <730 1>,
  46. <731 1>,
  47. <732 1>,
  48. <733 1>,
  49. <734 1>,
  50. <735 1>,
  51. <736 1>,
  52. <737 1>,
  53. <738 1>,
  54. <739 1>,
  55. <740 1>,
  56. <741 1>,
  57. <742 1>,
  58. <743 1>,
  59. <744 1>,
  60. <745 1>,
  61. <746 1>,
  62. <747 1>,
  63. <748 1>,
  64. <749 1>,
  65. <750 1>,
  66. <751 1>,
  67. <752 1>,
  68. <753 1>,
  69. <785 1>,
  70. <754 4>;
  71. interrupt-names = "hns-roce-comp-0",
  72. "hns-roce-comp-1",
  73. "hns-roce-comp-2",
  74. "hns-roce-comp-3",
  75. "hns-roce-comp-4",
  76. "hns-roce-comp-5",
  77. "hns-roce-comp-6",
  78. "hns-roce-comp-7",
  79. "hns-roce-comp-8",
  80. "hns-roce-comp-9",
  81. "hns-roce-comp-10",
  82. "hns-roce-comp-11",
  83. "hns-roce-comp-12",
  84. "hns-roce-comp-13",
  85. "hns-roce-comp-14",
  86. "hns-roce-comp-15",
  87. "hns-roce-comp-16",
  88. "hns-roce-comp-17",
  89. "hns-roce-comp-18",
  90. "hns-roce-comp-19",
  91. "hns-roce-comp-20",
  92. "hns-roce-comp-21",
  93. "hns-roce-comp-22",
  94. "hns-roce-comp-23",
  95. "hns-roce-comp-24",
  96. "hns-roce-comp-25",
  97. "hns-roce-comp-26",
  98. "hns-roce-comp-27",
  99. "hns-roce-comp-28",
  100. "hns-roce-comp-29",
  101. "hns-roce-comp-30",
  102. "hns-roce-comp-31",
  103. "hns-roce-async",
  104. "hns-roce-common";
  105. };