i2c.txt 3.0 KB

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  1. Generic device tree bindings for I2C busses
  2. ===========================================
  3. This document describes generic bindings which can be used to describe I2C
  4. busses in a device tree.
  5. Required properties
  6. -------------------
  7. - #address-cells - should be <1>. Read more about addresses below.
  8. - #size-cells - should be <0>.
  9. - compatible - name of I2C bus controller following generic names
  10. recommended practice.
  11. For other required properties e.g. to describe register sets,
  12. clocks, etc. check the binding documentation of the specific driver.
  13. The cells properties above define that an address of children of an I2C bus
  14. are described by a single value. This is usually a 7 bit address. However,
  15. flags can be attached to the address. I2C_TEN_BIT_ADDRESS is used to mark a 10
  16. bit address. It is needed to avoid the ambiguity between e.g. a 7 bit address
  17. of 0x50 and a 10 bit address of 0x050 which, in theory, can be on the same bus.
  18. Another flag is I2C_OWN_SLAVE_ADDRESS to mark addresses on which we listen to
  19. be devices ourselves.
  20. Optional properties
  21. -------------------
  22. These properties may not be supported by all drivers. However, if a driver
  23. wants to support one of the below features, it should adapt the bindings below.
  24. - clock-frequency
  25. frequency of bus clock in Hz.
  26. - i2c-bus
  27. For I2C adapters that have child nodes that are a mixture of both I2C
  28. devices and non-I2C devices, the 'i2c-bus' subnode can be used for
  29. populating I2C devices. If the 'i2c-bus' subnode is present, only
  30. subnodes of this will be considered as I2C slaves. The properties,
  31. '#address-cells' and '#size-cells' must be defined under this subnode
  32. if present.
  33. - i2c-scl-falling-time-ns
  34. Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
  35. specification.
  36. - i2c-scl-internal-delay-ns
  37. Number of nanoseconds the IP core additionally needs to setup SCL.
  38. - i2c-scl-rising-time-ns
  39. Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
  40. specification.
  41. - i2c-sda-falling-time-ns
  42. Number of nanoseconds the SDA signal takes to fall; t(f) in the I2C
  43. specification.
  44. - interrupts
  45. interrupts used by the device.
  46. - interrupt-names
  47. "irq" and "wakeup" names are recognized by I2C core, other names are
  48. left to individual drivers.
  49. - multi-master
  50. states that there is another master active on this bus. The OS can use
  51. this information to adapt power management to keep the arbitration awake
  52. all the time, for example.
  53. - wakeup-source
  54. device can be used as a wakeup source.
  55. - reg
  56. I2C slave addresses
  57. - reg-names
  58. Names of map programmable addresses.
  59. It can contain any map needing another address than default one.
  60. Binding may contain optional "interrupts" property, describing interrupts
  61. used by the device. I2C core will assign "irq" interrupt (or the very first
  62. interrupt if not using interrupt names) as primary interrupt for the slave.
  63. Also, if device is marked as a wakeup source, I2C core will set up "wakeup"
  64. interrupt for the device. If "wakeup" interrupt name is not present in the
  65. binding, then primary interrupt will be used as wakeup interrupt.