i2c-imx.txt 1.7 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950
  1. * Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
  2. Required properties:
  3. - compatible :
  4. - "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
  5. - "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
  6. - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
  7. - reg : Should contain I2C/HS-I2C registers location and length
  8. - interrupts : Should contain I2C/HS-I2C interrupt
  9. - clocks : Should contain the I2C/HS-I2C clock specifier
  10. Optional properties:
  11. - clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
  12. The absence of the property indicates the default frequency 100 kHz.
  13. - dmas: A list of two dma specifiers, one for each entry in dma-names.
  14. - dma-names: should contain "tx" and "rx".
  15. - scl-gpios: specify the gpio related to SCL pin
  16. - sda-gpios: specify the gpio related to SDA pin
  17. - pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c
  18. bus recovery, call it "gpio" state
  19. Examples:
  20. i2c@83fc4000 { /* I2C2 on i.MX51 */
  21. compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
  22. reg = <0x83fc4000 0x4000>;
  23. interrupts = <63>;
  24. };
  25. i2c@70038000 { /* HS-I2C on i.MX51 */
  26. compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
  27. reg = <0x70038000 0x4000>;
  28. interrupts = <64>;
  29. clock-frequency = <400000>;
  30. };
  31. i2c0: i2c@40066000 { /* i2c0 on vf610 */
  32. compatible = "fsl,vf610-i2c";
  33. reg = <0x40066000 0x1000>;
  34. interrupts =<0 71 0x04>;
  35. dmas = <&edma0 0 50>,
  36. <&edma0 0 51>;
  37. dma-names = "rx","tx";
  38. pinctrl-names = "default", "gpio";
  39. pinctrl-0 = <&pinctrl_i2c1>;
  40. pinctrl-1 = <&pinctrl_i2c1_gpio>;
  41. scl-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
  42. sda-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
  43. };