brcm,nsp-cpu-method.txt 1.2 KB

12345678910111213141516171819202122232425262728293031323334353637383940
  1. Broadcom Northstar Plus SoC CPU Enable Method
  2. ---------------------------------------------
  3. This binding defines the enable method used for starting secondary
  4. CPU in the following Broadcom SoCs:
  5. BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312
  6. The enable method is specified by defining the following required
  7. properties in the corresponding secondary "cpu" device tree node:
  8. - enable-method = "brcm,bcm-nsp-smp";
  9. - secondary-boot-reg = <...>;
  10. The secondary-boot-reg property is a u32 value that specifies the
  11. physical address of the register which should hold the common
  12. entry point for a secondary CPU. This entry is cpu node specific
  13. and should be added per cpu. E.g., in case of NSP (BCM58625) which
  14. is a dual core CPU SoC, this entry should be added to cpu1 node.
  15. Example:
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. cpu0: cpu@0 {
  20. device_type = "cpu";
  21. compatible = "arm,cortex-a9";
  22. next-level-cache = <&L2>;
  23. reg = <0>;
  24. };
  25. cpu1: cpu@1 {
  26. device_type = "cpu";
  27. compatible = "arm,cortex-a9";
  28. next-level-cache = <&L2>;
  29. enable-method = "brcm,bcm-nsp-smp";
  30. secondary-boot-reg = <0xffff042c>;
  31. reg = <1>;
  32. };
  33. };