brcm,bcm63138.txt 2.2 KB

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  1. Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
  2. -----------------------------------------------------------
  3. Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
  4. following properties:
  5. Required root node property:
  6. compatible: should be "brcm,bcm63138"
  7. An optional Boot lookup table Device Tree node is required for secondary CPU
  8. initialization as well as a 'resets' phandle to the correct PMB controller as
  9. defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
  10. 'enable-method' property.
  11. Required properties for the Boot lookup table node:
  12. - compatible: should be "brcm,bcm63138-bootlut"
  13. - reg: register base address and length for the Boot Lookup table
  14. Optional properties for the primary CPU node:
  15. - enable-method: should be "brcm,bcm63138"
  16. Optional properties for the secondary CPU node:
  17. - enable-method: should be "brcm,bcm63138"
  18. - resets: phandle to the relevant PMB controller, one integer indicating the internal
  19. bus number, and a second integer indicating the address of the CPU in the PMB
  20. internal bus number.
  21. Example:
  22. cpus {
  23. cpu@0 {
  24. compatible = "arm,cotex-a9";
  25. reg = <0>;
  26. ...
  27. enable-method = "brcm,bcm63138";
  28. };
  29. cpu@1 {
  30. compatible = "arm,cortex-a9";
  31. reg = <1>;
  32. ...
  33. enable-method = "brcm,bcm63138";
  34. resets = <&pmb0 4 1>;
  35. };
  36. };
  37. bootlut: bootlut@8000 {
  38. compatible = "brcm,bcm63138-bootlut";
  39. reg = <0x8000 0x50>;
  40. };
  41. =======
  42. reboot
  43. ------
  44. Two nodes are required for software reboot: a timer node and a syscon-reboot node.
  45. Timer node:
  46. - compatible: Must be "brcm,bcm6328-timer", "syscon"
  47. - reg: Register base address and length
  48. Syscon reboot node:
  49. See Documentation/devicetree/bindings/power/reset/syscon-reboot.txt for the
  50. detailed list of properties, the two values defined below are specific to the
  51. BCM6328-style timer:
  52. - offset: Should be 0x34 to denote the offset of the TIMER_WD_TIMER_RESET register
  53. from the beginning of the TIMER block
  54. - mask: Should be 1 for the SoftRst bit.
  55. Example:
  56. timer: timer@80 {
  57. compatible = "brcm,bcm6328-timer", "syscon";
  58. reg = <0x80 0x3c>;
  59. };
  60. reboot {
  61. compatible = "syscon-reboot";
  62. regmap = <&timer>;
  63. offset = <0x34>;
  64. mask = <0x1>;
  65. };