MSI-HOWTO.txt 11 KB

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  1. The MSI Driver Guide HOWTO
  2. Tom L Nguyen tom.l.nguyen@intel.com
  3. 10/03/2003
  4. Revised Feb 12, 2004 by Martine Silbermann
  5. email: Martine.Silbermann@hp.com
  6. Revised Jun 25, 2004 by Tom L Nguyen
  7. Revised Jul 9, 2008 by Matthew Wilcox <willy@linux.intel.com>
  8. Copyright 2003, 2008 Intel Corporation
  9. 1. About this guide
  10. This guide describes the basics of Message Signaled Interrupts (MSIs),
  11. the advantages of using MSI over traditional interrupt mechanisms, how
  12. to change your driver to use MSI or MSI-X and some basic diagnostics to
  13. try if a device doesn't support MSIs.
  14. 2. What are MSIs?
  15. A Message Signaled Interrupt is a write from the device to a special
  16. address which causes an interrupt to be received by the CPU.
  17. The MSI capability was first specified in PCI 2.2 and was later enhanced
  18. in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
  19. capability was also introduced with PCI 3.0. It supports more interrupts
  20. per device than MSI and allows interrupts to be independently configured.
  21. Devices may support both MSI and MSI-X, but only one can be enabled at
  22. a time.
  23. 3. Why use MSIs?
  24. There are three reasons why using MSIs can give an advantage over
  25. traditional pin-based interrupts.
  26. Pin-based PCI interrupts are often shared amongst several devices.
  27. To support this, the kernel must call each interrupt handler associated
  28. with an interrupt, which leads to reduced performance for the system as
  29. a whole. MSIs are never shared, so this problem cannot arise.
  30. When a device writes data to memory, then raises a pin-based interrupt,
  31. it is possible that the interrupt may arrive before all the data has
  32. arrived in memory (this becomes more likely with devices behind PCI-PCI
  33. bridges). In order to ensure that all the data has arrived in memory,
  34. the interrupt handler must read a register on the device which raised
  35. the interrupt. PCI transaction ordering rules require that all the data
  36. arrive in memory before the value may be returned from the register.
  37. Using MSIs avoids this problem as the interrupt-generating write cannot
  38. pass the data writes, so by the time the interrupt is raised, the driver
  39. knows that all the data has arrived in memory.
  40. PCI devices can only support a single pin-based interrupt per function.
  41. Often drivers have to query the device to find out what event has
  42. occurred, slowing down interrupt handling for the common case. With
  43. MSIs, a device can support more interrupts, allowing each interrupt
  44. to be specialised to a different purpose. One possible design gives
  45. infrequent conditions (such as errors) their own interrupt which allows
  46. the driver to handle the normal interrupt handling path more efficiently.
  47. Other possible designs include giving one interrupt to each packet queue
  48. in a network card or each port in a storage controller.
  49. 4. How to use MSIs
  50. PCI devices are initialised to use pin-based interrupts. The device
  51. driver has to set up the device to use MSI or MSI-X. Not all machines
  52. support MSIs correctly, and for those machines, the APIs described below
  53. will simply fail and the device will continue to use pin-based interrupts.
  54. 4.1 Include kernel support for MSIs
  55. To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
  56. option enabled. This option is only available on some architectures,
  57. and it may depend on some other options also being set. For example,
  58. on x86, you must also enable X86_UP_APIC or SMP in order to see the
  59. CONFIG_PCI_MSI option.
  60. 4.2 Using MSI
  61. Most of the hard work is done for the driver in the PCI layer. The driver
  62. simply has to request that the PCI layer set up the MSI capability for this
  63. device.
  64. To automatically use MSI or MSI-X interrupt vectors, use the following
  65. function:
  66. int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
  67. unsigned int max_vecs, unsigned int flags);
  68. which allocates up to max_vecs interrupt vectors for a PCI device. It
  69. returns the number of vectors allocated or a negative error. If the device
  70. has a requirements for a minimum number of vectors the driver can pass a
  71. min_vecs argument set to this limit, and the PCI core will return -ENOSPC
  72. if it can't meet the minimum number of vectors.
  73. The flags argument is used to specify which type of interrupt can be used
  74. by the device and the driver (PCI_IRQ_LEGACY, PCI_IRQ_MSI, PCI_IRQ_MSIX).
  75. A convenient short-hand (PCI_IRQ_ALL_TYPES) is also available to ask for
  76. any possible kind of interrupt. If the PCI_IRQ_AFFINITY flag is set,
  77. pci_alloc_irq_vectors() will spread the interrupts around the available CPUs.
  78. To get the Linux IRQ numbers passed to request_irq() and free_irq() and the
  79. vectors, use the following function:
  80. int pci_irq_vector(struct pci_dev *dev, unsigned int nr);
  81. Any allocated resources should be freed before removing the device using
  82. the following function:
  83. void pci_free_irq_vectors(struct pci_dev *dev);
  84. If a device supports both MSI-X and MSI capabilities, this API will use the
  85. MSI-X facilities in preference to the MSI facilities. MSI-X supports any
  86. number of interrupts between 1 and 2048. In contrast, MSI is restricted to
  87. a maximum of 32 interrupts (and must be a power of two). In addition, the
  88. MSI interrupt vectors must be allocated consecutively, so the system might
  89. not be able to allocate as many vectors for MSI as it could for MSI-X. On
  90. some platforms, MSI interrupts must all be targeted at the same set of CPUs
  91. whereas MSI-X interrupts can all be targeted at different CPUs.
  92. If a device supports neither MSI-X or MSI it will fall back to a single
  93. legacy IRQ vector.
  94. The typical usage of MSI or MSI-X interrupts is to allocate as many vectors
  95. as possible, likely up to the limit supported by the device. If nvec is
  96. larger than the number supported by the device it will automatically be
  97. capped to the supported limit, so there is no need to query the number of
  98. vectors supported beforehand:
  99. nvec = pci_alloc_irq_vectors(pdev, 1, nvec, PCI_IRQ_ALL_TYPES)
  100. if (nvec < 0)
  101. goto out_err;
  102. If a driver is unable or unwilling to deal with a variable number of MSI
  103. interrupts it can request a particular number of interrupts by passing that
  104. number to pci_alloc_irq_vectors() function as both 'min_vecs' and
  105. 'max_vecs' parameters:
  106. ret = pci_alloc_irq_vectors(pdev, nvec, nvec, PCI_IRQ_ALL_TYPES);
  107. if (ret < 0)
  108. goto out_err;
  109. The most notorious example of the request type described above is enabling
  110. the single MSI mode for a device. It could be done by passing two 1s as
  111. 'min_vecs' and 'max_vecs':
  112. ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
  113. if (ret < 0)
  114. goto out_err;
  115. Some devices might not support using legacy line interrupts, in which case
  116. the driver can specify that only MSI or MSI-X is acceptable:
  117. nvec = pci_alloc_irq_vectors(pdev, 1, nvec, PCI_IRQ_MSI | PCI_IRQ_MSIX);
  118. if (nvec < 0)
  119. goto out_err;
  120. 4.3 Legacy APIs
  121. The following old APIs to enable and disable MSI or MSI-X interrupts should
  122. not be used in new code:
  123. pci_enable_msi() /* deprecated */
  124. pci_enable_msi_range() /* deprecated */
  125. pci_enable_msi_exact() /* deprecated */
  126. pci_disable_msi() /* deprecated */
  127. pci_enable_msix_range() /* deprecated */
  128. pci_enable_msix_exact() /* deprecated */
  129. pci_disable_msix() /* deprecated */
  130. Additionally there are APIs to provide the number of supported MSI or MSI-X
  131. vectors: pci_msi_vec_count() and pci_msix_vec_count(). In general these
  132. should be avoided in favor of letting pci_alloc_irq_vectors() cap the
  133. number of vectors. If you have a legitimate special use case for the count
  134. of vectors we might have to revisit that decision and add a
  135. pci_nr_irq_vectors() helper that handles MSI and MSI-X transparently.
  136. 4.4 Considerations when using MSIs
  137. 4.4.1 Spinlocks
  138. Most device drivers have a per-device spinlock which is taken in the
  139. interrupt handler. With pin-based interrupts or a single MSI, it is not
  140. necessary to disable interrupts (Linux guarantees the same interrupt will
  141. not be re-entered). If a device uses multiple interrupts, the driver
  142. must disable interrupts while the lock is held. If the device sends
  143. a different interrupt, the driver will deadlock trying to recursively
  144. acquire the spinlock. Such deadlocks can be avoided by using
  145. spin_lock_irqsave() or spin_lock_irq() which disable local interrupts
  146. and acquire the lock (see Documentation/DocBook/kernel-locking).
  147. 4.5 How to tell whether MSI/MSI-X is enabled on a device
  148. Using 'lspci -v' (as root) may show some devices with "MSI", "Message
  149. Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities
  150. has an 'Enable' flag which is followed with either "+" (enabled)
  151. or "-" (disabled).
  152. 5. MSI quirks
  153. Several PCI chipsets or devices are known not to support MSIs.
  154. The PCI stack provides three ways to disable MSIs:
  155. 1. globally
  156. 2. on all devices behind a specific bridge
  157. 3. on a single device
  158. 5.1. Disabling MSIs globally
  159. Some host chipsets simply don't support MSIs properly. If we're
  160. lucky, the manufacturer knows this and has indicated it in the ACPI
  161. FADT table. In this case, Linux automatically disables MSIs.
  162. Some boards don't include this information in the table and so we have
  163. to detect them ourselves. The complete list of these is found near the
  164. quirk_disable_all_msi() function in drivers/pci/quirks.c.
  165. If you have a board which has problems with MSIs, you can pass pci=nomsi
  166. on the kernel command line to disable MSIs on all devices. It would be
  167. in your best interests to report the problem to linux-pci@vger.kernel.org
  168. including a full 'lspci -v' so we can add the quirks to the kernel.
  169. 5.2. Disabling MSIs below a bridge
  170. Some PCI bridges are not able to route MSIs between busses properly.
  171. In this case, MSIs must be disabled on all devices behind the bridge.
  172. Some bridges allow you to enable MSIs by changing some bits in their
  173. PCI configuration space (especially the Hypertransport chipsets such
  174. as the nVidia nForce and Serverworks HT2000). As with host chipsets,
  175. Linux mostly knows about them and automatically enables MSIs if it can.
  176. If you have a bridge unknown to Linux, you can enable
  177. MSIs in configuration space using whatever method you know works, then
  178. enable MSIs on that bridge by doing:
  179. echo 1 > /sys/bus/pci/devices/$bridge/msi_bus
  180. where $bridge is the PCI address of the bridge you've enabled (eg
  181. 0000:00:0e.0).
  182. To disable MSIs, echo 0 instead of 1. Changing this value should be
  183. done with caution as it could break interrupt handling for all devices
  184. below this bridge.
  185. Again, please notify linux-pci@vger.kernel.org of any bridges that need
  186. special handling.
  187. 5.3. Disabling MSIs on a single device
  188. Some devices are known to have faulty MSI implementations. Usually this
  189. is handled in the individual device driver, but occasionally it's necessary
  190. to handle this with a quirk. Some drivers have an option to disable use
  191. of MSI. While this is a convenient workaround for the driver author,
  192. it is not good practice, and should not be emulated.
  193. 5.4. Finding why MSIs are disabled on a device
  194. From the above three sections, you can see that there are many reasons
  195. why MSIs may not be enabled for a given device. Your first step should
  196. be to examine your dmesg carefully to determine whether MSIs are enabled
  197. for your machine. You should also check your .config to be sure you
  198. have enabled CONFIG_PCI_MSI.
  199. Then, 'lspci -t' gives the list of bridges above a device. Reading
  200. /sys/bus/pci/devices/*/msi_bus will tell you whether MSIs are enabled (1)
  201. or disabled (0). If 0 is found in any of the msi_bus files belonging
  202. to bridges between the PCI root and the device, MSIs are disabled.
  203. It is also worth checking the device driver to see whether it supports MSIs.
  204. For example, it may contain calls to pci_enable_msi_range() or
  205. pci_enable_msix_range().