omapfb_dss.h 23 KB

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  1. /*
  2. * Copyright (C) 2016 Texas Instruments, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. */
  9. #ifndef __OMAPFB_DSS_H
  10. #define __OMAPFB_DSS_H
  11. #include <linux/list.h>
  12. #include <linux/kobject.h>
  13. #include <linux/device.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_data/omapdss.h>
  16. #include <video/videomode.h>
  17. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  18. #define DISPC_IRQ_VSYNC (1 << 1)
  19. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  20. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  21. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  22. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  23. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  24. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  25. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  26. #define DISPC_IRQ_OCP_ERR (1 << 9)
  27. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  28. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  29. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  30. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  31. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  32. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  33. #define DISPC_IRQ_WAKEUP (1 << 16)
  34. #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
  35. #define DISPC_IRQ_VSYNC2 (1 << 18)
  36. #define DISPC_IRQ_VID3_END_WIN (1 << 19)
  37. #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
  38. #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
  39. #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
  40. #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
  41. #define DISPC_IRQ_FRAMEDONETV (1 << 24)
  42. #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
  43. #define DISPC_IRQ_WBUNCOMPLETEERROR (1 << 26)
  44. #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
  45. #define DISPC_IRQ_VSYNC3 (1 << 28)
  46. #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
  47. #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
  48. struct omap_dss_device;
  49. struct omap_overlay_manager;
  50. struct dss_lcd_mgr_config;
  51. struct snd_aes_iec958;
  52. struct snd_cea_861_aud_if;
  53. struct hdmi_avi_infoframe;
  54. enum omap_display_type {
  55. OMAP_DISPLAY_TYPE_NONE = 0,
  56. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  57. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  58. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  59. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  60. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  61. OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
  62. OMAP_DISPLAY_TYPE_DVI = 1 << 6,
  63. };
  64. enum omap_plane {
  65. OMAP_DSS_GFX = 0,
  66. OMAP_DSS_VIDEO1 = 1,
  67. OMAP_DSS_VIDEO2 = 2,
  68. OMAP_DSS_VIDEO3 = 3,
  69. OMAP_DSS_WB = 4,
  70. };
  71. enum omap_channel {
  72. OMAP_DSS_CHANNEL_LCD = 0,
  73. OMAP_DSS_CHANNEL_DIGIT = 1,
  74. OMAP_DSS_CHANNEL_LCD2 = 2,
  75. OMAP_DSS_CHANNEL_LCD3 = 3,
  76. OMAP_DSS_CHANNEL_WB = 4,
  77. };
  78. enum omap_color_mode {
  79. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  80. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  81. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  82. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  83. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  84. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  85. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  86. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  87. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  88. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  89. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  90. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  91. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  92. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  93. OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
  94. OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
  95. OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
  96. OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
  97. OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
  98. };
  99. enum omap_dss_load_mode {
  100. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  101. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  102. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  103. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  104. };
  105. enum omap_dss_trans_key_type {
  106. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  107. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  108. };
  109. enum omap_rfbi_te_mode {
  110. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  111. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  112. };
  113. enum omap_dss_signal_level {
  114. OMAPDSS_SIG_ACTIVE_LOW,
  115. OMAPDSS_SIG_ACTIVE_HIGH,
  116. };
  117. enum omap_dss_signal_edge {
  118. OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  119. OMAPDSS_DRIVE_SIG_RISING_EDGE,
  120. };
  121. enum omap_dss_venc_type {
  122. OMAP_DSS_VENC_TYPE_COMPOSITE,
  123. OMAP_DSS_VENC_TYPE_SVIDEO,
  124. };
  125. enum omap_dss_dsi_pixel_format {
  126. OMAP_DSS_DSI_FMT_RGB888,
  127. OMAP_DSS_DSI_FMT_RGB666,
  128. OMAP_DSS_DSI_FMT_RGB666_PACKED,
  129. OMAP_DSS_DSI_FMT_RGB565,
  130. };
  131. enum omap_dss_dsi_mode {
  132. OMAP_DSS_DSI_CMD_MODE = 0,
  133. OMAP_DSS_DSI_VIDEO_MODE,
  134. };
  135. enum omap_display_caps {
  136. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  137. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  138. };
  139. enum omap_dss_display_state {
  140. OMAP_DSS_DISPLAY_DISABLED = 0,
  141. OMAP_DSS_DISPLAY_ACTIVE,
  142. };
  143. enum omap_dss_rotation_type {
  144. OMAP_DSS_ROT_DMA = 1 << 0,
  145. OMAP_DSS_ROT_VRFB = 1 << 1,
  146. OMAP_DSS_ROT_TILER = 1 << 2,
  147. };
  148. /* clockwise rotation angle */
  149. enum omap_dss_rotation_angle {
  150. OMAP_DSS_ROT_0 = 0,
  151. OMAP_DSS_ROT_90 = 1,
  152. OMAP_DSS_ROT_180 = 2,
  153. OMAP_DSS_ROT_270 = 3,
  154. };
  155. enum omap_overlay_caps {
  156. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  157. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
  158. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
  159. OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
  160. OMAP_DSS_OVL_CAP_POS = 1 << 4,
  161. OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
  162. };
  163. enum omap_dss_output_id {
  164. OMAP_DSS_OUTPUT_DPI = 1 << 0,
  165. OMAP_DSS_OUTPUT_DBI = 1 << 1,
  166. OMAP_DSS_OUTPUT_SDI = 1 << 2,
  167. OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
  168. OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
  169. OMAP_DSS_OUTPUT_VENC = 1 << 5,
  170. OMAP_DSS_OUTPUT_HDMI = 1 << 6,
  171. };
  172. /* RFBI */
  173. struct rfbi_timings {
  174. int cs_on_time;
  175. int cs_off_time;
  176. int we_on_time;
  177. int we_off_time;
  178. int re_on_time;
  179. int re_off_time;
  180. int we_cycle_time;
  181. int re_cycle_time;
  182. int cs_pulse_width;
  183. int access_time;
  184. int clk_div;
  185. u32 tim[5]; /* set by rfbi_convert_timings() */
  186. int converted;
  187. };
  188. /* DSI */
  189. enum omap_dss_dsi_trans_mode {
  190. /* Sync Pulses: both sync start and end packets sent */
  191. OMAP_DSS_DSI_PULSE_MODE,
  192. /* Sync Events: only sync start packets sent */
  193. OMAP_DSS_DSI_EVENT_MODE,
  194. /* Burst: only sync start packets sent, pixels are time compressed */
  195. OMAP_DSS_DSI_BURST_MODE,
  196. };
  197. struct omap_dss_dsi_videomode_timings {
  198. unsigned long hsclk;
  199. unsigned ndl;
  200. unsigned bitspp;
  201. /* pixels */
  202. u16 hact;
  203. /* lines */
  204. u16 vact;
  205. /* DSI video mode blanking data */
  206. /* Unit: byte clock cycles */
  207. u16 hss;
  208. u16 hsa;
  209. u16 hse;
  210. u16 hfp;
  211. u16 hbp;
  212. /* Unit: line clocks */
  213. u16 vsa;
  214. u16 vfp;
  215. u16 vbp;
  216. /* DSI blanking modes */
  217. int blanking_mode;
  218. int hsa_blanking_mode;
  219. int hbp_blanking_mode;
  220. int hfp_blanking_mode;
  221. enum omap_dss_dsi_trans_mode trans_mode;
  222. bool ddr_clk_always_on;
  223. int window_sync;
  224. };
  225. struct omap_dss_dsi_config {
  226. enum omap_dss_dsi_mode mode;
  227. enum omap_dss_dsi_pixel_format pixel_format;
  228. const struct omap_video_timings *timings;
  229. unsigned long hs_clk_min, hs_clk_max;
  230. unsigned long lp_clk_min, lp_clk_max;
  231. bool ddr_clk_always_on;
  232. enum omap_dss_dsi_trans_mode trans_mode;
  233. };
  234. struct omap_video_timings {
  235. /* Unit: pixels */
  236. u16 x_res;
  237. /* Unit: pixels */
  238. u16 y_res;
  239. /* Unit: Hz */
  240. u32 pixelclock;
  241. /* Unit: pixel clocks */
  242. u16 hsw; /* Horizontal synchronization pulse width */
  243. /* Unit: pixel clocks */
  244. u16 hfp; /* Horizontal front porch */
  245. /* Unit: pixel clocks */
  246. u16 hbp; /* Horizontal back porch */
  247. /* Unit: line clocks */
  248. u16 vsw; /* Vertical synchronization pulse width */
  249. /* Unit: line clocks */
  250. u16 vfp; /* Vertical front porch */
  251. /* Unit: line clocks */
  252. u16 vbp; /* Vertical back porch */
  253. /* Vsync logic level */
  254. enum omap_dss_signal_level vsync_level;
  255. /* Hsync logic level */
  256. enum omap_dss_signal_level hsync_level;
  257. /* Interlaced or Progressive timings */
  258. bool interlace;
  259. /* Pixel clock edge to drive LCD data */
  260. enum omap_dss_signal_edge data_pclk_edge;
  261. /* Data enable logic level */
  262. enum omap_dss_signal_level de_level;
  263. /* Pixel clock edges to drive HSYNC and VSYNC signals */
  264. enum omap_dss_signal_edge sync_pclk_edge;
  265. bool double_pixel;
  266. };
  267. /* Hardcoded timings for tv modes. Venc only uses these to
  268. * identify the mode, and does not actually use the configs
  269. * itself. However, the configs should be something that
  270. * a normal monitor can also show */
  271. extern const struct omap_video_timings omap_dss_pal_timings;
  272. extern const struct omap_video_timings omap_dss_ntsc_timings;
  273. struct omap_dss_cpr_coefs {
  274. s16 rr, rg, rb;
  275. s16 gr, gg, gb;
  276. s16 br, bg, bb;
  277. };
  278. struct omap_overlay_info {
  279. dma_addr_t paddr;
  280. dma_addr_t p_uv_addr; /* for NV12 format */
  281. u16 screen_width;
  282. u16 width;
  283. u16 height;
  284. enum omap_color_mode color_mode;
  285. u8 rotation;
  286. enum omap_dss_rotation_type rotation_type;
  287. bool mirror;
  288. u16 pos_x;
  289. u16 pos_y;
  290. u16 out_width; /* if 0, out_width == width */
  291. u16 out_height; /* if 0, out_height == height */
  292. u8 global_alpha;
  293. u8 pre_mult_alpha;
  294. u8 zorder;
  295. };
  296. struct omap_overlay {
  297. struct kobject kobj;
  298. struct list_head list;
  299. /* static fields */
  300. const char *name;
  301. enum omap_plane id;
  302. enum omap_color_mode supported_modes;
  303. enum omap_overlay_caps caps;
  304. /* dynamic fields */
  305. struct omap_overlay_manager *manager;
  306. /*
  307. * The following functions do not block:
  308. *
  309. * is_enabled
  310. * set_overlay_info
  311. * get_overlay_info
  312. *
  313. * The rest of the functions may block and cannot be called from
  314. * interrupt context
  315. */
  316. int (*enable)(struct omap_overlay *ovl);
  317. int (*disable)(struct omap_overlay *ovl);
  318. bool (*is_enabled)(struct omap_overlay *ovl);
  319. int (*set_manager)(struct omap_overlay *ovl,
  320. struct omap_overlay_manager *mgr);
  321. int (*unset_manager)(struct omap_overlay *ovl);
  322. int (*set_overlay_info)(struct omap_overlay *ovl,
  323. struct omap_overlay_info *info);
  324. void (*get_overlay_info)(struct omap_overlay *ovl,
  325. struct omap_overlay_info *info);
  326. int (*wait_for_go)(struct omap_overlay *ovl);
  327. struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
  328. };
  329. struct omap_overlay_manager_info {
  330. u32 default_color;
  331. enum omap_dss_trans_key_type trans_key_type;
  332. u32 trans_key;
  333. bool trans_enabled;
  334. bool partial_alpha_enabled;
  335. bool cpr_enable;
  336. struct omap_dss_cpr_coefs cpr_coefs;
  337. };
  338. struct omap_overlay_manager {
  339. struct kobject kobj;
  340. /* static fields */
  341. const char *name;
  342. enum omap_channel id;
  343. struct list_head overlays;
  344. enum omap_display_type supported_displays;
  345. enum omap_dss_output_id supported_outputs;
  346. /* dynamic fields */
  347. struct omap_dss_device *output;
  348. /*
  349. * The following functions do not block:
  350. *
  351. * set_manager_info
  352. * get_manager_info
  353. * apply
  354. *
  355. * The rest of the functions may block and cannot be called from
  356. * interrupt context
  357. */
  358. int (*set_output)(struct omap_overlay_manager *mgr,
  359. struct omap_dss_device *output);
  360. int (*unset_output)(struct omap_overlay_manager *mgr);
  361. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  362. struct omap_overlay_manager_info *info);
  363. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  364. struct omap_overlay_manager_info *info);
  365. int (*apply)(struct omap_overlay_manager *mgr);
  366. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  367. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  368. struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
  369. };
  370. /* 22 pins means 1 clk lane and 10 data lanes */
  371. #define OMAP_DSS_MAX_DSI_PINS 22
  372. struct omap_dsi_pin_config {
  373. int num_pins;
  374. /*
  375. * pin numbers in the following order:
  376. * clk+, clk-
  377. * data1+, data1-
  378. * data2+, data2-
  379. * ...
  380. */
  381. int pins[OMAP_DSS_MAX_DSI_PINS];
  382. };
  383. struct omap_dss_writeback_info {
  384. u32 paddr;
  385. u32 p_uv_addr;
  386. u16 buf_width;
  387. u16 width;
  388. u16 height;
  389. enum omap_color_mode color_mode;
  390. u8 rotation;
  391. enum omap_dss_rotation_type rotation_type;
  392. bool mirror;
  393. u8 pre_mult_alpha;
  394. };
  395. struct omapdss_dpi_ops {
  396. int (*connect)(struct omap_dss_device *dssdev,
  397. struct omap_dss_device *dst);
  398. void (*disconnect)(struct omap_dss_device *dssdev,
  399. struct omap_dss_device *dst);
  400. int (*enable)(struct omap_dss_device *dssdev);
  401. void (*disable)(struct omap_dss_device *dssdev);
  402. int (*check_timings)(struct omap_dss_device *dssdev,
  403. struct omap_video_timings *timings);
  404. void (*set_timings)(struct omap_dss_device *dssdev,
  405. struct omap_video_timings *timings);
  406. void (*get_timings)(struct omap_dss_device *dssdev,
  407. struct omap_video_timings *timings);
  408. void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
  409. };
  410. struct omapdss_sdi_ops {
  411. int (*connect)(struct omap_dss_device *dssdev,
  412. struct omap_dss_device *dst);
  413. void (*disconnect)(struct omap_dss_device *dssdev,
  414. struct omap_dss_device *dst);
  415. int (*enable)(struct omap_dss_device *dssdev);
  416. void (*disable)(struct omap_dss_device *dssdev);
  417. int (*check_timings)(struct omap_dss_device *dssdev,
  418. struct omap_video_timings *timings);
  419. void (*set_timings)(struct omap_dss_device *dssdev,
  420. struct omap_video_timings *timings);
  421. void (*get_timings)(struct omap_dss_device *dssdev,
  422. struct omap_video_timings *timings);
  423. void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
  424. };
  425. struct omapdss_dvi_ops {
  426. int (*connect)(struct omap_dss_device *dssdev,
  427. struct omap_dss_device *dst);
  428. void (*disconnect)(struct omap_dss_device *dssdev,
  429. struct omap_dss_device *dst);
  430. int (*enable)(struct omap_dss_device *dssdev);
  431. void (*disable)(struct omap_dss_device *dssdev);
  432. int (*check_timings)(struct omap_dss_device *dssdev,
  433. struct omap_video_timings *timings);
  434. void (*set_timings)(struct omap_dss_device *dssdev,
  435. struct omap_video_timings *timings);
  436. void (*get_timings)(struct omap_dss_device *dssdev,
  437. struct omap_video_timings *timings);
  438. };
  439. struct omapdss_atv_ops {
  440. int (*connect)(struct omap_dss_device *dssdev,
  441. struct omap_dss_device *dst);
  442. void (*disconnect)(struct omap_dss_device *dssdev,
  443. struct omap_dss_device *dst);
  444. int (*enable)(struct omap_dss_device *dssdev);
  445. void (*disable)(struct omap_dss_device *dssdev);
  446. int (*check_timings)(struct omap_dss_device *dssdev,
  447. struct omap_video_timings *timings);
  448. void (*set_timings)(struct omap_dss_device *dssdev,
  449. struct omap_video_timings *timings);
  450. void (*get_timings)(struct omap_dss_device *dssdev,
  451. struct omap_video_timings *timings);
  452. void (*set_type)(struct omap_dss_device *dssdev,
  453. enum omap_dss_venc_type type);
  454. void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
  455. bool invert_polarity);
  456. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  457. u32 (*get_wss)(struct omap_dss_device *dssdev);
  458. };
  459. struct omapdss_hdmi_ops {
  460. int (*connect)(struct omap_dss_device *dssdev,
  461. struct omap_dss_device *dst);
  462. void (*disconnect)(struct omap_dss_device *dssdev,
  463. struct omap_dss_device *dst);
  464. int (*enable)(struct omap_dss_device *dssdev);
  465. void (*disable)(struct omap_dss_device *dssdev);
  466. int (*check_timings)(struct omap_dss_device *dssdev,
  467. struct omap_video_timings *timings);
  468. void (*set_timings)(struct omap_dss_device *dssdev,
  469. struct omap_video_timings *timings);
  470. void (*get_timings)(struct omap_dss_device *dssdev,
  471. struct omap_video_timings *timings);
  472. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  473. bool (*detect)(struct omap_dss_device *dssdev);
  474. int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
  475. int (*set_infoframe)(struct omap_dss_device *dssdev,
  476. const struct hdmi_avi_infoframe *avi);
  477. };
  478. struct omapdss_dsi_ops {
  479. int (*connect)(struct omap_dss_device *dssdev,
  480. struct omap_dss_device *dst);
  481. void (*disconnect)(struct omap_dss_device *dssdev,
  482. struct omap_dss_device *dst);
  483. int (*enable)(struct omap_dss_device *dssdev);
  484. void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
  485. bool enter_ulps);
  486. /* bus configuration */
  487. int (*set_config)(struct omap_dss_device *dssdev,
  488. const struct omap_dss_dsi_config *cfg);
  489. int (*configure_pins)(struct omap_dss_device *dssdev,
  490. const struct omap_dsi_pin_config *pin_cfg);
  491. void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
  492. bool enable);
  493. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  494. int (*update)(struct omap_dss_device *dssdev, int channel,
  495. void (*callback)(int, void *), void *data);
  496. void (*bus_lock)(struct omap_dss_device *dssdev);
  497. void (*bus_unlock)(struct omap_dss_device *dssdev);
  498. int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
  499. void (*disable_video_output)(struct omap_dss_device *dssdev,
  500. int channel);
  501. int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
  502. int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
  503. int vc_id);
  504. void (*release_vc)(struct omap_dss_device *dssdev, int channel);
  505. /* data transfer */
  506. int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
  507. u8 *data, int len);
  508. int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
  509. u8 *data, int len);
  510. int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  511. u8 *data, int len);
  512. int (*gen_write)(struct omap_dss_device *dssdev, int channel,
  513. u8 *data, int len);
  514. int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
  515. u8 *data, int len);
  516. int (*gen_read)(struct omap_dss_device *dssdev, int channel,
  517. u8 *reqdata, int reqlen,
  518. u8 *data, int len);
  519. int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
  520. int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
  521. int channel, u16 plen);
  522. };
  523. struct omap_dss_device {
  524. struct kobject kobj;
  525. struct device *dev;
  526. struct module *owner;
  527. struct list_head panel_list;
  528. /* alias in the form of "display%d" */
  529. char alias[16];
  530. enum omap_display_type type;
  531. enum omap_display_type output_type;
  532. union {
  533. struct {
  534. u8 data_lines;
  535. } dpi;
  536. struct {
  537. u8 channel;
  538. u8 data_lines;
  539. } rfbi;
  540. struct {
  541. u8 datapairs;
  542. } sdi;
  543. struct {
  544. int module;
  545. } dsi;
  546. struct {
  547. enum omap_dss_venc_type type;
  548. bool invert_polarity;
  549. } venc;
  550. } phy;
  551. struct {
  552. struct omap_video_timings timings;
  553. enum omap_dss_dsi_pixel_format dsi_pix_fmt;
  554. enum omap_dss_dsi_mode dsi_mode;
  555. } panel;
  556. struct {
  557. u8 pixel_size;
  558. struct rfbi_timings rfbi_timings;
  559. } ctrl;
  560. const char *name;
  561. /* used to match device to driver */
  562. const char *driver_name;
  563. void *data;
  564. struct omap_dss_driver *driver;
  565. union {
  566. const struct omapdss_dpi_ops *dpi;
  567. const struct omapdss_sdi_ops *sdi;
  568. const struct omapdss_dvi_ops *dvi;
  569. const struct omapdss_hdmi_ops *hdmi;
  570. const struct omapdss_atv_ops *atv;
  571. const struct omapdss_dsi_ops *dsi;
  572. } ops;
  573. /* helper variable for driver suspend/resume */
  574. bool activate_after_resume;
  575. enum omap_display_caps caps;
  576. struct omap_dss_device *src;
  577. enum omap_dss_display_state state;
  578. /* OMAP DSS output specific fields */
  579. struct list_head list;
  580. /* DISPC channel for this output */
  581. enum omap_channel dispc_channel;
  582. bool dispc_channel_connected;
  583. /* output instance */
  584. enum omap_dss_output_id id;
  585. /* the port number in the DT node */
  586. int port_num;
  587. /* dynamic fields */
  588. struct omap_overlay_manager *manager;
  589. struct omap_dss_device *dst;
  590. };
  591. struct omap_dss_driver {
  592. int (*probe)(struct omap_dss_device *);
  593. void (*remove)(struct omap_dss_device *);
  594. int (*connect)(struct omap_dss_device *dssdev);
  595. void (*disconnect)(struct omap_dss_device *dssdev);
  596. int (*enable)(struct omap_dss_device *display);
  597. void (*disable)(struct omap_dss_device *display);
  598. int (*run_test)(struct omap_dss_device *display, int test);
  599. int (*update)(struct omap_dss_device *dssdev,
  600. u16 x, u16 y, u16 w, u16 h);
  601. int (*sync)(struct omap_dss_device *dssdev);
  602. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  603. int (*get_te)(struct omap_dss_device *dssdev);
  604. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  605. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  606. bool (*get_mirror)(struct omap_dss_device *dssdev);
  607. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  608. int (*memory_read)(struct omap_dss_device *dssdev,
  609. void *buf, size_t size,
  610. u16 x, u16 y, u16 w, u16 h);
  611. void (*get_resolution)(struct omap_dss_device *dssdev,
  612. u16 *xres, u16 *yres);
  613. void (*get_dimensions)(struct omap_dss_device *dssdev,
  614. u32 *width, u32 *height);
  615. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  616. int (*check_timings)(struct omap_dss_device *dssdev,
  617. struct omap_video_timings *timings);
  618. void (*set_timings)(struct omap_dss_device *dssdev,
  619. struct omap_video_timings *timings);
  620. void (*get_timings)(struct omap_dss_device *dssdev,
  621. struct omap_video_timings *timings);
  622. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  623. u32 (*get_wss)(struct omap_dss_device *dssdev);
  624. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  625. bool (*detect)(struct omap_dss_device *dssdev);
  626. int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
  627. int (*set_hdmi_infoframe)(struct omap_dss_device *dssdev,
  628. const struct hdmi_avi_infoframe *avi);
  629. };
  630. enum omapdss_version omapdss_get_version(void);
  631. bool omapdss_is_initialized(void);
  632. int omap_dss_register_driver(struct omap_dss_driver *);
  633. void omap_dss_unregister_driver(struct omap_dss_driver *);
  634. int omapdss_register_display(struct omap_dss_device *dssdev);
  635. void omapdss_unregister_display(struct omap_dss_device *dssdev);
  636. struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
  637. void omap_dss_put_device(struct omap_dss_device *dssdev);
  638. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  639. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  640. struct omap_dss_device *omap_dss_find_device(void *data,
  641. int (*match)(struct omap_dss_device *dssdev, void *data));
  642. const char *omapdss_get_default_display_name(void);
  643. void videomode_to_omap_video_timings(const struct videomode *vm,
  644. struct omap_video_timings *ovt);
  645. void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
  646. struct videomode *vm);
  647. int dss_feat_get_num_mgrs(void);
  648. int dss_feat_get_num_ovls(void);
  649. enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
  650. int omap_dss_get_num_overlay_managers(void);
  651. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  652. int omap_dss_get_num_overlays(void);
  653. struct omap_overlay *omap_dss_get_overlay(int num);
  654. int omapdss_register_output(struct omap_dss_device *output);
  655. void omapdss_unregister_output(struct omap_dss_device *output);
  656. struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
  657. struct omap_dss_device *omap_dss_find_output(const char *name);
  658. struct omap_dss_device *omap_dss_find_output_by_port_node(struct device_node *port);
  659. int omapdss_output_set_device(struct omap_dss_device *out,
  660. struct omap_dss_device *dssdev);
  661. int omapdss_output_unset_device(struct omap_dss_device *out);
  662. struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
  663. struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
  664. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  665. u16 *xres, u16 *yres);
  666. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  667. void omapdss_default_get_timings(struct omap_dss_device *dssdev,
  668. struct omap_video_timings *timings);
  669. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  670. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  671. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  672. int omapdss_compat_init(void);
  673. void omapdss_compat_uninit(void);
  674. static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
  675. {
  676. return dssdev->src;
  677. }
  678. static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
  679. {
  680. return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
  681. }
  682. struct device_node *
  683. omapdss_of_get_next_port(const struct device_node *parent,
  684. struct device_node *prev);
  685. struct device_node *
  686. omapdss_of_get_next_endpoint(const struct device_node *parent,
  687. struct device_node *prev);
  688. struct device_node *
  689. omapdss_of_get_first_endpoint(const struct device_node *parent);
  690. struct omap_dss_device *
  691. omapdss_of_find_source_for_first_ep(struct device_node *node);
  692. #endif /* __OMAPFB_DSS_H */