designware_i2s.h 2.2 KB

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  1. /*
  2. * Copyright (ST) 2012 Rajeev Kumar (rajeevkumar.linux@gmail.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. *
  18. */
  19. #ifndef __SOUND_DESIGNWARE_I2S_H
  20. #define __SOUND_DESIGNWARE_I2S_H
  21. #include <linux/dmaengine.h>
  22. #include <linux/types.h>
  23. /*
  24. * struct i2s_clk_config_data - represent i2s clk configuration data
  25. * @chan_nr: number of channel
  26. * @data_width: number of bits per sample (8/16/24/32 bit)
  27. * @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)
  28. */
  29. struct i2s_clk_config_data {
  30. int chan_nr;
  31. u32 data_width;
  32. u32 sample_rate;
  33. };
  34. struct i2s_platform_data {
  35. #define DWC_I2S_PLAY (1 << 0)
  36. #define DWC_I2S_RECORD (1 << 1)
  37. #define DW_I2S_SLAVE (1 << 2)
  38. #define DW_I2S_MASTER (1 << 3)
  39. unsigned int cap;
  40. int channel;
  41. u32 snd_fmts;
  42. u32 snd_rates;
  43. #define DW_I2S_QUIRK_COMP_REG_OFFSET (1 << 0)
  44. #define DW_I2S_QUIRK_COMP_PARAM1 (1 << 1)
  45. unsigned int quirks;
  46. unsigned int i2s_reg_comp1;
  47. unsigned int i2s_reg_comp2;
  48. void *play_dma_data;
  49. void *capture_dma_data;
  50. bool (*filter)(struct dma_chan *chan, void *slave);
  51. int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
  52. };
  53. struct i2s_dma_data {
  54. void *data;
  55. dma_addr_t addr;
  56. u32 max_burst;
  57. enum dma_slave_buswidth addr_width;
  58. bool (*filter)(struct dma_chan *chan, void *slave);
  59. };
  60. /* I2S DMA registers */
  61. #define I2S_RXDMA 0x01C0
  62. #define I2S_TXDMA 0x01C8
  63. #define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */
  64. #define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */
  65. #define SIX_CHANNEL_SUPPORT 6 /* up to 5.1 */
  66. #define EIGHT_CHANNEL_SUPPORT 8 /* up to 7.1 */
  67. #endif /* __SOUND_DESIGNWARE_I2S_H */