e_powersaver.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434
  1. /*
  2. * Based on documentation provided by Dave Jones. Thanks!
  3. *
  4. * Licensed under the terms of the GNU GPL License version 2.
  5. *
  6. * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  7. */
  8. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/init.h>
  12. #include <linux/cpufreq.h>
  13. #include <linux/ioport.h>
  14. #include <linux/slab.h>
  15. #include <linux/timex.h>
  16. #include <linux/io.h>
  17. #include <linux/delay.h>
  18. #include <asm/cpu_device_id.h>
  19. #include <asm/msr.h>
  20. #include <asm/tsc.h>
  21. #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
  22. #include <linux/acpi.h>
  23. #include <acpi/processor.h>
  24. #endif
  25. #define EPS_BRAND_C7M 0
  26. #define EPS_BRAND_C7 1
  27. #define EPS_BRAND_EDEN 2
  28. #define EPS_BRAND_C3 3
  29. #define EPS_BRAND_C7D 4
  30. struct eps_cpu_data {
  31. u32 fsb;
  32. #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
  33. u32 bios_limit;
  34. #endif
  35. struct cpufreq_frequency_table freq_table[];
  36. };
  37. static struct eps_cpu_data *eps_cpu[NR_CPUS];
  38. /* Module parameters */
  39. static int freq_failsafe_off;
  40. static int voltage_failsafe_off;
  41. static int set_max_voltage;
  42. #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
  43. static int ignore_acpi_limit;
  44. static struct acpi_processor_performance *eps_acpi_cpu_perf;
  45. /* Minimum necessary to get acpi_processor_get_bios_limit() working */
  46. static int eps_acpi_init(void)
  47. {
  48. eps_acpi_cpu_perf = kzalloc(sizeof(*eps_acpi_cpu_perf),
  49. GFP_KERNEL);
  50. if (!eps_acpi_cpu_perf)
  51. return -ENOMEM;
  52. if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map,
  53. GFP_KERNEL)) {
  54. kfree(eps_acpi_cpu_perf);
  55. eps_acpi_cpu_perf = NULL;
  56. return -ENOMEM;
  57. }
  58. if (acpi_processor_register_performance(eps_acpi_cpu_perf, 0)) {
  59. free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
  60. kfree(eps_acpi_cpu_perf);
  61. eps_acpi_cpu_perf = NULL;
  62. return -EIO;
  63. }
  64. return 0;
  65. }
  66. static int eps_acpi_exit(struct cpufreq_policy *policy)
  67. {
  68. if (eps_acpi_cpu_perf) {
  69. acpi_processor_unregister_performance(0);
  70. free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
  71. kfree(eps_acpi_cpu_perf);
  72. eps_acpi_cpu_perf = NULL;
  73. }
  74. return 0;
  75. }
  76. #endif
  77. static unsigned int eps_get(unsigned int cpu)
  78. {
  79. struct eps_cpu_data *centaur;
  80. u32 lo, hi;
  81. if (cpu)
  82. return 0;
  83. centaur = eps_cpu[cpu];
  84. if (centaur == NULL)
  85. return 0;
  86. /* Return current frequency */
  87. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  88. return centaur->fsb * ((lo >> 8) & 0xff);
  89. }
  90. static int eps_set_state(struct eps_cpu_data *centaur,
  91. struct cpufreq_policy *policy,
  92. u32 dest_state)
  93. {
  94. u32 lo, hi;
  95. int i;
  96. /* Wait while CPU is busy */
  97. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  98. i = 0;
  99. while (lo & ((1 << 16) | (1 << 17))) {
  100. udelay(16);
  101. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  102. i++;
  103. if (unlikely(i > 64)) {
  104. return -ENODEV;
  105. }
  106. }
  107. /* Set new multiplier and voltage */
  108. wrmsr(MSR_IA32_PERF_CTL, dest_state & 0xffff, 0);
  109. /* Wait until transition end */
  110. i = 0;
  111. do {
  112. udelay(16);
  113. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  114. i++;
  115. if (unlikely(i > 64)) {
  116. return -ENODEV;
  117. }
  118. } while (lo & ((1 << 16) | (1 << 17)));
  119. #ifdef DEBUG
  120. {
  121. u8 current_multiplier, current_voltage;
  122. /* Print voltage and multiplier */
  123. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  124. current_voltage = lo & 0xff;
  125. pr_info("Current voltage = %dmV\n", current_voltage * 16 + 700);
  126. current_multiplier = (lo >> 8) & 0xff;
  127. pr_info("Current multiplier = %d\n", current_multiplier);
  128. }
  129. #endif
  130. return 0;
  131. }
  132. static int eps_target(struct cpufreq_policy *policy, unsigned int index)
  133. {
  134. struct eps_cpu_data *centaur;
  135. unsigned int cpu = policy->cpu;
  136. unsigned int dest_state;
  137. int ret;
  138. if (unlikely(eps_cpu[cpu] == NULL))
  139. return -ENODEV;
  140. centaur = eps_cpu[cpu];
  141. /* Make frequency transition */
  142. dest_state = centaur->freq_table[index].driver_data & 0xffff;
  143. ret = eps_set_state(centaur, policy, dest_state);
  144. if (ret)
  145. pr_err("Timeout!\n");
  146. return ret;
  147. }
  148. static int eps_cpu_init(struct cpufreq_policy *policy)
  149. {
  150. unsigned int i;
  151. u32 lo, hi;
  152. u64 val;
  153. u8 current_multiplier, current_voltage;
  154. u8 max_multiplier, max_voltage;
  155. u8 min_multiplier, min_voltage;
  156. u8 brand = 0;
  157. u32 fsb;
  158. struct eps_cpu_data *centaur;
  159. struct cpuinfo_x86 *c = &cpu_data(0);
  160. struct cpufreq_frequency_table *f_table;
  161. int k, step, voltage;
  162. int ret;
  163. int states;
  164. #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
  165. unsigned int limit;
  166. #endif
  167. if (policy->cpu != 0)
  168. return -ENODEV;
  169. /* Check brand */
  170. pr_info("Detected VIA ");
  171. switch (c->x86_model) {
  172. case 10:
  173. rdmsr(0x1153, lo, hi);
  174. brand = (((lo >> 2) ^ lo) >> 18) & 3;
  175. pr_cont("Model A ");
  176. break;
  177. case 13:
  178. rdmsr(0x1154, lo, hi);
  179. brand = (((lo >> 4) ^ (lo >> 2))) & 0x000000ff;
  180. pr_cont("Model D ");
  181. break;
  182. }
  183. switch (brand) {
  184. case EPS_BRAND_C7M:
  185. pr_cont("C7-M\n");
  186. break;
  187. case EPS_BRAND_C7:
  188. pr_cont("C7\n");
  189. break;
  190. case EPS_BRAND_EDEN:
  191. pr_cont("Eden\n");
  192. break;
  193. case EPS_BRAND_C7D:
  194. pr_cont("C7-D\n");
  195. break;
  196. case EPS_BRAND_C3:
  197. pr_cont("C3\n");
  198. return -ENODEV;
  199. break;
  200. }
  201. /* Enable Enhanced PowerSaver */
  202. rdmsrl(MSR_IA32_MISC_ENABLE, val);
  203. if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
  204. val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
  205. wrmsrl(MSR_IA32_MISC_ENABLE, val);
  206. /* Can be locked at 0 */
  207. rdmsrl(MSR_IA32_MISC_ENABLE, val);
  208. if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
  209. pr_info("Can't enable Enhanced PowerSaver\n");
  210. return -ENODEV;
  211. }
  212. }
  213. /* Print voltage and multiplier */
  214. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  215. current_voltage = lo & 0xff;
  216. pr_info("Current voltage = %dmV\n", current_voltage * 16 + 700);
  217. current_multiplier = (lo >> 8) & 0xff;
  218. pr_info("Current multiplier = %d\n", current_multiplier);
  219. /* Print limits */
  220. max_voltage = hi & 0xff;
  221. pr_info("Highest voltage = %dmV\n", max_voltage * 16 + 700);
  222. max_multiplier = (hi >> 8) & 0xff;
  223. pr_info("Highest multiplier = %d\n", max_multiplier);
  224. min_voltage = (hi >> 16) & 0xff;
  225. pr_info("Lowest voltage = %dmV\n", min_voltage * 16 + 700);
  226. min_multiplier = (hi >> 24) & 0xff;
  227. pr_info("Lowest multiplier = %d\n", min_multiplier);
  228. /* Sanity checks */
  229. if (current_multiplier == 0 || max_multiplier == 0
  230. || min_multiplier == 0)
  231. return -EINVAL;
  232. if (current_multiplier > max_multiplier
  233. || max_multiplier <= min_multiplier)
  234. return -EINVAL;
  235. if (current_voltage > 0x1f || max_voltage > 0x1f)
  236. return -EINVAL;
  237. if (max_voltage < min_voltage
  238. || current_voltage < min_voltage
  239. || current_voltage > max_voltage)
  240. return -EINVAL;
  241. /* Check for systems using underclocked CPU */
  242. if (!freq_failsafe_off && max_multiplier != current_multiplier) {
  243. pr_info("Your processor is running at different frequency then its maximum. Aborting.\n");
  244. pr_info("You can use freq_failsafe_off option to disable this check.\n");
  245. return -EINVAL;
  246. }
  247. if (!voltage_failsafe_off && max_voltage != current_voltage) {
  248. pr_info("Your processor is running at different voltage then its maximum. Aborting.\n");
  249. pr_info("You can use voltage_failsafe_off option to disable this check.\n");
  250. return -EINVAL;
  251. }
  252. /* Calc FSB speed */
  253. fsb = cpu_khz / current_multiplier;
  254. #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
  255. /* Check for ACPI processor speed limit */
  256. if (!ignore_acpi_limit && !eps_acpi_init()) {
  257. if (!acpi_processor_get_bios_limit(policy->cpu, &limit)) {
  258. pr_info("ACPI limit %u.%uGHz\n",
  259. limit/1000000,
  260. (limit%1000000)/10000);
  261. eps_acpi_exit(policy);
  262. /* Check if max_multiplier is in BIOS limits */
  263. if (limit && max_multiplier * fsb > limit) {
  264. pr_info("Aborting\n");
  265. return -EINVAL;
  266. }
  267. }
  268. }
  269. #endif
  270. /* Allow user to set lower maximum voltage then that reported
  271. * by processor */
  272. if (brand == EPS_BRAND_C7M && set_max_voltage) {
  273. u32 v;
  274. /* Change mV to something hardware can use */
  275. v = (set_max_voltage - 700) / 16;
  276. /* Check if voltage is within limits */
  277. if (v >= min_voltage && v <= max_voltage) {
  278. pr_info("Setting %dmV as maximum\n", v * 16 + 700);
  279. max_voltage = v;
  280. }
  281. }
  282. /* Calc number of p-states supported */
  283. if (brand == EPS_BRAND_C7M)
  284. states = max_multiplier - min_multiplier + 1;
  285. else
  286. states = 2;
  287. /* Allocate private data and frequency table for current cpu */
  288. centaur = kzalloc(sizeof(*centaur)
  289. + (states + 1) * sizeof(struct cpufreq_frequency_table),
  290. GFP_KERNEL);
  291. if (!centaur)
  292. return -ENOMEM;
  293. eps_cpu[0] = centaur;
  294. /* Copy basic values */
  295. centaur->fsb = fsb;
  296. #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
  297. centaur->bios_limit = limit;
  298. #endif
  299. /* Fill frequency and MSR value table */
  300. f_table = &centaur->freq_table[0];
  301. if (brand != EPS_BRAND_C7M) {
  302. f_table[0].frequency = fsb * min_multiplier;
  303. f_table[0].driver_data = (min_multiplier << 8) | min_voltage;
  304. f_table[1].frequency = fsb * max_multiplier;
  305. f_table[1].driver_data = (max_multiplier << 8) | max_voltage;
  306. f_table[2].frequency = CPUFREQ_TABLE_END;
  307. } else {
  308. k = 0;
  309. step = ((max_voltage - min_voltage) * 256)
  310. / (max_multiplier - min_multiplier);
  311. for (i = min_multiplier; i <= max_multiplier; i++) {
  312. voltage = (k * step) / 256 + min_voltage;
  313. f_table[k].frequency = fsb * i;
  314. f_table[k].driver_data = (i << 8) | voltage;
  315. k++;
  316. }
  317. f_table[k].frequency = CPUFREQ_TABLE_END;
  318. }
  319. policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
  320. ret = cpufreq_table_validate_and_show(policy, &centaur->freq_table[0]);
  321. if (ret) {
  322. kfree(centaur);
  323. return ret;
  324. }
  325. return 0;
  326. }
  327. static int eps_cpu_exit(struct cpufreq_policy *policy)
  328. {
  329. unsigned int cpu = policy->cpu;
  330. /* Bye */
  331. kfree(eps_cpu[cpu]);
  332. eps_cpu[cpu] = NULL;
  333. return 0;
  334. }
  335. static struct cpufreq_driver eps_driver = {
  336. .verify = cpufreq_generic_frequency_table_verify,
  337. .target_index = eps_target,
  338. .init = eps_cpu_init,
  339. .exit = eps_cpu_exit,
  340. .get = eps_get,
  341. .name = "e_powersaver",
  342. .attr = cpufreq_generic_attr,
  343. };
  344. /* This driver will work only on Centaur C7 processors with
  345. * Enhanced SpeedStep/PowerSaver registers */
  346. static const struct x86_cpu_id eps_cpu_id[] = {
  347. { X86_VENDOR_CENTAUR, 6, X86_MODEL_ANY, X86_FEATURE_EST },
  348. {}
  349. };
  350. MODULE_DEVICE_TABLE(x86cpu, eps_cpu_id);
  351. static int __init eps_init(void)
  352. {
  353. if (!x86_match_cpu(eps_cpu_id) || boot_cpu_data.x86_model < 10)
  354. return -ENODEV;
  355. if (cpufreq_register_driver(&eps_driver))
  356. return -EINVAL;
  357. return 0;
  358. }
  359. static void __exit eps_exit(void)
  360. {
  361. cpufreq_unregister_driver(&eps_driver);
  362. }
  363. /* Allow user to overclock his machine or to change frequency to higher after
  364. * unloading module */
  365. module_param(freq_failsafe_off, int, 0644);
  366. MODULE_PARM_DESC(freq_failsafe_off, "Disable current vs max frequency check");
  367. module_param(voltage_failsafe_off, int, 0644);
  368. MODULE_PARM_DESC(voltage_failsafe_off, "Disable current vs max voltage check");
  369. #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
  370. module_param(ignore_acpi_limit, int, 0644);
  371. MODULE_PARM_DESC(ignore_acpi_limit, "Don't check ACPI's processor speed limit");
  372. #endif
  373. module_param(set_max_voltage, int, 0644);
  374. MODULE_PARM_DESC(set_max_voltage, "Set maximum CPU voltage (mV) C7-M only");
  375. MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
  376. MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
  377. MODULE_LICENSE("GPL");
  378. module_init(eps_init);
  379. module_exit(eps_exit);