clk-exynos-clkout.c 4.4 KB

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  1. /*
  2. * Copyright (c) 2014 Samsung Electronics Co., Ltd.
  3. * Author: Tomasz Figa <t.figa@samsung.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Clock driver for Exynos clock output
  10. */
  11. #include <linux/slab.h>
  12. #include <linux/clk.h>
  13. #include <linux/clk-provider.h>
  14. #include <linux/of.h>
  15. #include <linux/of_address.h>
  16. #include <linux/syscore_ops.h>
  17. #define EXYNOS_CLKOUT_NR_CLKS 1
  18. #define EXYNOS_CLKOUT_PARENTS 32
  19. #define EXYNOS_PMU_DEBUG_REG 0xa00
  20. #define EXYNOS_CLKOUT_DISABLE_SHIFT 0
  21. #define EXYNOS_CLKOUT_MUX_SHIFT 8
  22. #define EXYNOS4_CLKOUT_MUX_MASK 0xf
  23. #define EXYNOS5_CLKOUT_MUX_MASK 0x1f
  24. struct exynos_clkout {
  25. struct clk_gate gate;
  26. struct clk_mux mux;
  27. spinlock_t slock;
  28. struct clk_onecell_data data;
  29. struct clk *clk_table[EXYNOS_CLKOUT_NR_CLKS];
  30. void __iomem *reg;
  31. u32 pmu_debug_save;
  32. };
  33. static struct exynos_clkout *clkout;
  34. static int exynos_clkout_suspend(void)
  35. {
  36. clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG);
  37. return 0;
  38. }
  39. static void exynos_clkout_resume(void)
  40. {
  41. writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG);
  42. }
  43. static struct syscore_ops exynos_clkout_syscore_ops = {
  44. .suspend = exynos_clkout_suspend,
  45. .resume = exynos_clkout_resume,
  46. };
  47. static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
  48. {
  49. const char *parent_names[EXYNOS_CLKOUT_PARENTS];
  50. struct clk *parents[EXYNOS_CLKOUT_PARENTS];
  51. int parent_count;
  52. int ret;
  53. int i;
  54. clkout = kzalloc(sizeof(*clkout), GFP_KERNEL);
  55. if (!clkout)
  56. return;
  57. spin_lock_init(&clkout->slock);
  58. parent_count = 0;
  59. for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i) {
  60. char name[] = "clkoutXX";
  61. snprintf(name, sizeof(name), "clkout%d", i);
  62. parents[i] = of_clk_get_by_name(node, name);
  63. if (IS_ERR(parents[i])) {
  64. parent_names[i] = "none";
  65. continue;
  66. }
  67. parent_names[i] = __clk_get_name(parents[i]);
  68. parent_count = i + 1;
  69. }
  70. if (!parent_count)
  71. goto free_clkout;
  72. clkout->reg = of_iomap(node, 0);
  73. if (!clkout->reg)
  74. goto clks_put;
  75. clkout->gate.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
  76. clkout->gate.bit_idx = EXYNOS_CLKOUT_DISABLE_SHIFT;
  77. clkout->gate.flags = CLK_GATE_SET_TO_DISABLE;
  78. clkout->gate.lock = &clkout->slock;
  79. clkout->mux.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
  80. clkout->mux.mask = mux_mask;
  81. clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT;
  82. clkout->mux.lock = &clkout->slock;
  83. clkout->clk_table[0] = clk_register_composite(NULL, "clkout",
  84. parent_names, parent_count, &clkout->mux.hw,
  85. &clk_mux_ops, NULL, NULL, &clkout->gate.hw,
  86. &clk_gate_ops, CLK_SET_RATE_PARENT
  87. | CLK_SET_RATE_NO_REPARENT);
  88. if (IS_ERR(clkout->clk_table[0]))
  89. goto err_unmap;
  90. clkout->data.clks = clkout->clk_table;
  91. clkout->data.clk_num = EXYNOS_CLKOUT_NR_CLKS;
  92. ret = of_clk_add_provider(node, of_clk_src_onecell_get, &clkout->data);
  93. if (ret)
  94. goto err_clk_unreg;
  95. register_syscore_ops(&exynos_clkout_syscore_ops);
  96. return;
  97. err_clk_unreg:
  98. clk_unregister(clkout->clk_table[0]);
  99. err_unmap:
  100. iounmap(clkout->reg);
  101. clks_put:
  102. for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i)
  103. if (!IS_ERR(parents[i]))
  104. clk_put(parents[i]);
  105. free_clkout:
  106. kfree(clkout);
  107. pr_err("%s: failed to register clkout clock\n", __func__);
  108. }
  109. /*
  110. * We use CLK_OF_DECLARE_DRIVER initialization method to avoid setting
  111. * the OF_POPULATED flag on the pmu device tree node, so later the
  112. * Exynos PMU platform device can be properly probed with PMU driver.
  113. */
  114. static void __init exynos4_clkout_init(struct device_node *node)
  115. {
  116. exynos_clkout_init(node, EXYNOS4_CLKOUT_MUX_MASK);
  117. }
  118. CLK_OF_DECLARE_DRIVER(exynos4210_clkout, "samsung,exynos4210-pmu",
  119. exynos4_clkout_init);
  120. CLK_OF_DECLARE_DRIVER(exynos4212_clkout, "samsung,exynos4212-pmu",
  121. exynos4_clkout_init);
  122. CLK_OF_DECLARE_DRIVER(exynos4412_clkout, "samsung,exynos4412-pmu",
  123. exynos4_clkout_init);
  124. CLK_OF_DECLARE_DRIVER(exynos3250_clkout, "samsung,exynos3250-pmu",
  125. exynos4_clkout_init);
  126. static void __init exynos5_clkout_init(struct device_node *node)
  127. {
  128. exynos_clkout_init(node, EXYNOS5_CLKOUT_MUX_MASK);
  129. }
  130. CLK_OF_DECLARE_DRIVER(exynos5250_clkout, "samsung,exynos5250-pmu",
  131. exynos5_clkout_init);
  132. CLK_OF_DECLARE_DRIVER(exynos5410_clkout, "samsung,exynos5410-pmu",
  133. exynos5_clkout_init);
  134. CLK_OF_DECLARE_DRIVER(exynos5420_clkout, "samsung,exynos5420-pmu",
  135. exynos5_clkout_init);
  136. CLK_OF_DECLARE_DRIVER(exynos5433_clkout, "samsung,exynos5433-pmu",
  137. exynos5_clkout_init);