brcmstb_gisb.c 11 KB

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  1. /*
  2. * Copyright (C) 2014-2017 Broadcom
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/types.h>
  15. #include <linux/module.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/sysfs.h>
  19. #include <linux/io.h>
  20. #include <linux/string.h>
  21. #include <linux/device.h>
  22. #include <linux/list.h>
  23. #include <linux/of.h>
  24. #include <linux/bitops.h>
  25. #include <linux/pm.h>
  26. #ifdef CONFIG_ARM
  27. #include <asm/bug.h>
  28. #include <asm/signal.h>
  29. #endif
  30. #ifdef CONFIG_MIPS
  31. #include <asm/traps.h>
  32. #endif
  33. #define ARB_ERR_CAP_CLEAR (1 << 0)
  34. #define ARB_ERR_CAP_STATUS_TIMEOUT (1 << 12)
  35. #define ARB_ERR_CAP_STATUS_TEA (1 << 11)
  36. #define ARB_ERR_CAP_STATUS_WRITE (1 << 1)
  37. #define ARB_ERR_CAP_STATUS_VALID (1 << 0)
  38. enum {
  39. ARB_TIMER,
  40. ARB_ERR_CAP_CLR,
  41. ARB_ERR_CAP_HI_ADDR,
  42. ARB_ERR_CAP_ADDR,
  43. ARB_ERR_CAP_STATUS,
  44. ARB_ERR_CAP_MASTER,
  45. };
  46. static const int gisb_offsets_bcm7038[] = {
  47. [ARB_TIMER] = 0x00c,
  48. [ARB_ERR_CAP_CLR] = 0x0c4,
  49. [ARB_ERR_CAP_HI_ADDR] = -1,
  50. [ARB_ERR_CAP_ADDR] = 0x0c8,
  51. [ARB_ERR_CAP_STATUS] = 0x0d0,
  52. [ARB_ERR_CAP_MASTER] = -1,
  53. };
  54. static const int gisb_offsets_bcm7400[] = {
  55. [ARB_TIMER] = 0x00c,
  56. [ARB_ERR_CAP_CLR] = 0x0c8,
  57. [ARB_ERR_CAP_HI_ADDR] = -1,
  58. [ARB_ERR_CAP_ADDR] = 0x0cc,
  59. [ARB_ERR_CAP_STATUS] = 0x0d4,
  60. [ARB_ERR_CAP_MASTER] = 0x0d8,
  61. };
  62. static const int gisb_offsets_bcm7435[] = {
  63. [ARB_TIMER] = 0x00c,
  64. [ARB_ERR_CAP_CLR] = 0x168,
  65. [ARB_ERR_CAP_HI_ADDR] = -1,
  66. [ARB_ERR_CAP_ADDR] = 0x16c,
  67. [ARB_ERR_CAP_STATUS] = 0x174,
  68. [ARB_ERR_CAP_MASTER] = 0x178,
  69. };
  70. static const int gisb_offsets_bcm7445[] = {
  71. [ARB_TIMER] = 0x008,
  72. [ARB_ERR_CAP_CLR] = 0x7e4,
  73. [ARB_ERR_CAP_HI_ADDR] = 0x7e8,
  74. [ARB_ERR_CAP_ADDR] = 0x7ec,
  75. [ARB_ERR_CAP_STATUS] = 0x7f4,
  76. [ARB_ERR_CAP_MASTER] = 0x7f8,
  77. };
  78. struct brcmstb_gisb_arb_device {
  79. void __iomem *base;
  80. const int *gisb_offsets;
  81. bool big_endian;
  82. struct mutex lock;
  83. struct list_head next;
  84. u32 valid_mask;
  85. const char *master_names[sizeof(u32) * BITS_PER_BYTE];
  86. u32 saved_timeout;
  87. };
  88. static LIST_HEAD(brcmstb_gisb_arb_device_list);
  89. static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg)
  90. {
  91. int offset = gdev->gisb_offsets[reg];
  92. if (offset < 0) {
  93. /* return 1 if the hardware doesn't have ARB_ERR_CAP_MASTER */
  94. if (reg == ARB_ERR_CAP_MASTER)
  95. return 1;
  96. else
  97. return 0;
  98. }
  99. if (gdev->big_endian)
  100. return ioread32be(gdev->base + offset);
  101. else
  102. return ioread32(gdev->base + offset);
  103. }
  104. static u64 gisb_read_address(struct brcmstb_gisb_arb_device *gdev)
  105. {
  106. u64 value;
  107. value = gisb_read(gdev, ARB_ERR_CAP_ADDR);
  108. value |= (u64)gisb_read(gdev, ARB_ERR_CAP_HI_ADDR) << 32;
  109. return value;
  110. }
  111. static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg)
  112. {
  113. int offset = gdev->gisb_offsets[reg];
  114. if (offset == -1)
  115. return;
  116. if (gdev->big_endian)
  117. iowrite32be(val, gdev->base + offset);
  118. else
  119. iowrite32(val, gdev->base + offset);
  120. }
  121. static ssize_t gisb_arb_get_timeout(struct device *dev,
  122. struct device_attribute *attr,
  123. char *buf)
  124. {
  125. struct platform_device *pdev = to_platform_device(dev);
  126. struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev);
  127. u32 timeout;
  128. mutex_lock(&gdev->lock);
  129. timeout = gisb_read(gdev, ARB_TIMER);
  130. mutex_unlock(&gdev->lock);
  131. return sprintf(buf, "%d", timeout);
  132. }
  133. static ssize_t gisb_arb_set_timeout(struct device *dev,
  134. struct device_attribute *attr,
  135. const char *buf, size_t count)
  136. {
  137. struct platform_device *pdev = to_platform_device(dev);
  138. struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev);
  139. int val, ret;
  140. ret = kstrtoint(buf, 10, &val);
  141. if (ret < 0)
  142. return ret;
  143. if (val == 0 || val >= 0xffffffff)
  144. return -EINVAL;
  145. mutex_lock(&gdev->lock);
  146. gisb_write(gdev, val, ARB_TIMER);
  147. mutex_unlock(&gdev->lock);
  148. return count;
  149. }
  150. static const char *
  151. brcmstb_gisb_master_to_str(struct brcmstb_gisb_arb_device *gdev,
  152. u32 masters)
  153. {
  154. u32 mask = gdev->valid_mask & masters;
  155. if (hweight_long(mask) != 1)
  156. return NULL;
  157. return gdev->master_names[ffs(mask) - 1];
  158. }
  159. static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev,
  160. const char *reason)
  161. {
  162. u32 cap_status;
  163. u64 arb_addr;
  164. u32 master;
  165. const char *m_name;
  166. char m_fmt[11];
  167. cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS);
  168. /* Invalid captured address, bail out */
  169. if (!(cap_status & ARB_ERR_CAP_STATUS_VALID))
  170. return 1;
  171. /* Read the address and master */
  172. arb_addr = gisb_read_address(gdev);
  173. master = gisb_read(gdev, ARB_ERR_CAP_MASTER);
  174. m_name = brcmstb_gisb_master_to_str(gdev, master);
  175. if (!m_name) {
  176. snprintf(m_fmt, sizeof(m_fmt), "0x%08x", master);
  177. m_name = m_fmt;
  178. }
  179. pr_crit("%s: %s at 0x%llx [%c %s], core: %s\n",
  180. __func__, reason, arb_addr,
  181. cap_status & ARB_ERR_CAP_STATUS_WRITE ? 'W' : 'R',
  182. cap_status & ARB_ERR_CAP_STATUS_TIMEOUT ? "timeout" : "",
  183. m_name);
  184. /* clear the GISB error */
  185. gisb_write(gdev, ARB_ERR_CAP_CLEAR, ARB_ERR_CAP_CLR);
  186. return 0;
  187. }
  188. #ifdef CONFIG_ARM
  189. static int brcmstb_bus_error_handler(unsigned long addr, unsigned int fsr,
  190. struct pt_regs *regs)
  191. {
  192. int ret = 0;
  193. struct brcmstb_gisb_arb_device *gdev;
  194. /* iterate over each GISB arb registered handlers */
  195. list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next)
  196. ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error");
  197. /*
  198. * If it was an imprecise abort, then we need to correct the
  199. * return address to be _after_ the instruction.
  200. */
  201. if (fsr & (1 << 10))
  202. regs->ARM_pc += 4;
  203. return ret;
  204. }
  205. #endif
  206. #ifdef CONFIG_MIPS
  207. static int brcmstb_bus_error_handler(struct pt_regs *regs, int is_fixup)
  208. {
  209. int ret = 0;
  210. struct brcmstb_gisb_arb_device *gdev;
  211. u32 cap_status;
  212. list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) {
  213. cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS);
  214. /* Invalid captured address, bail out */
  215. if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) {
  216. is_fixup = 1;
  217. goto out;
  218. }
  219. ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error");
  220. }
  221. out:
  222. return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
  223. }
  224. #endif
  225. static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id)
  226. {
  227. brcmstb_gisb_arb_decode_addr(dev_id, "timeout");
  228. return IRQ_HANDLED;
  229. }
  230. static irqreturn_t brcmstb_gisb_tea_handler(int irq, void *dev_id)
  231. {
  232. brcmstb_gisb_arb_decode_addr(dev_id, "target abort");
  233. return IRQ_HANDLED;
  234. }
  235. static DEVICE_ATTR(gisb_arb_timeout, S_IWUSR | S_IRUGO,
  236. gisb_arb_get_timeout, gisb_arb_set_timeout);
  237. static struct attribute *gisb_arb_sysfs_attrs[] = {
  238. &dev_attr_gisb_arb_timeout.attr,
  239. NULL,
  240. };
  241. static struct attribute_group gisb_arb_sysfs_attr_group = {
  242. .attrs = gisb_arb_sysfs_attrs,
  243. };
  244. static const struct of_device_id brcmstb_gisb_arb_of_match[] = {
  245. { .compatible = "brcm,gisb-arb", .data = gisb_offsets_bcm7445 },
  246. { .compatible = "brcm,bcm7445-gisb-arb", .data = gisb_offsets_bcm7445 },
  247. { .compatible = "brcm,bcm7435-gisb-arb", .data = gisb_offsets_bcm7435 },
  248. { .compatible = "brcm,bcm7400-gisb-arb", .data = gisb_offsets_bcm7400 },
  249. { .compatible = "brcm,bcm7038-gisb-arb", .data = gisb_offsets_bcm7038 },
  250. { },
  251. };
  252. static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev)
  253. {
  254. struct device_node *dn = pdev->dev.of_node;
  255. struct brcmstb_gisb_arb_device *gdev;
  256. const struct of_device_id *of_id;
  257. struct resource *r;
  258. int err, timeout_irq, tea_irq;
  259. unsigned int num_masters, j = 0;
  260. int i, first, last;
  261. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  262. timeout_irq = platform_get_irq(pdev, 0);
  263. tea_irq = platform_get_irq(pdev, 1);
  264. gdev = devm_kzalloc(&pdev->dev, sizeof(*gdev), GFP_KERNEL);
  265. if (!gdev)
  266. return -ENOMEM;
  267. mutex_init(&gdev->lock);
  268. INIT_LIST_HEAD(&gdev->next);
  269. gdev->base = devm_ioremap_resource(&pdev->dev, r);
  270. if (IS_ERR(gdev->base))
  271. return PTR_ERR(gdev->base);
  272. of_id = of_match_node(brcmstb_gisb_arb_of_match, dn);
  273. if (!of_id) {
  274. pr_err("failed to look up compatible string\n");
  275. return -EINVAL;
  276. }
  277. gdev->gisb_offsets = of_id->data;
  278. gdev->big_endian = of_device_is_big_endian(dn);
  279. err = devm_request_irq(&pdev->dev, timeout_irq,
  280. brcmstb_gisb_timeout_handler, 0, pdev->name,
  281. gdev);
  282. if (err < 0)
  283. return err;
  284. err = devm_request_irq(&pdev->dev, tea_irq,
  285. brcmstb_gisb_tea_handler, 0, pdev->name,
  286. gdev);
  287. if (err < 0)
  288. return err;
  289. /* If we do not have a valid mask, assume all masters are enabled */
  290. if (of_property_read_u32(dn, "brcm,gisb-arb-master-mask",
  291. &gdev->valid_mask))
  292. gdev->valid_mask = 0xffffffff;
  293. /* Proceed with reading the litteral names if we agree on the
  294. * number of masters
  295. */
  296. num_masters = of_property_count_strings(dn,
  297. "brcm,gisb-arb-master-names");
  298. if (hweight_long(gdev->valid_mask) == num_masters) {
  299. first = ffs(gdev->valid_mask) - 1;
  300. last = fls(gdev->valid_mask) - 1;
  301. for (i = first; i < last; i++) {
  302. if (!(gdev->valid_mask & BIT(i)))
  303. continue;
  304. of_property_read_string_index(dn,
  305. "brcm,gisb-arb-master-names", j,
  306. &gdev->master_names[i]);
  307. j++;
  308. }
  309. }
  310. err = sysfs_create_group(&pdev->dev.kobj, &gisb_arb_sysfs_attr_group);
  311. if (err)
  312. return err;
  313. platform_set_drvdata(pdev, gdev);
  314. list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list);
  315. #ifdef CONFIG_ARM
  316. hook_fault_code(22, brcmstb_bus_error_handler, SIGBUS, 0,
  317. "imprecise external abort");
  318. #endif
  319. #ifdef CONFIG_MIPS
  320. board_be_handler = brcmstb_bus_error_handler;
  321. #endif
  322. dev_info(&pdev->dev, "registered mem: %p, irqs: %d, %d\n",
  323. gdev->base, timeout_irq, tea_irq);
  324. return 0;
  325. }
  326. #ifdef CONFIG_PM_SLEEP
  327. static int brcmstb_gisb_arb_suspend(struct device *dev)
  328. {
  329. struct platform_device *pdev = to_platform_device(dev);
  330. struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev);
  331. gdev->saved_timeout = gisb_read(gdev, ARB_TIMER);
  332. return 0;
  333. }
  334. /* Make sure we provide the same timeout value that was configured before, and
  335. * do this before the GISB timeout interrupt handler has any chance to run.
  336. */
  337. static int brcmstb_gisb_arb_resume_noirq(struct device *dev)
  338. {
  339. struct platform_device *pdev = to_platform_device(dev);
  340. struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev);
  341. gisb_write(gdev, gdev->saved_timeout, ARB_TIMER);
  342. return 0;
  343. }
  344. #else
  345. #define brcmstb_gisb_arb_suspend NULL
  346. #define brcmstb_gisb_arb_resume_noirq NULL
  347. #endif
  348. static const struct dev_pm_ops brcmstb_gisb_arb_pm_ops = {
  349. .suspend = brcmstb_gisb_arb_suspend,
  350. .resume_noirq = brcmstb_gisb_arb_resume_noirq,
  351. };
  352. static struct platform_driver brcmstb_gisb_arb_driver = {
  353. .driver = {
  354. .name = "brcm-gisb-arb",
  355. .of_match_table = brcmstb_gisb_arb_of_match,
  356. .pm = &brcmstb_gisb_arb_pm_ops,
  357. },
  358. };
  359. static int __init brcm_gisb_driver_init(void)
  360. {
  361. return platform_driver_probe(&brcmstb_gisb_arb_driver,
  362. brcmstb_gisb_arb_probe);
  363. }
  364. module_init(brcm_gisb_driver_init);