processor_32.h 4.8 KB

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  1. /*
  2. * include/asm-sh/processor.h
  3. *
  4. * Copyright (C) 1999, 2000 Niibe Yutaka
  5. * Copyright (C) 2002, 2003 Paul Mundt
  6. */
  7. #ifndef __ASM_SH_PROCESSOR_32_H
  8. #define __ASM_SH_PROCESSOR_32_H
  9. #ifdef __KERNEL__
  10. #include <linux/compiler.h>
  11. #include <linux/linkage.h>
  12. #include <asm/page.h>
  13. #include <asm/types.h>
  14. #include <asm/hw_breakpoint.h>
  15. /*
  16. * Default implementation of macro that returns current
  17. * instruction pointer ("program counter").
  18. */
  19. #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; })
  20. /* Core Processor Version Register */
  21. #define CCN_PVR 0xff000030
  22. #define CCN_CVR 0xff000040
  23. #define CCN_PRR 0xff000044
  24. /*
  25. * User space process size: 2GB.
  26. *
  27. * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
  28. */
  29. #define TASK_SIZE 0x7c000000UL
  30. #define STACK_TOP TASK_SIZE
  31. #define STACK_TOP_MAX STACK_TOP
  32. /* This decides where the kernel will search for a free chunk of vm
  33. * space during mmap's.
  34. */
  35. #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
  36. /*
  37. * Bit of SR register
  38. *
  39. * FD-bit:
  40. * When it's set, it means the processor doesn't have right to use FPU,
  41. * and it results exception when the floating operation is executed.
  42. *
  43. * IMASK-bit:
  44. * Interrupt level mask
  45. */
  46. #define SR_DSP 0x00001000
  47. #define SR_IMASK 0x000000f0
  48. #define SR_FD 0x00008000
  49. #define SR_MD 0x40000000
  50. /*
  51. * DSP structure and data
  52. */
  53. struct sh_dsp_struct {
  54. unsigned long dsp_regs[14];
  55. long status;
  56. };
  57. /*
  58. * FPU structure and data
  59. */
  60. struct sh_fpu_hard_struct {
  61. unsigned long fp_regs[16];
  62. unsigned long xfp_regs[16];
  63. unsigned long fpscr;
  64. unsigned long fpul;
  65. long status; /* software status information */
  66. };
  67. /* Dummy fpu emulator */
  68. struct sh_fpu_soft_struct {
  69. unsigned long fp_regs[16];
  70. unsigned long xfp_regs[16];
  71. unsigned long fpscr;
  72. unsigned long fpul;
  73. unsigned char lookahead;
  74. unsigned long entry_pc;
  75. };
  76. union thread_xstate {
  77. struct sh_fpu_hard_struct hardfpu;
  78. struct sh_fpu_soft_struct softfpu;
  79. };
  80. struct thread_struct {
  81. /* Saved registers when thread is descheduled */
  82. unsigned long sp;
  83. unsigned long pc;
  84. /* Various thread flags, see SH_THREAD_xxx */
  85. unsigned long flags;
  86. /* Save middle states of ptrace breakpoints */
  87. struct perf_event *ptrace_bps[HBP_NUM];
  88. #ifdef CONFIG_SH_DSP
  89. /* Dsp status information */
  90. struct sh_dsp_struct dsp_status;
  91. #endif
  92. /* Extended processor state */
  93. union thread_xstate *xstate;
  94. /*
  95. * fpu_counter contains the number of consecutive context switches
  96. * that the FPU is used. If this is over a threshold, the lazy fpu
  97. * saving becomes unlazy to save the trap. This is an unsigned char
  98. * so that after 256 times the counter wraps and the behavior turns
  99. * lazy again; this to deal with bursty apps that only use FPU for
  100. * a short time
  101. */
  102. unsigned char fpu_counter;
  103. };
  104. #define INIT_THREAD { \
  105. .sp = sizeof(init_stack) + (long) &init_stack, \
  106. .flags = 0, \
  107. }
  108. /* Forward declaration, a strange C thing */
  109. struct task_struct;
  110. extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp);
  111. /* Free all resources held by a thread. */
  112. extern void release_thread(struct task_struct *);
  113. /* Copy and release all segment info associated with a VM */
  114. #define copy_segments(p, mm) do { } while(0)
  115. #define release_segments(mm) do { } while(0)
  116. /*
  117. * FPU lazy state save handling.
  118. */
  119. static __inline__ void disable_fpu(void)
  120. {
  121. unsigned long __dummy;
  122. /* Set FD flag in SR */
  123. __asm__ __volatile__("stc sr, %0\n\t"
  124. "or %1, %0\n\t"
  125. "ldc %0, sr"
  126. : "=&r" (__dummy)
  127. : "r" (SR_FD));
  128. }
  129. static __inline__ void enable_fpu(void)
  130. {
  131. unsigned long __dummy;
  132. /* Clear out FD flag in SR */
  133. __asm__ __volatile__("stc sr, %0\n\t"
  134. "and %1, %0\n\t"
  135. "ldc %0, sr"
  136. : "=&r" (__dummy)
  137. : "r" (~SR_FD));
  138. }
  139. /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
  140. #define FPSCR_INIT 0x00080000
  141. #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
  142. #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
  143. /*
  144. * Return saved PC of a blocked thread.
  145. */
  146. #define thread_saved_pc(tsk) (tsk->thread.pc)
  147. void show_trace(struct task_struct *tsk, unsigned long *sp,
  148. struct pt_regs *regs);
  149. #ifdef CONFIG_DUMP_CODE
  150. void show_code(struct pt_regs *regs);
  151. #else
  152. static inline void show_code(struct pt_regs *regs)
  153. {
  154. }
  155. #endif
  156. extern unsigned long get_wchan(struct task_struct *p);
  157. #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
  158. #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
  159. #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
  160. #define PREFETCH_STRIDE L1_CACHE_BYTES
  161. #define ARCH_HAS_PREFETCH
  162. #define ARCH_HAS_PREFETCHW
  163. static inline void prefetch(const void *x)
  164. {
  165. __builtin_prefetch(x, 0, 3);
  166. }
  167. static inline void prefetchw(const void *x)
  168. {
  169. __builtin_prefetch(x, 1, 3);
  170. }
  171. #endif
  172. #endif /* __KERNEL__ */
  173. #endif /* __ASM_SH_PROCESSOR_32_H */