Kconfig.cpu 12 KB

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  1. comment "Processor Type"
  2. choice
  3. prompt "CPU family support"
  4. default M68KCLASSIC if MMU
  5. default COLDFIRE if !MMU
  6. help
  7. The Freescale (was Motorola) M68K family of processors implements
  8. the full 68000 processor instruction set.
  9. The Freescale ColdFire family of processors is a modern derivative
  10. of the 68000 processor family. They are mainly targeted at embedded
  11. applications, and are all System-On-Chip (SOC) devices, as opposed
  12. to stand alone CPUs. They implement a subset of the original 68000
  13. processor instruction set.
  14. If you anticipate running this kernel on a computer with a classic
  15. MC68xxx processor, select M68KCLASSIC.
  16. If you anticipate running this kernel on a computer with a ColdFire
  17. processor, select COLDFIRE.
  18. config M68KCLASSIC
  19. bool "Classic M68K CPU family support"
  20. config COLDFIRE
  21. bool "Coldfire CPU family support"
  22. select ARCH_HAVE_CUSTOM_GPIO_H
  23. select CPU_HAS_NO_BITFIELDS
  24. select CPU_HAS_NO_MULDIV64
  25. select GENERIC_CSUM
  26. select GPIOLIB
  27. select HAVE_CLK
  28. endchoice
  29. if M68KCLASSIC
  30. config M68000
  31. bool "MC68000"
  32. depends on !MMU
  33. select CPU_HAS_NO_BITFIELDS
  34. select CPU_HAS_NO_MULDIV64
  35. select CPU_HAS_NO_UNALIGNED
  36. select GENERIC_CSUM
  37. select CPU_NO_EFFICIENT_FFS
  38. select HAVE_ARCH_HASH
  39. help
  40. The Freescale (was Motorola) 68000 CPU is the first generation of
  41. the well known M68K family of processors. The CPU core as well as
  42. being available as a stand alone CPU was also used in many
  43. System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  44. a paging MMU.
  45. config MCPU32
  46. bool
  47. select CPU_HAS_NO_BITFIELDS
  48. select CPU_HAS_NO_UNALIGNED
  49. select CPU_NO_EFFICIENT_FFS
  50. help
  51. The Freescale (was then Motorola) CPU32 is a CPU core that is
  52. based on the 68020 processor. For the most part it is used in
  53. System-On-Chip parts, and does not contain a paging MMU.
  54. config M68020
  55. bool "68020 support"
  56. depends on MMU
  57. select FPU
  58. select CPU_HAS_ADDRESS_SPACES
  59. help
  60. If you anticipate running this kernel on a computer with a MC68020
  61. processor, say Y. Otherwise, say N. Note that the 68020 requires a
  62. 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  63. Sun 3, which provides its own version.
  64. config M68030
  65. bool "68030 support"
  66. depends on MMU && !MMU_SUN3
  67. select FPU
  68. select CPU_HAS_ADDRESS_SPACES
  69. help
  70. If you anticipate running this kernel on a computer with a MC68030
  71. processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  72. work, as it does not include an MMU (Memory Management Unit).
  73. config M68040
  74. bool "68040 support"
  75. depends on MMU && !MMU_SUN3
  76. select FPU
  77. select CPU_HAS_ADDRESS_SPACES
  78. help
  79. If you anticipate running this kernel on a computer with a MC68LC040
  80. or MC68040 processor, say Y. Otherwise, say N. Note that an
  81. MC68EC040 will not work, as it does not include an MMU (Memory
  82. Management Unit).
  83. config M68060
  84. bool "68060 support"
  85. depends on MMU && !MMU_SUN3
  86. select FPU
  87. select CPU_HAS_ADDRESS_SPACES
  88. help
  89. If you anticipate running this kernel on a computer with a MC68060
  90. processor, say Y. Otherwise, say N.
  91. config M68328
  92. bool "MC68328"
  93. depends on !MMU
  94. select M68000
  95. help
  96. Motorola 68328 processor support.
  97. config M68EZ328
  98. bool "MC68EZ328"
  99. depends on !MMU
  100. select M68000
  101. help
  102. Motorola 68EX328 processor support.
  103. config M68VZ328
  104. bool "MC68VZ328"
  105. depends on !MMU
  106. select M68000
  107. help
  108. Motorola 68VZ328 processor support.
  109. endif # M68KCLASSIC
  110. if COLDFIRE
  111. choice
  112. prompt "ColdFire SoC type"
  113. default M520x
  114. help
  115. Select the type of ColdFire System-on-Chip (SoC) that you want
  116. to build for.
  117. config M5206
  118. bool "MCF5206"
  119. depends on !MMU
  120. select COLDFIRE_SW_A7
  121. select HAVE_MBAR
  122. select CPU_NO_EFFICIENT_FFS
  123. help
  124. Motorola ColdFire 5206 processor support.
  125. config M5206e
  126. bool "MCF5206e"
  127. depends on !MMU
  128. select COLDFIRE_SW_A7
  129. select HAVE_MBAR
  130. select CPU_NO_EFFICIENT_FFS
  131. help
  132. Motorola ColdFire 5206e processor support.
  133. config M520x
  134. bool "MCF520x"
  135. depends on !MMU
  136. select GENERIC_CLOCKEVENTS
  137. select HAVE_CACHE_SPLIT
  138. help
  139. Freescale Coldfire 5207/5208 processor support.
  140. config M523x
  141. bool "MCF523x"
  142. depends on !MMU
  143. select GENERIC_CLOCKEVENTS
  144. select HAVE_CACHE_SPLIT
  145. select HAVE_IPSBAR
  146. help
  147. Freescale Coldfire 5230/1/2/4/5 processor support
  148. config M5249
  149. bool "MCF5249"
  150. depends on !MMU
  151. select COLDFIRE_SW_A7
  152. select HAVE_MBAR
  153. select CPU_NO_EFFICIENT_FFS
  154. help
  155. Motorola ColdFire 5249 processor support.
  156. config M525x
  157. bool "MCF525x"
  158. depends on !MMU
  159. select COLDFIRE_SW_A7
  160. select HAVE_MBAR
  161. select CPU_NO_EFFICIENT_FFS
  162. help
  163. Freescale (Motorola) Coldfire 5251/5253 processor support.
  164. config M5271
  165. bool "MCF5271"
  166. depends on !MMU
  167. select M527x
  168. select HAVE_CACHE_SPLIT
  169. select HAVE_IPSBAR
  170. select GENERIC_CLOCKEVENTS
  171. help
  172. Freescale (Motorola) ColdFire 5270/5271 processor support.
  173. config M5272
  174. bool "MCF5272"
  175. depends on !MMU
  176. select COLDFIRE_SW_A7
  177. select HAVE_MBAR
  178. select CPU_NO_EFFICIENT_FFS
  179. help
  180. Motorola ColdFire 5272 processor support.
  181. config M5275
  182. bool "MCF5275"
  183. depends on !MMU
  184. select M527x
  185. select HAVE_CACHE_SPLIT
  186. select HAVE_IPSBAR
  187. select GENERIC_CLOCKEVENTS
  188. help
  189. Freescale (Motorola) ColdFire 5274/5275 processor support.
  190. config M528x
  191. bool "MCF528x"
  192. depends on !MMU
  193. select GENERIC_CLOCKEVENTS
  194. select HAVE_CACHE_SPLIT
  195. select HAVE_IPSBAR
  196. help
  197. Motorola ColdFire 5280/5282 processor support.
  198. config M5307
  199. bool "MCF5307"
  200. depends on !MMU
  201. select COLDFIRE_SW_A7
  202. select HAVE_CACHE_CB
  203. select HAVE_MBAR
  204. select CPU_NO_EFFICIENT_FFS
  205. help
  206. Motorola ColdFire 5307 processor support.
  207. config M532x
  208. bool "MCF532x"
  209. depends on !MMU
  210. select M53xx
  211. select HAVE_CACHE_CB
  212. help
  213. Freescale (Motorola) ColdFire 532x processor support.
  214. config M537x
  215. bool "MCF537x"
  216. depends on !MMU
  217. select M53xx
  218. select HAVE_CACHE_CB
  219. help
  220. Freescale ColdFire 537x processor support.
  221. config M5407
  222. bool "MCF5407"
  223. depends on !MMU
  224. select COLDFIRE_SW_A7
  225. select HAVE_CACHE_CB
  226. select HAVE_MBAR
  227. select CPU_NO_EFFICIENT_FFS
  228. help
  229. Motorola ColdFire 5407 processor support.
  230. config M547x
  231. bool "MCF547x"
  232. select M54xx
  233. select MMU_COLDFIRE if MMU
  234. select FPU if MMU
  235. select HAVE_CACHE_CB
  236. select HAVE_MBAR
  237. select CPU_NO_EFFICIENT_FFS
  238. help
  239. Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
  240. config M548x
  241. bool "MCF548x"
  242. select MMU_COLDFIRE if MMU
  243. select FPU if MMU
  244. select M54xx
  245. select HAVE_CACHE_CB
  246. select HAVE_MBAR
  247. select CPU_NO_EFFICIENT_FFS
  248. help
  249. Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
  250. config M5441x
  251. bool "MCF5441x"
  252. depends on !MMU
  253. select GENERIC_CLOCKEVENTS
  254. select HAVE_CACHE_CB
  255. help
  256. Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
  257. endchoice
  258. config M527x
  259. bool
  260. config M53xx
  261. bool
  262. config M54xx
  263. bool
  264. endif # COLDFIRE
  265. comment "Processor Specific Options"
  266. config M68KFPU_EMU
  267. bool "Math emulation support"
  268. depends on MMU
  269. help
  270. At some point in the future, this will cause floating-point math
  271. instructions to be emulated by the kernel on machines that lack a
  272. floating-point math coprocessor. Thrill-seekers and chronically
  273. sleep-deprived psychotic hacker types can say Y now, everyone else
  274. should probably wait a while.
  275. config M68KFPU_EMU_EXTRAPREC
  276. bool "Math emulation extra precision"
  277. depends on M68KFPU_EMU
  278. help
  279. The fpu uses normally a few bit more during calculations for
  280. correct rounding, the emulator can (often) do the same but this
  281. extra calculation can cost quite some time, so you can disable
  282. it here. The emulator will then "only" calculate with a 64 bit
  283. mantissa and round slightly incorrect, what is more than enough
  284. for normal usage.
  285. config M68KFPU_EMU_ONLY
  286. bool "Math emulation only kernel"
  287. depends on M68KFPU_EMU
  288. help
  289. This option prevents any floating-point instructions from being
  290. compiled into the kernel, thereby the kernel doesn't save any
  291. floating point context anymore during task switches, so this
  292. kernel will only be usable on machines without a floating-point
  293. math coprocessor. This makes the kernel a bit faster as no tests
  294. needs to be executed whether a floating-point instruction in the
  295. kernel should be executed or not.
  296. config ADVANCED
  297. bool "Advanced configuration options"
  298. depends on MMU
  299. ---help---
  300. This gives you access to some advanced options for the CPU. The
  301. defaults should be fine for most users, but these options may make
  302. it possible for you to improve performance somewhat if you know what
  303. you are doing.
  304. Note that the answer to this question won't directly affect the
  305. kernel: saying N will just cause the configurator to skip all
  306. the questions about these options.
  307. Most users should say N to this question.
  308. config RMW_INSNS
  309. bool "Use read-modify-write instructions"
  310. depends on ADVANCED
  311. ---help---
  312. This allows to use certain instructions that work with indivisible
  313. read-modify-write bus cycles. While this is faster than the
  314. workaround of disabling interrupts, it can conflict with DMA
  315. ( = direct memory access) on many Amiga systems, and it is also said
  316. to destabilize other machines. It is very likely that this will
  317. cause serious problems on any Amiga or Atari Medusa if set. The only
  318. configuration where it should work are 68030-based Ataris, where it
  319. apparently improves performance. But you've been warned! Unless you
  320. really know what you are doing, say N. Try Y only if you're quite
  321. adventurous.
  322. config SINGLE_MEMORY_CHUNK
  323. bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
  324. depends on MMU
  325. default y if SUN3
  326. select NEED_MULTIPLE_NODES
  327. help
  328. Ignore all but the first contiguous chunk of physical memory for VM
  329. purposes. This will save a few bytes kernel size and may speed up
  330. some operations. Say N if not sure.
  331. config ARCH_DISCONTIGMEM_ENABLE
  332. def_bool MMU && !SINGLE_MEMORY_CHUNK
  333. config 060_WRITETHROUGH
  334. bool "Use write-through caching for 68060 supervisor accesses"
  335. depends on ADVANCED && M68060
  336. ---help---
  337. The 68060 generally uses copyback caching of recently accessed data.
  338. Copyback caching means that memory writes will be held in an on-chip
  339. cache and only written back to memory some time later. Saying Y
  340. here will force supervisor (kernel) accesses to use writethrough
  341. caching. Writethrough caching means that data is written to memory
  342. straight away, so that cache and memory data always agree.
  343. Writethrough caching is less efficient, but is needed for some
  344. drivers on 68060 based systems where the 68060 bus snooping signal
  345. is hardwired on. The 53c710 SCSI driver is known to suffer from
  346. this problem.
  347. config M68K_L2_CACHE
  348. bool
  349. depends on MAC
  350. default y
  351. config NODES_SHIFT
  352. int
  353. default "3"
  354. depends on !SINGLE_MEMORY_CHUNK
  355. config CPU_HAS_NO_BITFIELDS
  356. bool
  357. config CPU_HAS_NO_MULDIV64
  358. bool
  359. config CPU_HAS_NO_UNALIGNED
  360. bool
  361. config CPU_HAS_ADDRESS_SPACES
  362. bool
  363. config FPU
  364. bool
  365. config COLDFIRE_SW_A7
  366. bool
  367. config HAVE_CACHE_SPLIT
  368. bool
  369. config HAVE_CACHE_CB
  370. bool
  371. config HAVE_MBAR
  372. bool
  373. config HAVE_IPSBAR
  374. bool
  375. config CLOCK_FREQ
  376. int "Set the core clock frequency"
  377. default "25000000" if M5206
  378. default "54000000" if M5206e
  379. default "166666666" if M520x
  380. default "140000000" if M5249
  381. default "150000000" if M527x || M523x
  382. default "90000000" if M5307
  383. default "50000000" if M5407
  384. default "266000000" if M54xx
  385. default "66666666"
  386. depends on COLDFIRE
  387. help
  388. Define the CPU clock frequency in use. This is the core clock
  389. frequency, it may or may not be the same as the external clock
  390. crystal fitted to your board. Some processors have an internal
  391. PLL and can have their frequency programmed at run time, others
  392. use internal dividers. In general the kernel won't setup a PLL
  393. if it is fitted (there are some exceptions). This value will be
  394. specific to the exact CPU that you are using.
  395. config OLDMASK
  396. bool "Old mask 5307 (1H55J) silicon"
  397. depends on M5307
  398. help
  399. Build support for the older revision ColdFire 5307 silicon.
  400. Specifically this is the 1H55J mask revision.
  401. if HAVE_CACHE_SPLIT
  402. choice
  403. prompt "Split Cache Configuration"
  404. default CACHE_I
  405. config CACHE_I
  406. bool "Instruction"
  407. help
  408. Use all of the ColdFire CPU cache memory as an instruction cache.
  409. config CACHE_D
  410. bool "Data"
  411. help
  412. Use all of the ColdFire CPU cache memory as a data cache.
  413. config CACHE_BOTH
  414. bool "Both"
  415. help
  416. Split the ColdFire CPU cache, and use half as an instruction cache
  417. and half as a data cache.
  418. endchoice
  419. endif
  420. if HAVE_CACHE_CB
  421. choice
  422. prompt "Data cache mode"
  423. default CACHE_WRITETHRU
  424. config CACHE_WRITETHRU
  425. bool "Write-through"
  426. help
  427. The ColdFire CPU cache is set into Write-through mode.
  428. config CACHE_COPYBACK
  429. bool "Copy-back"
  430. help
  431. The ColdFire CPU cache is set into Copy-back mode.
  432. endchoice
  433. endif