pm-rcar-gen2.c 2.5 KB

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  1. /*
  2. * R-Car Generation 2 Power management support
  3. *
  4. * Copyright (C) 2013 - 2015 Renesas Electronics Corporation
  5. * Copyright (C) 2011 Renesas Solutions Corp.
  6. * Copyright (C) 2011 Magnus Damm
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/of.h>
  14. #include <linux/smp.h>
  15. #include <linux/soc/renesas/rcar-sysc.h>
  16. #include <asm/io.h>
  17. #include "common.h"
  18. #include "rcar-gen2.h"
  19. /* RST */
  20. #define RST 0xe6160000
  21. #define CA15BAR 0x0020
  22. #define CA7BAR 0x0030
  23. #define CA15RESCNT 0x0040
  24. #define CA7RESCNT 0x0044
  25. /* On-chip RAM */
  26. #define ICRAM1 0xe63c0000 /* Inter Connect RAM1 (4 KiB) */
  27. /* SYSC */
  28. #define SYSCIER 0x0c
  29. #define SYSCIMR 0x10
  30. #if defined(CONFIG_SMP)
  31. static void __init rcar_gen2_sysc_init(u32 syscier)
  32. {
  33. rcar_sysc_init(0xe6180000, syscier);
  34. }
  35. #else /* CONFIG_SMP */
  36. static inline void rcar_gen2_sysc_init(u32 syscier) {}
  37. #endif /* CONFIG_SMP */
  38. void __init rcar_gen2_pm_init(void)
  39. {
  40. void __iomem *p;
  41. u32 bar;
  42. static int once;
  43. struct device_node *np, *cpus;
  44. bool has_a7 = false;
  45. bool has_a15 = false;
  46. phys_addr_t boot_vector_addr = ICRAM1;
  47. u32 syscier = 0;
  48. if (once++)
  49. return;
  50. cpus = of_find_node_by_path("/cpus");
  51. if (!cpus)
  52. return;
  53. for_each_child_of_node(cpus, np) {
  54. if (of_device_is_compatible(np, "arm,cortex-a15"))
  55. has_a15 = true;
  56. else if (of_device_is_compatible(np, "arm,cortex-a7"))
  57. has_a7 = true;
  58. }
  59. if (of_machine_is_compatible("renesas,r8a7790"))
  60. syscier = 0x013111ef;
  61. else if (of_machine_is_compatible("renesas,r8a7791"))
  62. syscier = 0x00111003;
  63. /* RAM for jump stub, because BAR requires 256KB aligned address */
  64. p = ioremap_nocache(boot_vector_addr, shmobile_boot_size);
  65. memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
  66. iounmap(p);
  67. /* setup reset vectors */
  68. p = ioremap_nocache(RST, 0x63);
  69. bar = (boot_vector_addr >> 8) & 0xfffffc00;
  70. if (has_a15) {
  71. writel_relaxed(bar, p + CA15BAR);
  72. writel_relaxed(bar | 0x10, p + CA15BAR);
  73. /* de-assert reset for CA15 CPUs */
  74. writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) |
  75. 0xa5a50000, p + CA15RESCNT);
  76. }
  77. if (has_a7) {
  78. writel_relaxed(bar, p + CA7BAR);
  79. writel_relaxed(bar | 0x10, p + CA7BAR);
  80. /* de-assert reset for CA7 CPUs */
  81. writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) |
  82. 0x5a5a0000, p + CA7RESCNT);
  83. }
  84. iounmap(p);
  85. rcar_gen2_sysc_init(syscier);
  86. shmobile_smp_apmu_suspend_init();
  87. }