stat-shadow.c 21 KB

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  1. #include <stdio.h>
  2. #include "evsel.h"
  3. #include "stat.h"
  4. #include "color.h"
  5. #include "pmu.h"
  6. enum {
  7. CTX_BIT_USER = 1 << 0,
  8. CTX_BIT_KERNEL = 1 << 1,
  9. CTX_BIT_HV = 1 << 2,
  10. CTX_BIT_HOST = 1 << 3,
  11. CTX_BIT_IDLE = 1 << 4,
  12. CTX_BIT_MAX = 1 << 5,
  13. };
  14. #define NUM_CTX CTX_BIT_MAX
  15. /*
  16. * AGGR_GLOBAL: Use CPU 0
  17. * AGGR_SOCKET: Use first CPU of socket
  18. * AGGR_CORE: Use first CPU of core
  19. * AGGR_NONE: Use matching CPU
  20. * AGGR_THREAD: Not supported?
  21. */
  22. static struct stats runtime_nsecs_stats[MAX_NR_CPUS];
  23. static struct stats runtime_cycles_stats[NUM_CTX][MAX_NR_CPUS];
  24. static struct stats runtime_stalled_cycles_front_stats[NUM_CTX][MAX_NR_CPUS];
  25. static struct stats runtime_stalled_cycles_back_stats[NUM_CTX][MAX_NR_CPUS];
  26. static struct stats runtime_branches_stats[NUM_CTX][MAX_NR_CPUS];
  27. static struct stats runtime_cacherefs_stats[NUM_CTX][MAX_NR_CPUS];
  28. static struct stats runtime_l1_dcache_stats[NUM_CTX][MAX_NR_CPUS];
  29. static struct stats runtime_l1_icache_stats[NUM_CTX][MAX_NR_CPUS];
  30. static struct stats runtime_ll_cache_stats[NUM_CTX][MAX_NR_CPUS];
  31. static struct stats runtime_itlb_cache_stats[NUM_CTX][MAX_NR_CPUS];
  32. static struct stats runtime_dtlb_cache_stats[NUM_CTX][MAX_NR_CPUS];
  33. static struct stats runtime_cycles_in_tx_stats[NUM_CTX][MAX_NR_CPUS];
  34. static struct stats runtime_transaction_stats[NUM_CTX][MAX_NR_CPUS];
  35. static struct stats runtime_elision_stats[NUM_CTX][MAX_NR_CPUS];
  36. static struct stats runtime_topdown_total_slots[NUM_CTX][MAX_NR_CPUS];
  37. static struct stats runtime_topdown_slots_issued[NUM_CTX][MAX_NR_CPUS];
  38. static struct stats runtime_topdown_slots_retired[NUM_CTX][MAX_NR_CPUS];
  39. static struct stats runtime_topdown_fetch_bubbles[NUM_CTX][MAX_NR_CPUS];
  40. static struct stats runtime_topdown_recovery_bubbles[NUM_CTX][MAX_NR_CPUS];
  41. static bool have_frontend_stalled;
  42. struct stats walltime_nsecs_stats;
  43. void perf_stat__init_shadow_stats(void)
  44. {
  45. have_frontend_stalled = pmu_have_event("cpu", "stalled-cycles-frontend");
  46. }
  47. static int evsel_context(struct perf_evsel *evsel)
  48. {
  49. int ctx = 0;
  50. if (evsel->attr.exclude_kernel)
  51. ctx |= CTX_BIT_KERNEL;
  52. if (evsel->attr.exclude_user)
  53. ctx |= CTX_BIT_USER;
  54. if (evsel->attr.exclude_hv)
  55. ctx |= CTX_BIT_HV;
  56. if (evsel->attr.exclude_host)
  57. ctx |= CTX_BIT_HOST;
  58. if (evsel->attr.exclude_idle)
  59. ctx |= CTX_BIT_IDLE;
  60. return ctx;
  61. }
  62. void perf_stat__reset_shadow_stats(void)
  63. {
  64. memset(runtime_nsecs_stats, 0, sizeof(runtime_nsecs_stats));
  65. memset(runtime_cycles_stats, 0, sizeof(runtime_cycles_stats));
  66. memset(runtime_stalled_cycles_front_stats, 0, sizeof(runtime_stalled_cycles_front_stats));
  67. memset(runtime_stalled_cycles_back_stats, 0, sizeof(runtime_stalled_cycles_back_stats));
  68. memset(runtime_branches_stats, 0, sizeof(runtime_branches_stats));
  69. memset(runtime_cacherefs_stats, 0, sizeof(runtime_cacherefs_stats));
  70. memset(runtime_l1_dcache_stats, 0, sizeof(runtime_l1_dcache_stats));
  71. memset(runtime_l1_icache_stats, 0, sizeof(runtime_l1_icache_stats));
  72. memset(runtime_ll_cache_stats, 0, sizeof(runtime_ll_cache_stats));
  73. memset(runtime_itlb_cache_stats, 0, sizeof(runtime_itlb_cache_stats));
  74. memset(runtime_dtlb_cache_stats, 0, sizeof(runtime_dtlb_cache_stats));
  75. memset(runtime_cycles_in_tx_stats, 0,
  76. sizeof(runtime_cycles_in_tx_stats));
  77. memset(runtime_transaction_stats, 0,
  78. sizeof(runtime_transaction_stats));
  79. memset(runtime_elision_stats, 0, sizeof(runtime_elision_stats));
  80. memset(&walltime_nsecs_stats, 0, sizeof(walltime_nsecs_stats));
  81. memset(runtime_topdown_total_slots, 0, sizeof(runtime_topdown_total_slots));
  82. memset(runtime_topdown_slots_retired, 0, sizeof(runtime_topdown_slots_retired));
  83. memset(runtime_topdown_slots_issued, 0, sizeof(runtime_topdown_slots_issued));
  84. memset(runtime_topdown_fetch_bubbles, 0, sizeof(runtime_topdown_fetch_bubbles));
  85. memset(runtime_topdown_recovery_bubbles, 0, sizeof(runtime_topdown_recovery_bubbles));
  86. }
  87. /*
  88. * Update various tracking values we maintain to print
  89. * more semantic information such as miss/hit ratios,
  90. * instruction rates, etc:
  91. */
  92. void perf_stat__update_shadow_stats(struct perf_evsel *counter, u64 *count,
  93. int cpu)
  94. {
  95. int ctx = evsel_context(counter);
  96. if (perf_evsel__match(counter, SOFTWARE, SW_TASK_CLOCK) ||
  97. perf_evsel__match(counter, SOFTWARE, SW_CPU_CLOCK))
  98. update_stats(&runtime_nsecs_stats[cpu], count[0]);
  99. else if (perf_evsel__match(counter, HARDWARE, HW_CPU_CYCLES))
  100. update_stats(&runtime_cycles_stats[ctx][cpu], count[0]);
  101. else if (perf_stat_evsel__is(counter, CYCLES_IN_TX))
  102. update_stats(&runtime_cycles_in_tx_stats[ctx][cpu], count[0]);
  103. else if (perf_stat_evsel__is(counter, TRANSACTION_START))
  104. update_stats(&runtime_transaction_stats[ctx][cpu], count[0]);
  105. else if (perf_stat_evsel__is(counter, ELISION_START))
  106. update_stats(&runtime_elision_stats[ctx][cpu], count[0]);
  107. else if (perf_stat_evsel__is(counter, TOPDOWN_TOTAL_SLOTS))
  108. update_stats(&runtime_topdown_total_slots[ctx][cpu], count[0]);
  109. else if (perf_stat_evsel__is(counter, TOPDOWN_SLOTS_ISSUED))
  110. update_stats(&runtime_topdown_slots_issued[ctx][cpu], count[0]);
  111. else if (perf_stat_evsel__is(counter, TOPDOWN_SLOTS_RETIRED))
  112. update_stats(&runtime_topdown_slots_retired[ctx][cpu], count[0]);
  113. else if (perf_stat_evsel__is(counter, TOPDOWN_FETCH_BUBBLES))
  114. update_stats(&runtime_topdown_fetch_bubbles[ctx][cpu],count[0]);
  115. else if (perf_stat_evsel__is(counter, TOPDOWN_RECOVERY_BUBBLES))
  116. update_stats(&runtime_topdown_recovery_bubbles[ctx][cpu], count[0]);
  117. else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_FRONTEND))
  118. update_stats(&runtime_stalled_cycles_front_stats[ctx][cpu], count[0]);
  119. else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_BACKEND))
  120. update_stats(&runtime_stalled_cycles_back_stats[ctx][cpu], count[0]);
  121. else if (perf_evsel__match(counter, HARDWARE, HW_BRANCH_INSTRUCTIONS))
  122. update_stats(&runtime_branches_stats[ctx][cpu], count[0]);
  123. else if (perf_evsel__match(counter, HARDWARE, HW_CACHE_REFERENCES))
  124. update_stats(&runtime_cacherefs_stats[ctx][cpu], count[0]);
  125. else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1D))
  126. update_stats(&runtime_l1_dcache_stats[ctx][cpu], count[0]);
  127. else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1I))
  128. update_stats(&runtime_ll_cache_stats[ctx][cpu], count[0]);
  129. else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_LL))
  130. update_stats(&runtime_ll_cache_stats[ctx][cpu], count[0]);
  131. else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_DTLB))
  132. update_stats(&runtime_dtlb_cache_stats[ctx][cpu], count[0]);
  133. else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_ITLB))
  134. update_stats(&runtime_itlb_cache_stats[ctx][cpu], count[0]);
  135. }
  136. /* used for get_ratio_color() */
  137. enum grc_type {
  138. GRC_STALLED_CYCLES_FE,
  139. GRC_STALLED_CYCLES_BE,
  140. GRC_CACHE_MISSES,
  141. GRC_MAX_NR
  142. };
  143. static const char *get_ratio_color(enum grc_type type, double ratio)
  144. {
  145. static const double grc_table[GRC_MAX_NR][3] = {
  146. [GRC_STALLED_CYCLES_FE] = { 50.0, 30.0, 10.0 },
  147. [GRC_STALLED_CYCLES_BE] = { 75.0, 50.0, 20.0 },
  148. [GRC_CACHE_MISSES] = { 20.0, 10.0, 5.0 },
  149. };
  150. const char *color = PERF_COLOR_NORMAL;
  151. if (ratio > grc_table[type][0])
  152. color = PERF_COLOR_RED;
  153. else if (ratio > grc_table[type][1])
  154. color = PERF_COLOR_MAGENTA;
  155. else if (ratio > grc_table[type][2])
  156. color = PERF_COLOR_YELLOW;
  157. return color;
  158. }
  159. static void print_stalled_cycles_frontend(int cpu,
  160. struct perf_evsel *evsel, double avg,
  161. struct perf_stat_output_ctx *out)
  162. {
  163. double total, ratio = 0.0;
  164. const char *color;
  165. int ctx = evsel_context(evsel);
  166. total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
  167. if (total)
  168. ratio = avg / total * 100.0;
  169. color = get_ratio_color(GRC_STALLED_CYCLES_FE, ratio);
  170. if (ratio)
  171. out->print_metric(out->ctx, color, "%7.2f%%", "frontend cycles idle",
  172. ratio);
  173. else
  174. out->print_metric(out->ctx, NULL, NULL, "frontend cycles idle", 0);
  175. }
  176. static void print_stalled_cycles_backend(int cpu,
  177. struct perf_evsel *evsel, double avg,
  178. struct perf_stat_output_ctx *out)
  179. {
  180. double total, ratio = 0.0;
  181. const char *color;
  182. int ctx = evsel_context(evsel);
  183. total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
  184. if (total)
  185. ratio = avg / total * 100.0;
  186. color = get_ratio_color(GRC_STALLED_CYCLES_BE, ratio);
  187. out->print_metric(out->ctx, color, "%7.2f%%", "backend cycles idle", ratio);
  188. }
  189. static void print_branch_misses(int cpu,
  190. struct perf_evsel *evsel,
  191. double avg,
  192. struct perf_stat_output_ctx *out)
  193. {
  194. double total, ratio = 0.0;
  195. const char *color;
  196. int ctx = evsel_context(evsel);
  197. total = avg_stats(&runtime_branches_stats[ctx][cpu]);
  198. if (total)
  199. ratio = avg / total * 100.0;
  200. color = get_ratio_color(GRC_CACHE_MISSES, ratio);
  201. out->print_metric(out->ctx, color, "%7.2f%%", "of all branches", ratio);
  202. }
  203. static void print_l1_dcache_misses(int cpu,
  204. struct perf_evsel *evsel,
  205. double avg,
  206. struct perf_stat_output_ctx *out)
  207. {
  208. double total, ratio = 0.0;
  209. const char *color;
  210. int ctx = evsel_context(evsel);
  211. total = avg_stats(&runtime_l1_dcache_stats[ctx][cpu]);
  212. if (total)
  213. ratio = avg / total * 100.0;
  214. color = get_ratio_color(GRC_CACHE_MISSES, ratio);
  215. out->print_metric(out->ctx, color, "%7.2f%%", "of all L1-dcache hits", ratio);
  216. }
  217. static void print_l1_icache_misses(int cpu,
  218. struct perf_evsel *evsel,
  219. double avg,
  220. struct perf_stat_output_ctx *out)
  221. {
  222. double total, ratio = 0.0;
  223. const char *color;
  224. int ctx = evsel_context(evsel);
  225. total = avg_stats(&runtime_l1_icache_stats[ctx][cpu]);
  226. if (total)
  227. ratio = avg / total * 100.0;
  228. color = get_ratio_color(GRC_CACHE_MISSES, ratio);
  229. out->print_metric(out->ctx, color, "%7.2f%%", "of all L1-icache hits", ratio);
  230. }
  231. static void print_dtlb_cache_misses(int cpu,
  232. struct perf_evsel *evsel,
  233. double avg,
  234. struct perf_stat_output_ctx *out)
  235. {
  236. double total, ratio = 0.0;
  237. const char *color;
  238. int ctx = evsel_context(evsel);
  239. total = avg_stats(&runtime_dtlb_cache_stats[ctx][cpu]);
  240. if (total)
  241. ratio = avg / total * 100.0;
  242. color = get_ratio_color(GRC_CACHE_MISSES, ratio);
  243. out->print_metric(out->ctx, color, "%7.2f%%", "of all dTLB cache hits", ratio);
  244. }
  245. static void print_itlb_cache_misses(int cpu,
  246. struct perf_evsel *evsel,
  247. double avg,
  248. struct perf_stat_output_ctx *out)
  249. {
  250. double total, ratio = 0.0;
  251. const char *color;
  252. int ctx = evsel_context(evsel);
  253. total = avg_stats(&runtime_itlb_cache_stats[ctx][cpu]);
  254. if (total)
  255. ratio = avg / total * 100.0;
  256. color = get_ratio_color(GRC_CACHE_MISSES, ratio);
  257. out->print_metric(out->ctx, color, "%7.2f%%", "of all iTLB cache hits", ratio);
  258. }
  259. static void print_ll_cache_misses(int cpu,
  260. struct perf_evsel *evsel,
  261. double avg,
  262. struct perf_stat_output_ctx *out)
  263. {
  264. double total, ratio = 0.0;
  265. const char *color;
  266. int ctx = evsel_context(evsel);
  267. total = avg_stats(&runtime_ll_cache_stats[ctx][cpu]);
  268. if (total)
  269. ratio = avg / total * 100.0;
  270. color = get_ratio_color(GRC_CACHE_MISSES, ratio);
  271. out->print_metric(out->ctx, color, "%7.2f%%", "of all LL-cache hits", ratio);
  272. }
  273. /*
  274. * High level "TopDown" CPU core pipe line bottleneck break down.
  275. *
  276. * Basic concept following
  277. * Yasin, A Top Down Method for Performance analysis and Counter architecture
  278. * ISPASS14
  279. *
  280. * The CPU pipeline is divided into 4 areas that can be bottlenecks:
  281. *
  282. * Frontend -> Backend -> Retiring
  283. * BadSpeculation in addition means out of order execution that is thrown away
  284. * (for example branch mispredictions)
  285. * Frontend is instruction decoding.
  286. * Backend is execution, like computation and accessing data in memory
  287. * Retiring is good execution that is not directly bottlenecked
  288. *
  289. * The formulas are computed in slots.
  290. * A slot is an entry in the pipeline each for the pipeline width
  291. * (for example a 4-wide pipeline has 4 slots for each cycle)
  292. *
  293. * Formulas:
  294. * BadSpeculation = ((SlotsIssued - SlotsRetired) + RecoveryBubbles) /
  295. * TotalSlots
  296. * Retiring = SlotsRetired / TotalSlots
  297. * FrontendBound = FetchBubbles / TotalSlots
  298. * BackendBound = 1.0 - BadSpeculation - Retiring - FrontendBound
  299. *
  300. * The kernel provides the mapping to the low level CPU events and any scaling
  301. * needed for the CPU pipeline width, for example:
  302. *
  303. * TotalSlots = Cycles * 4
  304. *
  305. * The scaling factor is communicated in the sysfs unit.
  306. *
  307. * In some cases the CPU may not be able to measure all the formulas due to
  308. * missing events. In this case multiple formulas are combined, as possible.
  309. *
  310. * Full TopDown supports more levels to sub-divide each area: for example
  311. * BackendBound into computing bound and memory bound. For now we only
  312. * support Level 1 TopDown.
  313. */
  314. static double sanitize_val(double x)
  315. {
  316. if (x < 0 && x >= -0.02)
  317. return 0.0;
  318. return x;
  319. }
  320. static double td_total_slots(int ctx, int cpu)
  321. {
  322. return avg_stats(&runtime_topdown_total_slots[ctx][cpu]);
  323. }
  324. static double td_bad_spec(int ctx, int cpu)
  325. {
  326. double bad_spec = 0;
  327. double total_slots;
  328. double total;
  329. total = avg_stats(&runtime_topdown_slots_issued[ctx][cpu]) -
  330. avg_stats(&runtime_topdown_slots_retired[ctx][cpu]) +
  331. avg_stats(&runtime_topdown_recovery_bubbles[ctx][cpu]);
  332. total_slots = td_total_slots(ctx, cpu);
  333. if (total_slots)
  334. bad_spec = total / total_slots;
  335. return sanitize_val(bad_spec);
  336. }
  337. static double td_retiring(int ctx, int cpu)
  338. {
  339. double retiring = 0;
  340. double total_slots = td_total_slots(ctx, cpu);
  341. double ret_slots = avg_stats(&runtime_topdown_slots_retired[ctx][cpu]);
  342. if (total_slots)
  343. retiring = ret_slots / total_slots;
  344. return retiring;
  345. }
  346. static double td_fe_bound(int ctx, int cpu)
  347. {
  348. double fe_bound = 0;
  349. double total_slots = td_total_slots(ctx, cpu);
  350. double fetch_bub = avg_stats(&runtime_topdown_fetch_bubbles[ctx][cpu]);
  351. if (total_slots)
  352. fe_bound = fetch_bub / total_slots;
  353. return fe_bound;
  354. }
  355. static double td_be_bound(int ctx, int cpu)
  356. {
  357. double sum = (td_fe_bound(ctx, cpu) +
  358. td_bad_spec(ctx, cpu) +
  359. td_retiring(ctx, cpu));
  360. if (sum == 0)
  361. return 0;
  362. return sanitize_val(1.0 - sum);
  363. }
  364. void perf_stat__print_shadow_stats(struct perf_evsel *evsel,
  365. double avg, int cpu,
  366. struct perf_stat_output_ctx *out)
  367. {
  368. void *ctxp = out->ctx;
  369. print_metric_t print_metric = out->print_metric;
  370. double total, ratio = 0.0, total2;
  371. const char *color = NULL;
  372. int ctx = evsel_context(evsel);
  373. if (perf_evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS)) {
  374. total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
  375. if (total) {
  376. ratio = avg / total;
  377. print_metric(ctxp, NULL, "%7.2f ",
  378. "insn per cycle", ratio);
  379. } else {
  380. print_metric(ctxp, NULL, NULL, "insn per cycle", 0);
  381. }
  382. total = avg_stats(&runtime_stalled_cycles_front_stats[ctx][cpu]);
  383. total = max(total, avg_stats(&runtime_stalled_cycles_back_stats[ctx][cpu]));
  384. if (total && avg) {
  385. out->new_line(ctxp);
  386. ratio = total / avg;
  387. print_metric(ctxp, NULL, "%7.2f ",
  388. "stalled cycles per insn",
  389. ratio);
  390. } else if (have_frontend_stalled) {
  391. print_metric(ctxp, NULL, NULL,
  392. "stalled cycles per insn", 0);
  393. }
  394. } else if (perf_evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES)) {
  395. if (runtime_branches_stats[ctx][cpu].n != 0)
  396. print_branch_misses(cpu, evsel, avg, out);
  397. else
  398. print_metric(ctxp, NULL, NULL, "of all branches", 0);
  399. } else if (
  400. evsel->attr.type == PERF_TYPE_HW_CACHE &&
  401. evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1D |
  402. ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
  403. ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
  404. if (runtime_l1_dcache_stats[ctx][cpu].n != 0)
  405. print_l1_dcache_misses(cpu, evsel, avg, out);
  406. else
  407. print_metric(ctxp, NULL, NULL, "of all L1-dcache hits", 0);
  408. } else if (
  409. evsel->attr.type == PERF_TYPE_HW_CACHE &&
  410. evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1I |
  411. ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
  412. ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
  413. if (runtime_l1_icache_stats[ctx][cpu].n != 0)
  414. print_l1_icache_misses(cpu, evsel, avg, out);
  415. else
  416. print_metric(ctxp, NULL, NULL, "of all L1-icache hits", 0);
  417. } else if (
  418. evsel->attr.type == PERF_TYPE_HW_CACHE &&
  419. evsel->attr.config == ( PERF_COUNT_HW_CACHE_DTLB |
  420. ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
  421. ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
  422. if (runtime_dtlb_cache_stats[ctx][cpu].n != 0)
  423. print_dtlb_cache_misses(cpu, evsel, avg, out);
  424. else
  425. print_metric(ctxp, NULL, NULL, "of all dTLB cache hits", 0);
  426. } else if (
  427. evsel->attr.type == PERF_TYPE_HW_CACHE &&
  428. evsel->attr.config == ( PERF_COUNT_HW_CACHE_ITLB |
  429. ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
  430. ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
  431. if (runtime_itlb_cache_stats[ctx][cpu].n != 0)
  432. print_itlb_cache_misses(cpu, evsel, avg, out);
  433. else
  434. print_metric(ctxp, NULL, NULL, "of all iTLB cache hits", 0);
  435. } else if (
  436. evsel->attr.type == PERF_TYPE_HW_CACHE &&
  437. evsel->attr.config == ( PERF_COUNT_HW_CACHE_LL |
  438. ((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
  439. ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
  440. if (runtime_ll_cache_stats[ctx][cpu].n != 0)
  441. print_ll_cache_misses(cpu, evsel, avg, out);
  442. else
  443. print_metric(ctxp, NULL, NULL, "of all LL-cache hits", 0);
  444. } else if (perf_evsel__match(evsel, HARDWARE, HW_CACHE_MISSES)) {
  445. total = avg_stats(&runtime_cacherefs_stats[ctx][cpu]);
  446. if (total)
  447. ratio = avg * 100 / total;
  448. if (runtime_cacherefs_stats[ctx][cpu].n != 0)
  449. print_metric(ctxp, NULL, "%8.3f %%",
  450. "of all cache refs", ratio);
  451. else
  452. print_metric(ctxp, NULL, NULL, "of all cache refs", 0);
  453. } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_FRONTEND)) {
  454. print_stalled_cycles_frontend(cpu, evsel, avg, out);
  455. } else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_BACKEND)) {
  456. print_stalled_cycles_backend(cpu, evsel, avg, out);
  457. } else if (perf_evsel__match(evsel, HARDWARE, HW_CPU_CYCLES)) {
  458. total = avg_stats(&runtime_nsecs_stats[cpu]);
  459. if (total) {
  460. ratio = avg / total;
  461. print_metric(ctxp, NULL, "%8.3f", "GHz", ratio);
  462. } else {
  463. print_metric(ctxp, NULL, NULL, "Ghz", 0);
  464. }
  465. } else if (perf_stat_evsel__is(evsel, CYCLES_IN_TX)) {
  466. total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
  467. if (total)
  468. print_metric(ctxp, NULL,
  469. "%7.2f%%", "transactional cycles",
  470. 100.0 * (avg / total));
  471. else
  472. print_metric(ctxp, NULL, NULL, "transactional cycles",
  473. 0);
  474. } else if (perf_stat_evsel__is(evsel, CYCLES_IN_TX_CP)) {
  475. total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
  476. total2 = avg_stats(&runtime_cycles_in_tx_stats[ctx][cpu]);
  477. if (total2 < avg)
  478. total2 = avg;
  479. if (total)
  480. print_metric(ctxp, NULL, "%7.2f%%", "aborted cycles",
  481. 100.0 * ((total2-avg) / total));
  482. else
  483. print_metric(ctxp, NULL, NULL, "aborted cycles", 0);
  484. } else if (perf_stat_evsel__is(evsel, TRANSACTION_START)) {
  485. total = avg_stats(&runtime_cycles_in_tx_stats[ctx][cpu]);
  486. if (avg)
  487. ratio = total / avg;
  488. if (runtime_cycles_in_tx_stats[ctx][cpu].n != 0)
  489. print_metric(ctxp, NULL, "%8.0f",
  490. "cycles / transaction", ratio);
  491. else
  492. print_metric(ctxp, NULL, NULL, "cycles / transaction",
  493. 0);
  494. } else if (perf_stat_evsel__is(evsel, ELISION_START)) {
  495. total = avg_stats(&runtime_cycles_in_tx_stats[ctx][cpu]);
  496. if (avg)
  497. ratio = total / avg;
  498. print_metric(ctxp, NULL, "%8.0f", "cycles / elision", ratio);
  499. } else if (perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK) ||
  500. perf_evsel__match(evsel, SOFTWARE, SW_CPU_CLOCK)) {
  501. if ((ratio = avg_stats(&walltime_nsecs_stats)) != 0)
  502. print_metric(ctxp, NULL, "%8.3f", "CPUs utilized",
  503. avg / ratio);
  504. else
  505. print_metric(ctxp, NULL, NULL, "CPUs utilized", 0);
  506. } else if (perf_stat_evsel__is(evsel, TOPDOWN_FETCH_BUBBLES)) {
  507. double fe_bound = td_fe_bound(ctx, cpu);
  508. if (fe_bound > 0.2)
  509. color = PERF_COLOR_RED;
  510. print_metric(ctxp, color, "%8.1f%%", "frontend bound",
  511. fe_bound * 100.);
  512. } else if (perf_stat_evsel__is(evsel, TOPDOWN_SLOTS_RETIRED)) {
  513. double retiring = td_retiring(ctx, cpu);
  514. if (retiring > 0.7)
  515. color = PERF_COLOR_GREEN;
  516. print_metric(ctxp, color, "%8.1f%%", "retiring",
  517. retiring * 100.);
  518. } else if (perf_stat_evsel__is(evsel, TOPDOWN_RECOVERY_BUBBLES)) {
  519. double bad_spec = td_bad_spec(ctx, cpu);
  520. if (bad_spec > 0.1)
  521. color = PERF_COLOR_RED;
  522. print_metric(ctxp, color, "%8.1f%%", "bad speculation",
  523. bad_spec * 100.);
  524. } else if (perf_stat_evsel__is(evsel, TOPDOWN_SLOTS_ISSUED)) {
  525. double be_bound = td_be_bound(ctx, cpu);
  526. const char *name = "backend bound";
  527. static int have_recovery_bubbles = -1;
  528. /* In case the CPU does not support topdown-recovery-bubbles */
  529. if (have_recovery_bubbles < 0)
  530. have_recovery_bubbles = pmu_have_event("cpu",
  531. "topdown-recovery-bubbles");
  532. if (!have_recovery_bubbles)
  533. name = "backend bound/bad spec";
  534. if (be_bound > 0.2)
  535. color = PERF_COLOR_RED;
  536. if (td_total_slots(ctx, cpu) > 0)
  537. print_metric(ctxp, color, "%8.1f%%", name,
  538. be_bound * 100.);
  539. else
  540. print_metric(ctxp, NULL, NULL, name, 0);
  541. } else if (runtime_nsecs_stats[cpu].n != 0) {
  542. char unit = 'M';
  543. char unit_buf[10];
  544. total = avg_stats(&runtime_nsecs_stats[cpu]);
  545. if (total)
  546. ratio = 1000.0 * avg / total;
  547. if (ratio < 0.001) {
  548. ratio *= 1000;
  549. unit = 'K';
  550. }
  551. snprintf(unit_buf, sizeof(unit_buf), "%c/sec", unit);
  552. print_metric(ctxp, NULL, "%8.3f", unit_buf, ratio);
  553. } else {
  554. print_metric(ctxp, NULL, NULL, NULL, 0);
  555. }
  556. }