atiixp_modem.c 35 KB

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  1. /*
  2. * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
  3. *
  4. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <linux/io.h>
  22. #include <linux/delay.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/init.h>
  25. #include <linux/pci.h>
  26. #include <linux/slab.h>
  27. #include <linux/module.h>
  28. #include <linux/mutex.h>
  29. #include <sound/core.h>
  30. #include <sound/pcm.h>
  31. #include <sound/pcm_params.h>
  32. #include <sound/info.h>
  33. #include <sound/ac97_codec.h>
  34. #include <sound/initval.h>
  35. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  36. MODULE_DESCRIPTION("ATI IXP MC97 controller");
  37. MODULE_LICENSE("GPL");
  38. MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}");
  39. static int index = -2; /* Exclude the first card */
  40. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  41. static int ac97_clock = 48000;
  42. module_param(index, int, 0444);
  43. MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
  44. module_param(id, charp, 0444);
  45. MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
  46. module_param(ac97_clock, int, 0444);
  47. MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
  48. /* just for backward compatibility */
  49. static bool enable;
  50. module_param(enable, bool, 0444);
  51. /*
  52. */
  53. #define ATI_REG_ISR 0x00 /* interrupt source */
  54. #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
  55. #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
  56. #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
  57. #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
  58. #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
  59. #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
  60. #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
  61. #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
  62. #define ATI_REG_ISR_PHYS_INTR (1U<<8)
  63. #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
  64. #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
  65. #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
  66. #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
  67. #define ATI_REG_ISR_NEW_FRAME (1U<<13)
  68. #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
  69. #define ATI_REG_IER 0x04 /* interrupt enable */
  70. #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
  71. #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
  72. #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
  73. #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
  74. #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
  75. #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
  76. #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
  77. #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
  78. #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
  79. #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
  80. #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
  81. #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
  82. #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
  83. #define ATI_REG_CMD 0x08 /* command */
  84. #define ATI_REG_CMD_POWERDOWN (1U<<0)
  85. #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
  86. #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
  87. #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
  88. #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
  89. #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
  90. #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
  91. #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
  92. #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
  93. #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
  94. #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
  95. #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
  96. #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
  97. #define ATI_REG_CMD_PACKED_DIS (1U<<24)
  98. #define ATI_REG_CMD_BURST_EN (1U<<25)
  99. #define ATI_REG_CMD_PANIC_EN (1U<<26)
  100. #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
  101. #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
  102. #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
  103. #define ATI_REG_CMD_AC_SYNC (1U<<30)
  104. #define ATI_REG_CMD_AC_RESET (1U<<31)
  105. #define ATI_REG_PHYS_OUT_ADDR 0x0c
  106. #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
  107. #define ATI_REG_PHYS_OUT_RW (1U<<2)
  108. #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
  109. #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
  110. #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
  111. #define ATI_REG_PHYS_IN_ADDR 0x10
  112. #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
  113. #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
  114. #define ATI_REG_PHYS_IN_DATA_SHIFT 16
  115. #define ATI_REG_SLOTREQ 0x14
  116. #define ATI_REG_COUNTER 0x18
  117. #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
  118. #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
  119. #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
  120. #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
  121. #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
  122. #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
  123. #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
  124. #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
  125. #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
  126. #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
  127. #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
  128. #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
  129. #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
  130. #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
  131. #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
  132. #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
  133. #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
  134. #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
  135. #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
  136. #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
  137. #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
  138. #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
  139. #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
  140. #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
  141. #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
  142. #define ATI_REG_MODEM_OUT_FIFO_USED 0x70
  143. #define ATI_REG_MODEM_OUT_GPIO 0x74
  144. #define ATI_REG_MODEM_OUT_GPIO_EN 1
  145. #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
  146. #define ATI_REG_MODEM_IN_GPIO 0x78
  147. #define ATI_REG_MODEM_MIRROR 0x7c
  148. #define ATI_REG_AUDIO_MIRROR 0x80
  149. #define ATI_REG_MODEM_FIFO_FLUSH 0x88
  150. #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
  151. #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
  152. #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
  153. #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
  154. /* LINKPTR */
  155. #define ATI_REG_LINKPTR_EN (1U<<0)
  156. #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
  157. struct atiixp_modem;
  158. /*
  159. * DMA packate descriptor
  160. */
  161. struct atiixp_dma_desc {
  162. u32 addr; /* DMA buffer address */
  163. u16 status; /* status bits */
  164. u16 size; /* size of the packet in dwords */
  165. u32 next; /* address of the next packet descriptor */
  166. };
  167. /*
  168. * stream enum
  169. */
  170. enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
  171. enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
  172. enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
  173. #define NUM_ATI_CODECS 3
  174. /*
  175. * constants and callbacks for each DMA type
  176. */
  177. struct atiixp_dma_ops {
  178. int type; /* ATI_DMA_XXX */
  179. unsigned int llp_offset; /* LINKPTR offset */
  180. unsigned int dt_cur; /* DT_CUR offset */
  181. /* called from open callback */
  182. void (*enable_dma)(struct atiixp_modem *chip, int on);
  183. /* called from trigger (START/STOP) */
  184. void (*enable_transfer)(struct atiixp_modem *chip, int on);
  185. /* called from trigger (STOP only) */
  186. void (*flush_dma)(struct atiixp_modem *chip);
  187. };
  188. /*
  189. * DMA stream
  190. */
  191. struct atiixp_dma {
  192. const struct atiixp_dma_ops *ops;
  193. struct snd_dma_buffer desc_buf;
  194. struct snd_pcm_substream *substream; /* assigned PCM substream */
  195. unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
  196. unsigned int period_bytes, periods;
  197. int opened;
  198. int running;
  199. int pcm_open_flag;
  200. int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
  201. };
  202. /*
  203. * ATI IXP chip
  204. */
  205. struct atiixp_modem {
  206. struct snd_card *card;
  207. struct pci_dev *pci;
  208. struct resource *res; /* memory i/o */
  209. unsigned long addr;
  210. void __iomem *remap_addr;
  211. int irq;
  212. struct snd_ac97_bus *ac97_bus;
  213. struct snd_ac97 *ac97[NUM_ATI_CODECS];
  214. spinlock_t reg_lock;
  215. struct atiixp_dma dmas[NUM_ATI_DMAS];
  216. struct ac97_pcm *pcms[NUM_ATI_PCMS];
  217. struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
  218. int max_channels; /* max. channels for PCM out */
  219. unsigned int codec_not_ready_bits; /* for codec detection */
  220. int spdif_over_aclink; /* passed from the module option */
  221. struct mutex open_mutex; /* playback open mutex */
  222. };
  223. /*
  224. */
  225. static const struct pci_device_id snd_atiixp_ids[] = {
  226. { PCI_VDEVICE(ATI, 0x434d), 0 }, /* SB200 */
  227. { PCI_VDEVICE(ATI, 0x4378), 0 }, /* SB400 */
  228. { 0, }
  229. };
  230. MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
  231. /*
  232. * lowlevel functions
  233. */
  234. /*
  235. * update the bits of the given register.
  236. * return 1 if the bits changed.
  237. */
  238. static int snd_atiixp_update_bits(struct atiixp_modem *chip, unsigned int reg,
  239. unsigned int mask, unsigned int value)
  240. {
  241. void __iomem *addr = chip->remap_addr + reg;
  242. unsigned int data, old_data;
  243. old_data = data = readl(addr);
  244. data &= ~mask;
  245. data |= value;
  246. if (old_data == data)
  247. return 0;
  248. writel(data, addr);
  249. return 1;
  250. }
  251. /*
  252. * macros for easy use
  253. */
  254. #define atiixp_write(chip,reg,value) \
  255. writel(value, chip->remap_addr + ATI_REG_##reg)
  256. #define atiixp_read(chip,reg) \
  257. readl(chip->remap_addr + ATI_REG_##reg)
  258. #define atiixp_update(chip,reg,mask,val) \
  259. snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
  260. /*
  261. * handling DMA packets
  262. *
  263. * we allocate a linear buffer for the DMA, and split it to each packet.
  264. * in a future version, a scatter-gather buffer should be implemented.
  265. */
  266. #define ATI_DESC_LIST_SIZE \
  267. PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
  268. /*
  269. * build packets ring for the given buffer size.
  270. *
  271. * IXP handles the buffer descriptors, which are connected as a linked
  272. * list. although we can change the list dynamically, in this version,
  273. * a static RING of buffer descriptors is used.
  274. *
  275. * the ring is built in this function, and is set up to the hardware.
  276. */
  277. static int atiixp_build_dma_packets(struct atiixp_modem *chip,
  278. struct atiixp_dma *dma,
  279. struct snd_pcm_substream *substream,
  280. unsigned int periods,
  281. unsigned int period_bytes)
  282. {
  283. unsigned int i;
  284. u32 addr, desc_addr;
  285. unsigned long flags;
  286. if (periods > ATI_MAX_DESCRIPTORS)
  287. return -ENOMEM;
  288. if (dma->desc_buf.area == NULL) {
  289. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  290. ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
  291. return -ENOMEM;
  292. dma->period_bytes = dma->periods = 0; /* clear */
  293. }
  294. if (dma->periods == periods && dma->period_bytes == period_bytes)
  295. return 0;
  296. /* reset DMA before changing the descriptor table */
  297. spin_lock_irqsave(&chip->reg_lock, flags);
  298. writel(0, chip->remap_addr + dma->ops->llp_offset);
  299. dma->ops->enable_dma(chip, 0);
  300. dma->ops->enable_dma(chip, 1);
  301. spin_unlock_irqrestore(&chip->reg_lock, flags);
  302. /* fill the entries */
  303. addr = (u32)substream->runtime->dma_addr;
  304. desc_addr = (u32)dma->desc_buf.addr;
  305. for (i = 0; i < periods; i++) {
  306. struct atiixp_dma_desc *desc;
  307. desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
  308. desc->addr = cpu_to_le32(addr);
  309. desc->status = 0;
  310. desc->size = period_bytes >> 2; /* in dwords */
  311. desc_addr += sizeof(struct atiixp_dma_desc);
  312. if (i == periods - 1)
  313. desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
  314. else
  315. desc->next = cpu_to_le32(desc_addr);
  316. addr += period_bytes;
  317. }
  318. writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
  319. chip->remap_addr + dma->ops->llp_offset);
  320. dma->period_bytes = period_bytes;
  321. dma->periods = periods;
  322. return 0;
  323. }
  324. /*
  325. * remove the ring buffer and release it if assigned
  326. */
  327. static void atiixp_clear_dma_packets(struct atiixp_modem *chip,
  328. struct atiixp_dma *dma,
  329. struct snd_pcm_substream *substream)
  330. {
  331. if (dma->desc_buf.area) {
  332. writel(0, chip->remap_addr + dma->ops->llp_offset);
  333. snd_dma_free_pages(&dma->desc_buf);
  334. dma->desc_buf.area = NULL;
  335. }
  336. }
  337. /*
  338. * AC97 interface
  339. */
  340. static int snd_atiixp_acquire_codec(struct atiixp_modem *chip)
  341. {
  342. int timeout = 1000;
  343. while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
  344. if (! timeout--) {
  345. dev_warn(chip->card->dev, "codec acquire timeout\n");
  346. return -EBUSY;
  347. }
  348. udelay(1);
  349. }
  350. return 0;
  351. }
  352. static unsigned short snd_atiixp_codec_read(struct atiixp_modem *chip,
  353. unsigned short codec,
  354. unsigned short reg)
  355. {
  356. unsigned int data;
  357. int timeout;
  358. if (snd_atiixp_acquire_codec(chip) < 0)
  359. return 0xffff;
  360. data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
  361. ATI_REG_PHYS_OUT_ADDR_EN |
  362. ATI_REG_PHYS_OUT_RW |
  363. codec;
  364. atiixp_write(chip, PHYS_OUT_ADDR, data);
  365. if (snd_atiixp_acquire_codec(chip) < 0)
  366. return 0xffff;
  367. timeout = 1000;
  368. do {
  369. data = atiixp_read(chip, PHYS_IN_ADDR);
  370. if (data & ATI_REG_PHYS_IN_READ_FLAG)
  371. return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
  372. udelay(1);
  373. } while (--timeout);
  374. /* time out may happen during reset */
  375. if (reg < 0x7c)
  376. dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg);
  377. return 0xffff;
  378. }
  379. static void snd_atiixp_codec_write(struct atiixp_modem *chip,
  380. unsigned short codec,
  381. unsigned short reg, unsigned short val)
  382. {
  383. unsigned int data;
  384. if (snd_atiixp_acquire_codec(chip) < 0)
  385. return;
  386. data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
  387. ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
  388. ATI_REG_PHYS_OUT_ADDR_EN | codec;
  389. atiixp_write(chip, PHYS_OUT_ADDR, data);
  390. }
  391. static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
  392. unsigned short reg)
  393. {
  394. struct atiixp_modem *chip = ac97->private_data;
  395. return snd_atiixp_codec_read(chip, ac97->num, reg);
  396. }
  397. static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  398. unsigned short val)
  399. {
  400. struct atiixp_modem *chip = ac97->private_data;
  401. if (reg == AC97_GPIO_STATUS) {
  402. atiixp_write(chip, MODEM_OUT_GPIO,
  403. (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN);
  404. return;
  405. }
  406. snd_atiixp_codec_write(chip, ac97->num, reg, val);
  407. }
  408. /*
  409. * reset AC link
  410. */
  411. static int snd_atiixp_aclink_reset(struct atiixp_modem *chip)
  412. {
  413. int timeout;
  414. /* reset powerdoewn */
  415. if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
  416. udelay(10);
  417. /* perform a software reset */
  418. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
  419. atiixp_read(chip, CMD);
  420. udelay(10);
  421. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
  422. timeout = 10;
  423. while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
  424. /* do a hard reset */
  425. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
  426. ATI_REG_CMD_AC_SYNC);
  427. atiixp_read(chip, CMD);
  428. msleep(1);
  429. atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
  430. if (!--timeout) {
  431. dev_err(chip->card->dev, "codec reset timeout\n");
  432. break;
  433. }
  434. }
  435. /* deassert RESET and assert SYNC to make sure */
  436. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
  437. ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
  438. return 0;
  439. }
  440. #ifdef CONFIG_PM_SLEEP
  441. static int snd_atiixp_aclink_down(struct atiixp_modem *chip)
  442. {
  443. // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
  444. // return -EBUSY;
  445. atiixp_update(chip, CMD,
  446. ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
  447. ATI_REG_CMD_POWERDOWN);
  448. return 0;
  449. }
  450. #endif
  451. /*
  452. * auto-detection of codecs
  453. *
  454. * the IXP chip can generate interrupts for the non-existing codecs.
  455. * NEW_FRAME interrupt is used to make sure that the interrupt is generated
  456. * even if all three codecs are connected.
  457. */
  458. #define ALL_CODEC_NOT_READY \
  459. (ATI_REG_ISR_CODEC0_NOT_READY |\
  460. ATI_REG_ISR_CODEC1_NOT_READY |\
  461. ATI_REG_ISR_CODEC2_NOT_READY)
  462. #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
  463. static int snd_atiixp_codec_detect(struct atiixp_modem *chip)
  464. {
  465. int timeout;
  466. chip->codec_not_ready_bits = 0;
  467. atiixp_write(chip, IER, CODEC_CHECK_BITS);
  468. /* wait for the interrupts */
  469. timeout = 50;
  470. while (timeout-- > 0) {
  471. msleep(1);
  472. if (chip->codec_not_ready_bits)
  473. break;
  474. }
  475. atiixp_write(chip, IER, 0); /* disable irqs */
  476. if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
  477. dev_err(chip->card->dev, "no codec detected!\n");
  478. return -ENXIO;
  479. }
  480. return 0;
  481. }
  482. /*
  483. * enable DMA and irqs
  484. */
  485. static int snd_atiixp_chip_start(struct atiixp_modem *chip)
  486. {
  487. unsigned int reg;
  488. /* set up spdif, enable burst mode */
  489. reg = atiixp_read(chip, CMD);
  490. reg |= ATI_REG_CMD_BURST_EN;
  491. if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
  492. reg |= ATI_REG_CMD_MODEM_PRESENT;
  493. atiixp_write(chip, CMD, reg);
  494. /* clear all interrupt source */
  495. atiixp_write(chip, ISR, 0xffffffff);
  496. /* enable irqs */
  497. atiixp_write(chip, IER,
  498. ATI_REG_IER_MODEM_STATUS_EN |
  499. ATI_REG_IER_MODEM_IN_XRUN_EN |
  500. ATI_REG_IER_MODEM_OUT1_XRUN_EN);
  501. return 0;
  502. }
  503. /*
  504. * disable DMA and IRQs
  505. */
  506. static int snd_atiixp_chip_stop(struct atiixp_modem *chip)
  507. {
  508. /* clear interrupt source */
  509. atiixp_write(chip, ISR, atiixp_read(chip, ISR));
  510. /* disable irqs */
  511. atiixp_write(chip, IER, 0);
  512. return 0;
  513. }
  514. /*
  515. * PCM section
  516. */
  517. /*
  518. * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
  519. * position. when SG-buffer is implemented, the offset must be calculated
  520. * correctly...
  521. */
  522. static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
  523. {
  524. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  525. struct snd_pcm_runtime *runtime = substream->runtime;
  526. struct atiixp_dma *dma = runtime->private_data;
  527. unsigned int curptr;
  528. int timeout = 1000;
  529. while (timeout--) {
  530. curptr = readl(chip->remap_addr + dma->ops->dt_cur);
  531. if (curptr < dma->buf_addr)
  532. continue;
  533. curptr -= dma->buf_addr;
  534. if (curptr >= dma->buf_bytes)
  535. continue;
  536. return bytes_to_frames(runtime, curptr);
  537. }
  538. dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n",
  539. readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
  540. return 0;
  541. }
  542. /*
  543. * XRUN detected, and stop the PCM substream
  544. */
  545. static void snd_atiixp_xrun_dma(struct atiixp_modem *chip,
  546. struct atiixp_dma *dma)
  547. {
  548. if (! dma->substream || ! dma->running)
  549. return;
  550. dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type);
  551. snd_pcm_stop_xrun(dma->substream);
  552. }
  553. /*
  554. * the period ack. update the substream.
  555. */
  556. static void snd_atiixp_update_dma(struct atiixp_modem *chip,
  557. struct atiixp_dma *dma)
  558. {
  559. if (! dma->substream || ! dma->running)
  560. return;
  561. snd_pcm_period_elapsed(dma->substream);
  562. }
  563. /* set BUS_BUSY interrupt bit if any DMA is running */
  564. /* call with spinlock held */
  565. static void snd_atiixp_check_bus_busy(struct atiixp_modem *chip)
  566. {
  567. unsigned int bus_busy;
  568. if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
  569. ATI_REG_CMD_MODEM_RECEIVE_EN))
  570. bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
  571. else
  572. bus_busy = 0;
  573. atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
  574. }
  575. /* common trigger callback
  576. * calling the lowlevel callbacks in it
  577. */
  578. static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  579. {
  580. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  581. struct atiixp_dma *dma = substream->runtime->private_data;
  582. int err = 0;
  583. if (snd_BUG_ON(!dma->ops->enable_transfer ||
  584. !dma->ops->flush_dma))
  585. return -EINVAL;
  586. spin_lock(&chip->reg_lock);
  587. switch(cmd) {
  588. case SNDRV_PCM_TRIGGER_START:
  589. dma->ops->enable_transfer(chip, 1);
  590. dma->running = 1;
  591. break;
  592. case SNDRV_PCM_TRIGGER_STOP:
  593. dma->ops->enable_transfer(chip, 0);
  594. dma->running = 0;
  595. break;
  596. default:
  597. err = -EINVAL;
  598. break;
  599. }
  600. if (! err) {
  601. snd_atiixp_check_bus_busy(chip);
  602. if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  603. dma->ops->flush_dma(chip);
  604. snd_atiixp_check_bus_busy(chip);
  605. }
  606. }
  607. spin_unlock(&chip->reg_lock);
  608. return err;
  609. }
  610. /*
  611. * lowlevel callbacks for each DMA type
  612. *
  613. * every callback is supposed to be called in chip->reg_lock spinlock
  614. */
  615. /* flush FIFO of analog OUT DMA */
  616. static void atiixp_out_flush_dma(struct atiixp_modem *chip)
  617. {
  618. atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
  619. }
  620. /* enable/disable analog OUT DMA */
  621. static void atiixp_out_enable_dma(struct atiixp_modem *chip, int on)
  622. {
  623. unsigned int data;
  624. data = atiixp_read(chip, CMD);
  625. if (on) {
  626. if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
  627. return;
  628. atiixp_out_flush_dma(chip);
  629. data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
  630. } else
  631. data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
  632. atiixp_write(chip, CMD, data);
  633. }
  634. /* start/stop transfer over OUT DMA */
  635. static void atiixp_out_enable_transfer(struct atiixp_modem *chip, int on)
  636. {
  637. atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
  638. on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
  639. }
  640. /* enable/disable analog IN DMA */
  641. static void atiixp_in_enable_dma(struct atiixp_modem *chip, int on)
  642. {
  643. atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
  644. on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
  645. }
  646. /* start/stop analog IN DMA */
  647. static void atiixp_in_enable_transfer(struct atiixp_modem *chip, int on)
  648. {
  649. if (on) {
  650. unsigned int data = atiixp_read(chip, CMD);
  651. if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
  652. data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
  653. atiixp_write(chip, CMD, data);
  654. }
  655. } else
  656. atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
  657. }
  658. /* flush FIFO of analog IN DMA */
  659. static void atiixp_in_flush_dma(struct atiixp_modem *chip)
  660. {
  661. atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
  662. }
  663. /* set up slots and formats for analog OUT */
  664. static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
  665. {
  666. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  667. unsigned int data;
  668. spin_lock_irq(&chip->reg_lock);
  669. /* set output threshold */
  670. data = atiixp_read(chip, MODEM_OUT_FIFO);
  671. data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
  672. data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
  673. atiixp_write(chip, MODEM_OUT_FIFO, data);
  674. spin_unlock_irq(&chip->reg_lock);
  675. return 0;
  676. }
  677. /* set up slots and formats for analog IN */
  678. static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
  679. {
  680. return 0;
  681. }
  682. /*
  683. * hw_params - allocate the buffer and set up buffer descriptors
  684. */
  685. static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
  686. struct snd_pcm_hw_params *hw_params)
  687. {
  688. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  689. struct atiixp_dma *dma = substream->runtime->private_data;
  690. int err;
  691. int i;
  692. err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  693. if (err < 0)
  694. return err;
  695. dma->buf_addr = substream->runtime->dma_addr;
  696. dma->buf_bytes = params_buffer_bytes(hw_params);
  697. err = atiixp_build_dma_packets(chip, dma, substream,
  698. params_periods(hw_params),
  699. params_period_bytes(hw_params));
  700. if (err < 0)
  701. return err;
  702. /* set up modem rate */
  703. for (i = 0; i < NUM_ATI_CODECS; i++) {
  704. if (! chip->ac97[i])
  705. continue;
  706. snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
  707. snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
  708. }
  709. return err;
  710. }
  711. static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
  712. {
  713. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  714. struct atiixp_dma *dma = substream->runtime->private_data;
  715. atiixp_clear_dma_packets(chip, dma, substream);
  716. snd_pcm_lib_free_pages(substream);
  717. return 0;
  718. }
  719. /*
  720. * pcm hardware definition, identical for all DMA types
  721. */
  722. static struct snd_pcm_hardware snd_atiixp_pcm_hw =
  723. {
  724. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  725. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  726. SNDRV_PCM_INFO_MMAP_VALID),
  727. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  728. .rates = (SNDRV_PCM_RATE_8000 |
  729. SNDRV_PCM_RATE_16000 |
  730. SNDRV_PCM_RATE_KNOT),
  731. .rate_min = 8000,
  732. .rate_max = 16000,
  733. .channels_min = 2,
  734. .channels_max = 2,
  735. .buffer_bytes_max = 256 * 1024,
  736. .period_bytes_min = 32,
  737. .period_bytes_max = 128 * 1024,
  738. .periods_min = 2,
  739. .periods_max = ATI_MAX_DESCRIPTORS,
  740. };
  741. static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
  742. struct atiixp_dma *dma, int pcm_type)
  743. {
  744. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  745. struct snd_pcm_runtime *runtime = substream->runtime;
  746. int err;
  747. static unsigned int rates[] = { 8000, 9600, 12000, 16000 };
  748. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  749. .count = ARRAY_SIZE(rates),
  750. .list = rates,
  751. .mask = 0,
  752. };
  753. if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
  754. return -EINVAL;
  755. if (dma->opened)
  756. return -EBUSY;
  757. dma->substream = substream;
  758. runtime->hw = snd_atiixp_pcm_hw;
  759. dma->ac97_pcm_type = pcm_type;
  760. if ((err = snd_pcm_hw_constraint_list(runtime, 0,
  761. SNDRV_PCM_HW_PARAM_RATE,
  762. &hw_constraints_rates)) < 0)
  763. return err;
  764. if ((err = snd_pcm_hw_constraint_integer(runtime,
  765. SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  766. return err;
  767. runtime->private_data = dma;
  768. /* enable DMA bits */
  769. spin_lock_irq(&chip->reg_lock);
  770. dma->ops->enable_dma(chip, 1);
  771. spin_unlock_irq(&chip->reg_lock);
  772. dma->opened = 1;
  773. return 0;
  774. }
  775. static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
  776. struct atiixp_dma *dma)
  777. {
  778. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  779. /* disable DMA bits */
  780. if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
  781. return -EINVAL;
  782. spin_lock_irq(&chip->reg_lock);
  783. dma->ops->enable_dma(chip, 0);
  784. spin_unlock_irq(&chip->reg_lock);
  785. dma->substream = NULL;
  786. dma->opened = 0;
  787. return 0;
  788. }
  789. /*
  790. */
  791. static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
  792. {
  793. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  794. int err;
  795. mutex_lock(&chip->open_mutex);
  796. err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
  797. mutex_unlock(&chip->open_mutex);
  798. if (err < 0)
  799. return err;
  800. return 0;
  801. }
  802. static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
  803. {
  804. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  805. int err;
  806. mutex_lock(&chip->open_mutex);
  807. err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
  808. mutex_unlock(&chip->open_mutex);
  809. return err;
  810. }
  811. static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
  812. {
  813. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  814. return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
  815. }
  816. static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
  817. {
  818. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  819. return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
  820. }
  821. /* AC97 playback */
  822. static const struct snd_pcm_ops snd_atiixp_playback_ops = {
  823. .open = snd_atiixp_playback_open,
  824. .close = snd_atiixp_playback_close,
  825. .ioctl = snd_pcm_lib_ioctl,
  826. .hw_params = snd_atiixp_pcm_hw_params,
  827. .hw_free = snd_atiixp_pcm_hw_free,
  828. .prepare = snd_atiixp_playback_prepare,
  829. .trigger = snd_atiixp_pcm_trigger,
  830. .pointer = snd_atiixp_pcm_pointer,
  831. };
  832. /* AC97 capture */
  833. static const struct snd_pcm_ops snd_atiixp_capture_ops = {
  834. .open = snd_atiixp_capture_open,
  835. .close = snd_atiixp_capture_close,
  836. .ioctl = snd_pcm_lib_ioctl,
  837. .hw_params = snd_atiixp_pcm_hw_params,
  838. .hw_free = snd_atiixp_pcm_hw_free,
  839. .prepare = snd_atiixp_capture_prepare,
  840. .trigger = snd_atiixp_pcm_trigger,
  841. .pointer = snd_atiixp_pcm_pointer,
  842. };
  843. static const struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
  844. .type = ATI_DMA_PLAYBACK,
  845. .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
  846. .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
  847. .enable_dma = atiixp_out_enable_dma,
  848. .enable_transfer = atiixp_out_enable_transfer,
  849. .flush_dma = atiixp_out_flush_dma,
  850. };
  851. static const struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
  852. .type = ATI_DMA_CAPTURE,
  853. .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
  854. .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
  855. .enable_dma = atiixp_in_enable_dma,
  856. .enable_transfer = atiixp_in_enable_transfer,
  857. .flush_dma = atiixp_in_flush_dma,
  858. };
  859. static int snd_atiixp_pcm_new(struct atiixp_modem *chip)
  860. {
  861. struct snd_pcm *pcm;
  862. int err;
  863. /* initialize constants */
  864. chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
  865. chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
  866. /* PCM #0: analog I/O */
  867. err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
  868. if (err < 0)
  869. return err;
  870. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
  871. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
  872. pcm->dev_class = SNDRV_PCM_CLASS_MODEM;
  873. pcm->private_data = chip;
  874. strcpy(pcm->name, "ATI IXP MC97");
  875. chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
  876. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  877. snd_dma_pci_data(chip->pci),
  878. 64*1024, 128*1024);
  879. return 0;
  880. }
  881. /*
  882. * interrupt handler
  883. */
  884. static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
  885. {
  886. struct atiixp_modem *chip = dev_id;
  887. unsigned int status;
  888. status = atiixp_read(chip, ISR);
  889. if (! status)
  890. return IRQ_NONE;
  891. /* process audio DMA */
  892. if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
  893. snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
  894. else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
  895. snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
  896. if (status & ATI_REG_ISR_MODEM_IN_XRUN)
  897. snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
  898. else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
  899. snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
  900. /* for codec detection */
  901. if (status & CODEC_CHECK_BITS) {
  902. unsigned int detected;
  903. detected = status & CODEC_CHECK_BITS;
  904. spin_lock(&chip->reg_lock);
  905. chip->codec_not_ready_bits |= detected;
  906. atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
  907. spin_unlock(&chip->reg_lock);
  908. }
  909. /* ack */
  910. atiixp_write(chip, ISR, status);
  911. return IRQ_HANDLED;
  912. }
  913. /*
  914. * ac97 mixer section
  915. */
  916. static int snd_atiixp_mixer_new(struct atiixp_modem *chip, int clock)
  917. {
  918. struct snd_ac97_bus *pbus;
  919. struct snd_ac97_template ac97;
  920. int i, err;
  921. int codec_count;
  922. static struct snd_ac97_bus_ops ops = {
  923. .write = snd_atiixp_ac97_write,
  924. .read = snd_atiixp_ac97_read,
  925. };
  926. static unsigned int codec_skip[NUM_ATI_CODECS] = {
  927. ATI_REG_ISR_CODEC0_NOT_READY,
  928. ATI_REG_ISR_CODEC1_NOT_READY,
  929. ATI_REG_ISR_CODEC2_NOT_READY,
  930. };
  931. if (snd_atiixp_codec_detect(chip) < 0)
  932. return -ENXIO;
  933. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
  934. return err;
  935. pbus->clock = clock;
  936. chip->ac97_bus = pbus;
  937. codec_count = 0;
  938. for (i = 0; i < NUM_ATI_CODECS; i++) {
  939. if (chip->codec_not_ready_bits & codec_skip[i])
  940. continue;
  941. memset(&ac97, 0, sizeof(ac97));
  942. ac97.private_data = chip;
  943. ac97.pci = chip->pci;
  944. ac97.num = i;
  945. ac97.scaps = AC97_SCAP_SKIP_AUDIO | AC97_SCAP_POWER_SAVE;
  946. if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
  947. chip->ac97[i] = NULL; /* to be sure */
  948. dev_dbg(chip->card->dev,
  949. "codec %d not available for modem\n", i);
  950. continue;
  951. }
  952. codec_count++;
  953. }
  954. if (! codec_count) {
  955. dev_err(chip->card->dev, "no codec available\n");
  956. return -ENODEV;
  957. }
  958. /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
  959. return 0;
  960. }
  961. #ifdef CONFIG_PM_SLEEP
  962. /*
  963. * power management
  964. */
  965. static int snd_atiixp_suspend(struct device *dev)
  966. {
  967. struct snd_card *card = dev_get_drvdata(dev);
  968. struct atiixp_modem *chip = card->private_data;
  969. int i;
  970. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  971. for (i = 0; i < NUM_ATI_PCMDEVS; i++)
  972. snd_pcm_suspend_all(chip->pcmdevs[i]);
  973. for (i = 0; i < NUM_ATI_CODECS; i++)
  974. snd_ac97_suspend(chip->ac97[i]);
  975. snd_atiixp_aclink_down(chip);
  976. snd_atiixp_chip_stop(chip);
  977. return 0;
  978. }
  979. static int snd_atiixp_resume(struct device *dev)
  980. {
  981. struct snd_card *card = dev_get_drvdata(dev);
  982. struct atiixp_modem *chip = card->private_data;
  983. int i;
  984. snd_atiixp_aclink_reset(chip);
  985. snd_atiixp_chip_start(chip);
  986. for (i = 0; i < NUM_ATI_CODECS; i++)
  987. snd_ac97_resume(chip->ac97[i]);
  988. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  989. return 0;
  990. }
  991. static SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume);
  992. #define SND_ATIIXP_PM_OPS &snd_atiixp_pm
  993. #else
  994. #define SND_ATIIXP_PM_OPS NULL
  995. #endif /* CONFIG_PM_SLEEP */
  996. /*
  997. * proc interface for register dump
  998. */
  999. static void snd_atiixp_proc_read(struct snd_info_entry *entry,
  1000. struct snd_info_buffer *buffer)
  1001. {
  1002. struct atiixp_modem *chip = entry->private_data;
  1003. int i;
  1004. for (i = 0; i < 256; i += 4)
  1005. snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
  1006. }
  1007. static void snd_atiixp_proc_init(struct atiixp_modem *chip)
  1008. {
  1009. struct snd_info_entry *entry;
  1010. if (! snd_card_proc_new(chip->card, "atiixp-modem", &entry))
  1011. snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read);
  1012. }
  1013. /*
  1014. * destructor
  1015. */
  1016. static int snd_atiixp_free(struct atiixp_modem *chip)
  1017. {
  1018. if (chip->irq < 0)
  1019. goto __hw_end;
  1020. snd_atiixp_chip_stop(chip);
  1021. __hw_end:
  1022. if (chip->irq >= 0)
  1023. free_irq(chip->irq, chip);
  1024. iounmap(chip->remap_addr);
  1025. pci_release_regions(chip->pci);
  1026. pci_disable_device(chip->pci);
  1027. kfree(chip);
  1028. return 0;
  1029. }
  1030. static int snd_atiixp_dev_free(struct snd_device *device)
  1031. {
  1032. struct atiixp_modem *chip = device->device_data;
  1033. return snd_atiixp_free(chip);
  1034. }
  1035. /*
  1036. * constructor for chip instance
  1037. */
  1038. static int snd_atiixp_create(struct snd_card *card,
  1039. struct pci_dev *pci,
  1040. struct atiixp_modem **r_chip)
  1041. {
  1042. static struct snd_device_ops ops = {
  1043. .dev_free = snd_atiixp_dev_free,
  1044. };
  1045. struct atiixp_modem *chip;
  1046. int err;
  1047. if ((err = pci_enable_device(pci)) < 0)
  1048. return err;
  1049. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1050. if (chip == NULL) {
  1051. pci_disable_device(pci);
  1052. return -ENOMEM;
  1053. }
  1054. spin_lock_init(&chip->reg_lock);
  1055. mutex_init(&chip->open_mutex);
  1056. chip->card = card;
  1057. chip->pci = pci;
  1058. chip->irq = -1;
  1059. if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) {
  1060. kfree(chip);
  1061. pci_disable_device(pci);
  1062. return err;
  1063. }
  1064. chip->addr = pci_resource_start(pci, 0);
  1065. chip->remap_addr = pci_ioremap_bar(pci, 0);
  1066. if (chip->remap_addr == NULL) {
  1067. dev_err(card->dev, "AC'97 space ioremap problem\n");
  1068. snd_atiixp_free(chip);
  1069. return -EIO;
  1070. }
  1071. if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
  1072. KBUILD_MODNAME, chip)) {
  1073. dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
  1074. snd_atiixp_free(chip);
  1075. return -EBUSY;
  1076. }
  1077. chip->irq = pci->irq;
  1078. pci_set_master(pci);
  1079. synchronize_irq(chip->irq);
  1080. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1081. snd_atiixp_free(chip);
  1082. return err;
  1083. }
  1084. *r_chip = chip;
  1085. return 0;
  1086. }
  1087. static int snd_atiixp_probe(struct pci_dev *pci,
  1088. const struct pci_device_id *pci_id)
  1089. {
  1090. struct snd_card *card;
  1091. struct atiixp_modem *chip;
  1092. int err;
  1093. err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card);
  1094. if (err < 0)
  1095. return err;
  1096. strcpy(card->driver, "ATIIXP-MODEM");
  1097. strcpy(card->shortname, "ATI IXP Modem");
  1098. if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
  1099. goto __error;
  1100. card->private_data = chip;
  1101. if ((err = snd_atiixp_aclink_reset(chip)) < 0)
  1102. goto __error;
  1103. if ((err = snd_atiixp_mixer_new(chip, ac97_clock)) < 0)
  1104. goto __error;
  1105. if ((err = snd_atiixp_pcm_new(chip)) < 0)
  1106. goto __error;
  1107. snd_atiixp_proc_init(chip);
  1108. snd_atiixp_chip_start(chip);
  1109. sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
  1110. card->shortname, pci->revision, chip->addr, chip->irq);
  1111. if ((err = snd_card_register(card)) < 0)
  1112. goto __error;
  1113. pci_set_drvdata(pci, card);
  1114. return 0;
  1115. __error:
  1116. snd_card_free(card);
  1117. return err;
  1118. }
  1119. static void snd_atiixp_remove(struct pci_dev *pci)
  1120. {
  1121. snd_card_free(pci_get_drvdata(pci));
  1122. }
  1123. static struct pci_driver atiixp_modem_driver = {
  1124. .name = KBUILD_MODNAME,
  1125. .id_table = snd_atiixp_ids,
  1126. .probe = snd_atiixp_probe,
  1127. .remove = snd_atiixp_remove,
  1128. .driver = {
  1129. .pm = SND_ATIIXP_PM_OPS,
  1130. },
  1131. };
  1132. module_pci_driver(atiixp_modem_driver);