x86.h 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081
  1. /* ----------------------------------------------------------------------- *
  2. *
  3. * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
  8. * Boston MA 02111-1307, USA; either version 2 of the License, or
  9. * (at your option) any later version; incorporated herein by reference.
  10. *
  11. * ----------------------------------------------------------------------- */
  12. /*
  13. * raid6/x86.h
  14. *
  15. * Definitions common to x86 and x86-64 RAID-6 code only
  16. */
  17. #ifndef LINUX_RAID_RAID6X86_H
  18. #define LINUX_RAID_RAID6X86_H
  19. #if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__)
  20. #ifdef __KERNEL__ /* Real code */
  21. #include <asm/fpu/api.h>
  22. #else /* Dummy code for user space testing */
  23. static inline void kernel_fpu_begin(void)
  24. {
  25. }
  26. static inline void kernel_fpu_end(void)
  27. {
  28. }
  29. #define __aligned(x) __attribute__((aligned(x)))
  30. #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */
  31. #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions
  32. * (fast save and restore) */
  33. #define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */
  34. #define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */
  35. #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */
  36. #define X86_FEATURE_SSSE3 (4*32+ 9) /* Supplemental SSE-3 */
  37. #define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */
  38. #define X86_FEATURE_AVX2 (9*32+ 5) /* AVX2 instructions */
  39. #define X86_FEATURE_AVX512F (9*32+16) /* AVX-512 Foundation */
  40. #define X86_FEATURE_AVX512DQ (9*32+17) /* AVX-512 DQ (Double/Quad granular)
  41. * Instructions
  42. */
  43. #define X86_FEATURE_AVX512BW (9*32+30) /* AVX-512 BW (Byte/Word granular)
  44. * Instructions
  45. */
  46. #define X86_FEATURE_AVX512VL (9*32+31) /* AVX-512 VL (128/256 Vector Length)
  47. * Extensions
  48. */
  49. #define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
  50. /* Should work well enough on modern CPUs for testing */
  51. static inline int boot_cpu_has(int flag)
  52. {
  53. u32 eax, ebx, ecx, edx;
  54. eax = (flag & 0x100) ? 7 :
  55. (flag & 0x20) ? 0x80000001 : 1;
  56. ecx = 0;
  57. asm volatile("cpuid"
  58. : "+a" (eax), "=b" (ebx), "=d" (edx), "+c" (ecx));
  59. return ((flag & 0x100 ? ebx :
  60. (flag & 0x80) ? ecx : edx) >> (flag & 31)) & 1;
  61. }
  62. #endif /* ndef __KERNEL__ */
  63. #endif
  64. #endif