atomic64_test.c 6.3 KB

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  1. /*
  2. * Testsuite for atomic64_t functions
  3. *
  4. * Copyright © 2010 Luca Barbieri
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #include <linux/init.h>
  13. #include <linux/bug.h>
  14. #include <linux/kernel.h>
  15. #include <linux/atomic.h>
  16. #ifdef CONFIG_X86
  17. #include <asm/cpufeature.h> /* for boot_cpu_has below */
  18. #endif
  19. #define TEST(bit, op, c_op, val) \
  20. do { \
  21. atomic##bit##_set(&v, v0); \
  22. r = v0; \
  23. atomic##bit##_##op(val, &v); \
  24. r c_op val; \
  25. WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
  26. (unsigned long long)atomic##bit##_read(&v), \
  27. (unsigned long long)r); \
  28. } while (0)
  29. /*
  30. * Test for a atomic operation family,
  31. * @test should be a macro accepting parameters (bit, op, ...)
  32. */
  33. #define FAMILY_TEST(test, bit, op, args...) \
  34. do { \
  35. test(bit, op, ##args); \
  36. test(bit, op##_acquire, ##args); \
  37. test(bit, op##_release, ##args); \
  38. test(bit, op##_relaxed, ##args); \
  39. } while (0)
  40. #define TEST_RETURN(bit, op, c_op, val) \
  41. do { \
  42. atomic##bit##_set(&v, v0); \
  43. r = v0; \
  44. r c_op val; \
  45. BUG_ON(atomic##bit##_##op(val, &v) != r); \
  46. BUG_ON(atomic##bit##_read(&v) != r); \
  47. } while (0)
  48. #define TEST_FETCH(bit, op, c_op, val) \
  49. do { \
  50. atomic##bit##_set(&v, v0); \
  51. r = v0; \
  52. r c_op val; \
  53. BUG_ON(atomic##bit##_##op(val, &v) != v0); \
  54. BUG_ON(atomic##bit##_read(&v) != r); \
  55. } while (0)
  56. #define RETURN_FAMILY_TEST(bit, op, c_op, val) \
  57. do { \
  58. FAMILY_TEST(TEST_RETURN, bit, op, c_op, val); \
  59. } while (0)
  60. #define FETCH_FAMILY_TEST(bit, op, c_op, val) \
  61. do { \
  62. FAMILY_TEST(TEST_FETCH, bit, op, c_op, val); \
  63. } while (0)
  64. #define TEST_ARGS(bit, op, init, ret, expect, args...) \
  65. do { \
  66. atomic##bit##_set(&v, init); \
  67. BUG_ON(atomic##bit##_##op(&v, ##args) != ret); \
  68. BUG_ON(atomic##bit##_read(&v) != expect); \
  69. } while (0)
  70. #define XCHG_FAMILY_TEST(bit, init, new) \
  71. do { \
  72. FAMILY_TEST(TEST_ARGS, bit, xchg, init, init, new, new); \
  73. } while (0)
  74. #define CMPXCHG_FAMILY_TEST(bit, init, new, wrong) \
  75. do { \
  76. FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
  77. init, init, new, init, new); \
  78. FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
  79. init, init, init, wrong, new); \
  80. } while (0)
  81. #define INC_RETURN_FAMILY_TEST(bit, i) \
  82. do { \
  83. FAMILY_TEST(TEST_ARGS, bit, inc_return, \
  84. i, (i) + one, (i) + one); \
  85. } while (0)
  86. #define DEC_RETURN_FAMILY_TEST(bit, i) \
  87. do { \
  88. FAMILY_TEST(TEST_ARGS, bit, dec_return, \
  89. i, (i) - one, (i) - one); \
  90. } while (0)
  91. static __init void test_atomic(void)
  92. {
  93. int v0 = 0xaaa31337;
  94. int v1 = 0xdeadbeef;
  95. int onestwos = 0x11112222;
  96. int one = 1;
  97. atomic_t v;
  98. int r;
  99. TEST(, add, +=, onestwos);
  100. TEST(, add, +=, -one);
  101. TEST(, sub, -=, onestwos);
  102. TEST(, sub, -=, -one);
  103. TEST(, or, |=, v1);
  104. TEST(, and, &=, v1);
  105. TEST(, xor, ^=, v1);
  106. TEST(, andnot, &= ~, v1);
  107. RETURN_FAMILY_TEST(, add_return, +=, onestwos);
  108. RETURN_FAMILY_TEST(, add_return, +=, -one);
  109. RETURN_FAMILY_TEST(, sub_return, -=, onestwos);
  110. RETURN_FAMILY_TEST(, sub_return, -=, -one);
  111. FETCH_FAMILY_TEST(, fetch_add, +=, onestwos);
  112. FETCH_FAMILY_TEST(, fetch_add, +=, -one);
  113. FETCH_FAMILY_TEST(, fetch_sub, -=, onestwos);
  114. FETCH_FAMILY_TEST(, fetch_sub, -=, -one);
  115. FETCH_FAMILY_TEST(, fetch_or, |=, v1);
  116. FETCH_FAMILY_TEST(, fetch_and, &=, v1);
  117. FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1);
  118. FETCH_FAMILY_TEST(, fetch_xor, ^=, v1);
  119. INC_RETURN_FAMILY_TEST(, v0);
  120. DEC_RETURN_FAMILY_TEST(, v0);
  121. XCHG_FAMILY_TEST(, v0, v1);
  122. CMPXCHG_FAMILY_TEST(, v0, v1, onestwos);
  123. }
  124. #define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
  125. static __init void test_atomic64(void)
  126. {
  127. long long v0 = 0xaaa31337c001d00dLL;
  128. long long v1 = 0xdeadbeefdeafcafeLL;
  129. long long v2 = 0xfaceabadf00df001LL;
  130. long long onestwos = 0x1111111122222222LL;
  131. long long one = 1LL;
  132. atomic64_t v = ATOMIC64_INIT(v0);
  133. long long r = v0;
  134. BUG_ON(v.counter != r);
  135. atomic64_set(&v, v1);
  136. r = v1;
  137. BUG_ON(v.counter != r);
  138. BUG_ON(atomic64_read(&v) != r);
  139. TEST(64, add, +=, onestwos);
  140. TEST(64, add, +=, -one);
  141. TEST(64, sub, -=, onestwos);
  142. TEST(64, sub, -=, -one);
  143. TEST(64, or, |=, v1);
  144. TEST(64, and, &=, v1);
  145. TEST(64, xor, ^=, v1);
  146. TEST(64, andnot, &= ~, v1);
  147. RETURN_FAMILY_TEST(64, add_return, +=, onestwos);
  148. RETURN_FAMILY_TEST(64, add_return, +=, -one);
  149. RETURN_FAMILY_TEST(64, sub_return, -=, onestwos);
  150. RETURN_FAMILY_TEST(64, sub_return, -=, -one);
  151. FETCH_FAMILY_TEST(64, fetch_add, +=, onestwos);
  152. FETCH_FAMILY_TEST(64, fetch_add, +=, -one);
  153. FETCH_FAMILY_TEST(64, fetch_sub, -=, onestwos);
  154. FETCH_FAMILY_TEST(64, fetch_sub, -=, -one);
  155. FETCH_FAMILY_TEST(64, fetch_or, |=, v1);
  156. FETCH_FAMILY_TEST(64, fetch_and, &=, v1);
  157. FETCH_FAMILY_TEST(64, fetch_andnot, &= ~, v1);
  158. FETCH_FAMILY_TEST(64, fetch_xor, ^=, v1);
  159. INIT(v0);
  160. atomic64_inc(&v);
  161. r += one;
  162. BUG_ON(v.counter != r);
  163. INIT(v0);
  164. atomic64_dec(&v);
  165. r -= one;
  166. BUG_ON(v.counter != r);
  167. INC_RETURN_FAMILY_TEST(64, v0);
  168. DEC_RETURN_FAMILY_TEST(64, v0);
  169. XCHG_FAMILY_TEST(64, v0, v1);
  170. CMPXCHG_FAMILY_TEST(64, v0, v1, v2);
  171. INIT(v0);
  172. BUG_ON(atomic64_add_unless(&v, one, v0));
  173. BUG_ON(v.counter != r);
  174. INIT(v0);
  175. BUG_ON(!atomic64_add_unless(&v, one, v1));
  176. r += one;
  177. BUG_ON(v.counter != r);
  178. INIT(onestwos);
  179. BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
  180. r -= one;
  181. BUG_ON(v.counter != r);
  182. INIT(0);
  183. BUG_ON(atomic64_dec_if_positive(&v) != -one);
  184. BUG_ON(v.counter != r);
  185. INIT(-one);
  186. BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
  187. BUG_ON(v.counter != r);
  188. INIT(onestwos);
  189. BUG_ON(!atomic64_inc_not_zero(&v));
  190. r += one;
  191. BUG_ON(v.counter != r);
  192. INIT(0);
  193. BUG_ON(atomic64_inc_not_zero(&v));
  194. BUG_ON(v.counter != r);
  195. INIT(-one);
  196. BUG_ON(!atomic64_inc_not_zero(&v));
  197. r += one;
  198. BUG_ON(v.counter != r);
  199. }
  200. static __init int test_atomics(void)
  201. {
  202. test_atomic();
  203. test_atomic64();
  204. #ifdef CONFIG_X86
  205. pr_info("passed for %s platform %s CX8 and %s SSE\n",
  206. #ifdef CONFIG_X86_64
  207. "x86-64",
  208. #elif defined(CONFIG_X86_CMPXCHG64)
  209. "i586+",
  210. #else
  211. "i386+",
  212. #endif
  213. boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
  214. boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
  215. #else
  216. pr_info("passed\n");
  217. #endif
  218. return 0;
  219. }
  220. core_initcall(test_atomics);