drm_edid.h 14 KB

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  1. /*
  2. * Copyright © 2007-2008 Intel Corporation
  3. * Jesse Barnes <jesse.barnes@intel.com>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in
  13. * all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21. * OTHER DEALINGS IN THE SOFTWARE.
  22. */
  23. #ifndef __DRM_EDID_H__
  24. #define __DRM_EDID_H__
  25. #include <linux/types.h>
  26. struct drm_device;
  27. struct i2c_adapter;
  28. #define EDID_LENGTH 128
  29. #define DDC_ADDR 0x50
  30. #define DDC_ADDR2 0x52 /* E-DDC 1.2 - where DisplayID can hide */
  31. #define CEA_EXT 0x02
  32. #define VTB_EXT 0x10
  33. #define DI_EXT 0x40
  34. #define LS_EXT 0x50
  35. #define MI_EXT 0x60
  36. #define DISPLAYID_EXT 0x70
  37. struct est_timings {
  38. u8 t1;
  39. u8 t2;
  40. u8 mfg_rsvd;
  41. } __attribute__((packed));
  42. /* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
  43. #define EDID_TIMING_ASPECT_SHIFT 6
  44. #define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT)
  45. /* need to add 60 */
  46. #define EDID_TIMING_VFREQ_SHIFT 0
  47. #define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT)
  48. struct std_timing {
  49. u8 hsize; /* need to multiply by 8 then add 248 */
  50. u8 vfreq_aspect;
  51. } __attribute__((packed));
  52. #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
  53. #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
  54. #define DRM_EDID_PT_SEPARATE_SYNC (3 << 3)
  55. #define DRM_EDID_PT_STEREO (1 << 5)
  56. #define DRM_EDID_PT_INTERLACED (1 << 7)
  57. /* If detailed data is pixel timing */
  58. struct detailed_pixel_timing {
  59. u8 hactive_lo;
  60. u8 hblank_lo;
  61. u8 hactive_hblank_hi;
  62. u8 vactive_lo;
  63. u8 vblank_lo;
  64. u8 vactive_vblank_hi;
  65. u8 hsync_offset_lo;
  66. u8 hsync_pulse_width_lo;
  67. u8 vsync_offset_pulse_width_lo;
  68. u8 hsync_vsync_offset_pulse_width_hi;
  69. u8 width_mm_lo;
  70. u8 height_mm_lo;
  71. u8 width_height_mm_hi;
  72. u8 hborder;
  73. u8 vborder;
  74. u8 misc;
  75. } __attribute__((packed));
  76. /* If it's not pixel timing, it'll be one of the below */
  77. struct detailed_data_string {
  78. u8 str[13];
  79. } __attribute__((packed));
  80. struct detailed_data_monitor_range {
  81. u8 min_vfreq;
  82. u8 max_vfreq;
  83. u8 min_hfreq_khz;
  84. u8 max_hfreq_khz;
  85. u8 pixel_clock_mhz; /* need to multiply by 10 */
  86. u8 flags;
  87. union {
  88. struct {
  89. u8 reserved;
  90. u8 hfreq_start_khz; /* need to multiply by 2 */
  91. u8 c; /* need to divide by 2 */
  92. __le16 m;
  93. u8 k;
  94. u8 j; /* need to divide by 2 */
  95. } __attribute__((packed)) gtf2;
  96. struct {
  97. u8 version;
  98. u8 data1; /* high 6 bits: extra clock resolution */
  99. u8 data2; /* plus low 2 of above: max hactive */
  100. u8 supported_aspects;
  101. u8 flags; /* preferred aspect and blanking support */
  102. u8 supported_scalings;
  103. u8 preferred_refresh;
  104. } __attribute__((packed)) cvt;
  105. } formula;
  106. } __attribute__((packed));
  107. struct detailed_data_wpindex {
  108. u8 white_yx_lo; /* Lower 2 bits each */
  109. u8 white_x_hi;
  110. u8 white_y_hi;
  111. u8 gamma; /* need to divide by 100 then add 1 */
  112. } __attribute__((packed));
  113. struct detailed_data_color_point {
  114. u8 windex1;
  115. u8 wpindex1[3];
  116. u8 windex2;
  117. u8 wpindex2[3];
  118. } __attribute__((packed));
  119. struct cvt_timing {
  120. u8 code[3];
  121. } __attribute__((packed));
  122. struct detailed_non_pixel {
  123. u8 pad1;
  124. u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
  125. fb=color point data, fa=standard timing data,
  126. f9=undefined, f8=mfg. reserved */
  127. u8 pad2;
  128. union {
  129. struct detailed_data_string str;
  130. struct detailed_data_monitor_range range;
  131. struct detailed_data_wpindex color;
  132. struct std_timing timings[6];
  133. struct cvt_timing cvt[4];
  134. } data;
  135. } __attribute__((packed));
  136. #define EDID_DETAIL_EST_TIMINGS 0xf7
  137. #define EDID_DETAIL_CVT_3BYTE 0xf8
  138. #define EDID_DETAIL_COLOR_MGMT_DATA 0xf9
  139. #define EDID_DETAIL_STD_MODES 0xfa
  140. #define EDID_DETAIL_MONITOR_CPDATA 0xfb
  141. #define EDID_DETAIL_MONITOR_NAME 0xfc
  142. #define EDID_DETAIL_MONITOR_RANGE 0xfd
  143. #define EDID_DETAIL_MONITOR_STRING 0xfe
  144. #define EDID_DETAIL_MONITOR_SERIAL 0xff
  145. struct detailed_timing {
  146. __le16 pixel_clock; /* need to multiply by 10 KHz */
  147. union {
  148. struct detailed_pixel_timing pixel_data;
  149. struct detailed_non_pixel other_data;
  150. } data;
  151. } __attribute__((packed));
  152. #define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0)
  153. #define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1)
  154. #define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2)
  155. #define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3)
  156. #define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4)
  157. #define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5)
  158. #define DRM_EDID_INPUT_DIGITAL (1 << 7)
  159. #define DRM_EDID_DIGITAL_DEPTH_MASK (7 << 4)
  160. #define DRM_EDID_DIGITAL_DEPTH_UNDEF (0 << 4)
  161. #define DRM_EDID_DIGITAL_DEPTH_6 (1 << 4)
  162. #define DRM_EDID_DIGITAL_DEPTH_8 (2 << 4)
  163. #define DRM_EDID_DIGITAL_DEPTH_10 (3 << 4)
  164. #define DRM_EDID_DIGITAL_DEPTH_12 (4 << 4)
  165. #define DRM_EDID_DIGITAL_DEPTH_14 (5 << 4)
  166. #define DRM_EDID_DIGITAL_DEPTH_16 (6 << 4)
  167. #define DRM_EDID_DIGITAL_DEPTH_RSVD (7 << 4)
  168. #define DRM_EDID_DIGITAL_TYPE_UNDEF (0)
  169. #define DRM_EDID_DIGITAL_TYPE_DVI (1)
  170. #define DRM_EDID_DIGITAL_TYPE_HDMI_A (2)
  171. #define DRM_EDID_DIGITAL_TYPE_HDMI_B (3)
  172. #define DRM_EDID_DIGITAL_TYPE_MDDI (4)
  173. #define DRM_EDID_DIGITAL_TYPE_DP (5)
  174. #define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0)
  175. #define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
  176. #define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2)
  177. /* If analog */
  178. #define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
  179. /* If digital */
  180. #define DRM_EDID_FEATURE_COLOR_MASK (3 << 3)
  181. #define DRM_EDID_FEATURE_RGB (0 << 3)
  182. #define DRM_EDID_FEATURE_RGB_YCRCB444 (1 << 3)
  183. #define DRM_EDID_FEATURE_RGB_YCRCB422 (2 << 3)
  184. #define DRM_EDID_FEATURE_RGB_YCRCB (3 << 3) /* both 4:4:4 and 4:2:2 */
  185. #define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5)
  186. #define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6)
  187. #define DRM_EDID_FEATURE_PM_STANDBY (1 << 7)
  188. #define DRM_EDID_HDMI_DC_48 (1 << 6)
  189. #define DRM_EDID_HDMI_DC_36 (1 << 5)
  190. #define DRM_EDID_HDMI_DC_30 (1 << 4)
  191. #define DRM_EDID_HDMI_DC_Y444 (1 << 3)
  192. /* ELD Header Block */
  193. #define DRM_ELD_HEADER_BLOCK_SIZE 4
  194. #define DRM_ELD_VER 0
  195. # define DRM_ELD_VER_SHIFT 3
  196. # define DRM_ELD_VER_MASK (0x1f << 3)
  197. # define DRM_ELD_VER_CEA861D (2 << 3) /* supports 861D or below */
  198. # define DRM_ELD_VER_CANNED (0x1f << 3)
  199. #define DRM_ELD_BASELINE_ELD_LEN 2 /* in dwords! */
  200. /* ELD Baseline Block for ELD_Ver == 2 */
  201. #define DRM_ELD_CEA_EDID_VER_MNL 4
  202. # define DRM_ELD_CEA_EDID_VER_SHIFT 5
  203. # define DRM_ELD_CEA_EDID_VER_MASK (7 << 5)
  204. # define DRM_ELD_CEA_EDID_VER_NONE (0 << 5)
  205. # define DRM_ELD_CEA_EDID_VER_CEA861 (1 << 5)
  206. # define DRM_ELD_CEA_EDID_VER_CEA861A (2 << 5)
  207. # define DRM_ELD_CEA_EDID_VER_CEA861BCD (3 << 5)
  208. # define DRM_ELD_MNL_SHIFT 0
  209. # define DRM_ELD_MNL_MASK (0x1f << 0)
  210. #define DRM_ELD_SAD_COUNT_CONN_TYPE 5
  211. # define DRM_ELD_SAD_COUNT_SHIFT 4
  212. # define DRM_ELD_SAD_COUNT_MASK (0xf << 4)
  213. # define DRM_ELD_CONN_TYPE_SHIFT 2
  214. # define DRM_ELD_CONN_TYPE_MASK (3 << 2)
  215. # define DRM_ELD_CONN_TYPE_HDMI (0 << 2)
  216. # define DRM_ELD_CONN_TYPE_DP (1 << 2)
  217. # define DRM_ELD_SUPPORTS_AI (1 << 1)
  218. # define DRM_ELD_SUPPORTS_HDCP (1 << 0)
  219. #define DRM_ELD_AUD_SYNCH_DELAY 6 /* in units of 2 ms */
  220. # define DRM_ELD_AUD_SYNCH_DELAY_MAX 0xfa /* 500 ms */
  221. #define DRM_ELD_SPEAKER 7
  222. # define DRM_ELD_SPEAKER_RLRC (1 << 6)
  223. # define DRM_ELD_SPEAKER_FLRC (1 << 5)
  224. # define DRM_ELD_SPEAKER_RC (1 << 4)
  225. # define DRM_ELD_SPEAKER_RLR (1 << 3)
  226. # define DRM_ELD_SPEAKER_FC (1 << 2)
  227. # define DRM_ELD_SPEAKER_LFE (1 << 1)
  228. # define DRM_ELD_SPEAKER_FLR (1 << 0)
  229. #define DRM_ELD_PORT_ID 8 /* offsets 8..15 inclusive */
  230. # define DRM_ELD_PORT_ID_LEN 8
  231. #define DRM_ELD_MANUFACTURER_NAME0 16
  232. #define DRM_ELD_MANUFACTURER_NAME1 17
  233. #define DRM_ELD_PRODUCT_CODE0 18
  234. #define DRM_ELD_PRODUCT_CODE1 19
  235. #define DRM_ELD_MONITOR_NAME_STRING 20 /* offsets 20..(20+mnl-1) inclusive */
  236. #define DRM_ELD_CEA_SAD(mnl, sad) (20 + (mnl) + 3 * (sad))
  237. struct edid {
  238. u8 header[8];
  239. /* Vendor & product info */
  240. u8 mfg_id[2];
  241. u8 prod_code[2];
  242. u32 serial; /* FIXME: byte order */
  243. u8 mfg_week;
  244. u8 mfg_year;
  245. /* EDID version */
  246. u8 version;
  247. u8 revision;
  248. /* Display info: */
  249. u8 input;
  250. u8 width_cm;
  251. u8 height_cm;
  252. u8 gamma;
  253. u8 features;
  254. /* Color characteristics */
  255. u8 red_green_lo;
  256. u8 black_white_lo;
  257. u8 red_x;
  258. u8 red_y;
  259. u8 green_x;
  260. u8 green_y;
  261. u8 blue_x;
  262. u8 blue_y;
  263. u8 white_x;
  264. u8 white_y;
  265. /* Est. timings and mfg rsvd timings*/
  266. struct est_timings established_timings;
  267. /* Standard timings 1-8*/
  268. struct std_timing standard_timings[8];
  269. /* Detailing timings 1-4 */
  270. struct detailed_timing detailed_timings[4];
  271. /* Number of 128 byte ext. blocks */
  272. u8 extensions;
  273. /* Checksum */
  274. u8 checksum;
  275. } __attribute__((packed));
  276. #define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8))
  277. /* Short Audio Descriptor */
  278. struct cea_sad {
  279. u8 format;
  280. u8 channels; /* max number of channels - 1 */
  281. u8 freq;
  282. u8 byte2; /* meaning depends on format */
  283. };
  284. struct drm_encoder;
  285. struct drm_connector;
  286. struct drm_display_mode;
  287. struct hdmi_avi_infoframe;
  288. struct hdmi_vendor_infoframe;
  289. void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid);
  290. int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads);
  291. int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb);
  292. int drm_av_sync_delay(struct drm_connector *connector,
  293. const struct drm_display_mode *mode);
  294. struct drm_connector *drm_select_eld(struct drm_encoder *encoder);
  295. #ifdef CONFIG_DRM_LOAD_EDID_FIRMWARE
  296. int drm_load_edid_firmware(struct drm_connector *connector);
  297. #else
  298. static inline int drm_load_edid_firmware(struct drm_connector *connector)
  299. {
  300. return 0;
  301. }
  302. #endif
  303. int
  304. drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
  305. const struct drm_display_mode *mode);
  306. int
  307. drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
  308. const struct drm_display_mode *mode);
  309. /**
  310. * drm_eld_mnl - Get ELD monitor name length in bytes.
  311. * @eld: pointer to an eld memory structure with mnl set
  312. */
  313. static inline int drm_eld_mnl(const uint8_t *eld)
  314. {
  315. return (eld[DRM_ELD_CEA_EDID_VER_MNL] & DRM_ELD_MNL_MASK) >> DRM_ELD_MNL_SHIFT;
  316. }
  317. /**
  318. * drm_eld_sad - Get ELD SAD structures.
  319. * @eld: pointer to an eld memory structure with sad_count set
  320. */
  321. static inline const uint8_t *drm_eld_sad(const uint8_t *eld)
  322. {
  323. unsigned int ver, mnl;
  324. ver = (eld[DRM_ELD_VER] & DRM_ELD_VER_MASK) >> DRM_ELD_VER_SHIFT;
  325. if (ver != 2 && ver != 31)
  326. return NULL;
  327. mnl = drm_eld_mnl(eld);
  328. if (mnl > 16)
  329. return NULL;
  330. return eld + DRM_ELD_CEA_SAD(mnl, 0);
  331. }
  332. /**
  333. * drm_eld_sad_count - Get ELD SAD count.
  334. * @eld: pointer to an eld memory structure with sad_count set
  335. */
  336. static inline int drm_eld_sad_count(const uint8_t *eld)
  337. {
  338. return (eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_SAD_COUNT_MASK) >>
  339. DRM_ELD_SAD_COUNT_SHIFT;
  340. }
  341. /**
  342. * drm_eld_calc_baseline_block_size - Calculate baseline block size in bytes
  343. * @eld: pointer to an eld memory structure with mnl and sad_count set
  344. *
  345. * This is a helper for determining the payload size of the baseline block, in
  346. * bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block.
  347. */
  348. static inline int drm_eld_calc_baseline_block_size(const uint8_t *eld)
  349. {
  350. return DRM_ELD_MONITOR_NAME_STRING - DRM_ELD_HEADER_BLOCK_SIZE +
  351. drm_eld_mnl(eld) + drm_eld_sad_count(eld) * 3;
  352. }
  353. /**
  354. * drm_eld_size - Get ELD size in bytes
  355. * @eld: pointer to a complete eld memory structure
  356. *
  357. * The returned value does not include the vendor block. It's vendor specific,
  358. * and comprises of the remaining bytes in the ELD memory buffer after
  359. * drm_eld_size() bytes of header and baseline block.
  360. *
  361. * The returned value is guaranteed to be a multiple of 4.
  362. */
  363. static inline int drm_eld_size(const uint8_t *eld)
  364. {
  365. return DRM_ELD_HEADER_BLOCK_SIZE + eld[DRM_ELD_BASELINE_ELD_LEN] * 4;
  366. }
  367. /**
  368. * drm_eld_get_conn_type - Get device type hdmi/dp connected
  369. * @eld: pointer to an ELD memory structure
  370. *
  371. * The caller need to use %DRM_ELD_CONN_TYPE_HDMI or %DRM_ELD_CONN_TYPE_DP to
  372. * identify the display type connected.
  373. */
  374. static inline u8 drm_eld_get_conn_type(const uint8_t *eld)
  375. {
  376. return eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_CONN_TYPE_MASK;
  377. }
  378. bool drm_probe_ddc(struct i2c_adapter *adapter);
  379. struct edid *drm_do_get_edid(struct drm_connector *connector,
  380. int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
  381. size_t len),
  382. void *data);
  383. struct edid *drm_get_edid(struct drm_connector *connector,
  384. struct i2c_adapter *adapter);
  385. struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
  386. struct i2c_adapter *adapter);
  387. struct edid *drm_edid_duplicate(const struct edid *edid);
  388. int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid);
  389. u8 drm_match_cea_mode(const struct drm_display_mode *to_match);
  390. enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code);
  391. bool drm_detect_hdmi_monitor(struct edid *edid);
  392. bool drm_detect_monitor_audio(struct edid *edid);
  393. bool drm_rgb_quant_range_selectable(struct edid *edid);
  394. int drm_add_modes_noedid(struct drm_connector *connector,
  395. int hdisplay, int vdisplay);
  396. void drm_set_preferred_mode(struct drm_connector *connector,
  397. int hpref, int vpref);
  398. int drm_edid_header_is_valid(const u8 *raw_edid);
  399. bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
  400. bool *edid_corrupt);
  401. bool drm_edid_is_valid(struct edid *edid);
  402. void drm_edid_get_monitor_name(struct edid *edid, char *name,
  403. int buflen);
  404. struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
  405. int hsize, int vsize, int fresh,
  406. bool rb);
  407. #endif /* __DRM_EDID_H__ */