c67x00-sched.c 30 KB

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  1. /*
  2. * c67x00-sched.c: Cypress C67X00 USB Host Controller Driver - TD scheduling
  3. *
  4. * Copyright (C) 2006-2008 Barco N.V.
  5. * Derived from the Cypress cy7c67200/300 ezusb linux driver and
  6. * based on multiple host controller drivers inside the linux kernel.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  21. * MA 02110-1301 USA.
  22. */
  23. #include <linux/kthread.h>
  24. #include <linux/slab.h>
  25. #include "c67x00.h"
  26. #include "c67x00-hcd.h"
  27. /*
  28. * These are the stages for a control urb, they are kept
  29. * in both urb->interval and td->privdata.
  30. */
  31. #define SETUP_STAGE 0
  32. #define DATA_STAGE 1
  33. #define STATUS_STAGE 2
  34. /* -------------------------------------------------------------------------- */
  35. /**
  36. * struct c67x00_ep_data: Host endpoint data structure
  37. */
  38. struct c67x00_ep_data {
  39. struct list_head queue;
  40. struct list_head node;
  41. struct usb_host_endpoint *hep;
  42. struct usb_device *dev;
  43. u16 next_frame; /* For int/isoc transactions */
  44. };
  45. /**
  46. * struct c67x00_td
  47. *
  48. * Hardware parts are little endiannes, SW in CPU endianess.
  49. */
  50. struct c67x00_td {
  51. /* HW specific part */
  52. __le16 ly_base_addr; /* Bytes 0-1 */
  53. __le16 port_length; /* Bytes 2-3 */
  54. u8 pid_ep; /* Byte 4 */
  55. u8 dev_addr; /* Byte 5 */
  56. u8 ctrl_reg; /* Byte 6 */
  57. u8 status; /* Byte 7 */
  58. u8 retry_cnt; /* Byte 8 */
  59. #define TT_OFFSET 2
  60. #define TT_CONTROL 0
  61. #define TT_ISOCHRONOUS 1
  62. #define TT_BULK 2
  63. #define TT_INTERRUPT 3
  64. u8 residue; /* Byte 9 */
  65. __le16 next_td_addr; /* Bytes 10-11 */
  66. /* SW part */
  67. struct list_head td_list;
  68. u16 td_addr;
  69. void *data;
  70. struct urb *urb;
  71. unsigned long privdata;
  72. /* These are needed for handling the toggle bits:
  73. * an urb can be dequeued while a td is in progress
  74. * after checking the td, the toggle bit might need to
  75. * be fixed */
  76. struct c67x00_ep_data *ep_data;
  77. unsigned int pipe;
  78. };
  79. struct c67x00_urb_priv {
  80. struct list_head hep_node;
  81. struct urb *urb;
  82. int port;
  83. int cnt; /* packet number for isoc */
  84. int status;
  85. struct c67x00_ep_data *ep_data;
  86. };
  87. #define td_udev(td) ((td)->ep_data->dev)
  88. #define CY_TD_SIZE 12
  89. #define TD_PIDEP_OFFSET 0x04
  90. #define TD_PIDEPMASK_PID 0xF0
  91. #define TD_PIDEPMASK_EP 0x0F
  92. #define TD_PORTLENMASK_DL 0x03FF
  93. #define TD_PORTLENMASK_PN 0xC000
  94. #define TD_STATUS_OFFSET 0x07
  95. #define TD_STATUSMASK_ACK 0x01
  96. #define TD_STATUSMASK_ERR 0x02
  97. #define TD_STATUSMASK_TMOUT 0x04
  98. #define TD_STATUSMASK_SEQ 0x08
  99. #define TD_STATUSMASK_SETUP 0x10
  100. #define TD_STATUSMASK_OVF 0x20
  101. #define TD_STATUSMASK_NAK 0x40
  102. #define TD_STATUSMASK_STALL 0x80
  103. #define TD_ERROR_MASK (TD_STATUSMASK_ERR | TD_STATUSMASK_TMOUT | \
  104. TD_STATUSMASK_STALL)
  105. #define TD_RETRYCNT_OFFSET 0x08
  106. #define TD_RETRYCNTMASK_ACT_FLG 0x10
  107. #define TD_RETRYCNTMASK_TX_TYPE 0x0C
  108. #define TD_RETRYCNTMASK_RTY_CNT 0x03
  109. #define TD_RESIDUE_OVERFLOW 0x80
  110. #define TD_PID_IN 0x90
  111. /* Residue: signed 8bits, neg -> OVERFLOW, pos -> UNDERFLOW */
  112. #define td_residue(td) ((__s8)(td->residue))
  113. #define td_ly_base_addr(td) (__le16_to_cpu((td)->ly_base_addr))
  114. #define td_port_length(td) (__le16_to_cpu((td)->port_length))
  115. #define td_next_td_addr(td) (__le16_to_cpu((td)->next_td_addr))
  116. #define td_active(td) ((td)->retry_cnt & TD_RETRYCNTMASK_ACT_FLG)
  117. #define td_length(td) (td_port_length(td) & TD_PORTLENMASK_DL)
  118. #define td_sequence_ok(td) (!td->status || \
  119. (!(td->status & TD_STATUSMASK_SEQ) == \
  120. !(td->ctrl_reg & SEQ_SEL)))
  121. #define td_acked(td) (!td->status || \
  122. (td->status & TD_STATUSMASK_ACK))
  123. #define td_actual_bytes(td) (td_length(td) - td_residue(td))
  124. /* -------------------------------------------------------------------------- */
  125. /**
  126. * dbg_td - Dump the contents of the TD
  127. */
  128. static void dbg_td(struct c67x00_hcd *c67x00, struct c67x00_td *td, char *msg)
  129. {
  130. struct device *dev = c67x00_hcd_dev(c67x00);
  131. dev_dbg(dev, "### %s at 0x%04x\n", msg, td->td_addr);
  132. dev_dbg(dev, "urb: 0x%p\n", td->urb);
  133. dev_dbg(dev, "endpoint: %4d\n", usb_pipeendpoint(td->pipe));
  134. dev_dbg(dev, "pipeout: %4d\n", usb_pipeout(td->pipe));
  135. dev_dbg(dev, "ly_base_addr: 0x%04x\n", td_ly_base_addr(td));
  136. dev_dbg(dev, "port_length: 0x%04x\n", td_port_length(td));
  137. dev_dbg(dev, "pid_ep: 0x%02x\n", td->pid_ep);
  138. dev_dbg(dev, "dev_addr: 0x%02x\n", td->dev_addr);
  139. dev_dbg(dev, "ctrl_reg: 0x%02x\n", td->ctrl_reg);
  140. dev_dbg(dev, "status: 0x%02x\n", td->status);
  141. dev_dbg(dev, "retry_cnt: 0x%02x\n", td->retry_cnt);
  142. dev_dbg(dev, "residue: 0x%02x\n", td->residue);
  143. dev_dbg(dev, "next_td_addr: 0x%04x\n", td_next_td_addr(td));
  144. dev_dbg(dev, "data: %*ph\n", td_length(td), td->data);
  145. }
  146. /* -------------------------------------------------------------------------- */
  147. /* Helper functions */
  148. static inline u16 c67x00_get_current_frame_number(struct c67x00_hcd *c67x00)
  149. {
  150. return c67x00_ll_husb_get_frame(c67x00->sie) & HOST_FRAME_MASK;
  151. }
  152. /**
  153. * frame_add
  154. * Software wraparound for framenumbers.
  155. */
  156. static inline u16 frame_add(u16 a, u16 b)
  157. {
  158. return (a + b) & HOST_FRAME_MASK;
  159. }
  160. /**
  161. * frame_after - is frame a after frame b
  162. */
  163. static inline int frame_after(u16 a, u16 b)
  164. {
  165. return ((HOST_FRAME_MASK + a - b) & HOST_FRAME_MASK) <
  166. (HOST_FRAME_MASK / 2);
  167. }
  168. /**
  169. * frame_after_eq - is frame a after or equal to frame b
  170. */
  171. static inline int frame_after_eq(u16 a, u16 b)
  172. {
  173. return ((HOST_FRAME_MASK + 1 + a - b) & HOST_FRAME_MASK) <
  174. (HOST_FRAME_MASK / 2);
  175. }
  176. /* -------------------------------------------------------------------------- */
  177. /**
  178. * c67x00_release_urb - remove link from all tds to this urb
  179. * Disconnects the urb from it's tds, so that it can be given back.
  180. * pre: urb->hcpriv != NULL
  181. */
  182. static void c67x00_release_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  183. {
  184. struct c67x00_td *td;
  185. struct c67x00_urb_priv *urbp;
  186. BUG_ON(!urb);
  187. c67x00->urb_count--;
  188. if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
  189. c67x00->urb_iso_count--;
  190. if (c67x00->urb_iso_count == 0)
  191. c67x00->max_frame_bw = MAX_FRAME_BW_STD;
  192. }
  193. /* TODO this might be not so efficient when we've got many urbs!
  194. * Alternatives:
  195. * * only clear when needed
  196. * * keep a list of tds with each urbp
  197. */
  198. list_for_each_entry(td, &c67x00->td_list, td_list)
  199. if (urb == td->urb)
  200. td->urb = NULL;
  201. urbp = urb->hcpriv;
  202. urb->hcpriv = NULL;
  203. list_del(&urbp->hep_node);
  204. kfree(urbp);
  205. }
  206. /* -------------------------------------------------------------------------- */
  207. static struct c67x00_ep_data *
  208. c67x00_ep_data_alloc(struct c67x00_hcd *c67x00, struct urb *urb)
  209. {
  210. struct usb_host_endpoint *hep = urb->ep;
  211. struct c67x00_ep_data *ep_data;
  212. int type;
  213. c67x00->current_frame = c67x00_get_current_frame_number(c67x00);
  214. /* Check if endpoint already has a c67x00_ep_data struct allocated */
  215. if (hep->hcpriv) {
  216. ep_data = hep->hcpriv;
  217. if (frame_after(c67x00->current_frame, ep_data->next_frame))
  218. ep_data->next_frame =
  219. frame_add(c67x00->current_frame, 1);
  220. return hep->hcpriv;
  221. }
  222. /* Allocate and initialize a new c67x00 endpoint data structure */
  223. ep_data = kzalloc(sizeof(*ep_data), GFP_ATOMIC);
  224. if (!ep_data)
  225. return NULL;
  226. INIT_LIST_HEAD(&ep_data->queue);
  227. INIT_LIST_HEAD(&ep_data->node);
  228. ep_data->hep = hep;
  229. /* hold a reference to udev as long as this endpoint lives,
  230. * this is needed to possibly fix the data toggle */
  231. ep_data->dev = usb_get_dev(urb->dev);
  232. hep->hcpriv = ep_data;
  233. /* For ISOC and INT endpoints, start ASAP: */
  234. ep_data->next_frame = frame_add(c67x00->current_frame, 1);
  235. /* Add the endpoint data to one of the pipe lists; must be added
  236. in order of endpoint address */
  237. type = usb_pipetype(urb->pipe);
  238. if (list_empty(&ep_data->node)) {
  239. list_add(&ep_data->node, &c67x00->list[type]);
  240. } else {
  241. struct c67x00_ep_data *prev;
  242. list_for_each_entry(prev, &c67x00->list[type], node) {
  243. if (prev->hep->desc.bEndpointAddress >
  244. hep->desc.bEndpointAddress) {
  245. list_add(&ep_data->node, prev->node.prev);
  246. break;
  247. }
  248. }
  249. }
  250. return ep_data;
  251. }
  252. static int c67x00_ep_data_free(struct usb_host_endpoint *hep)
  253. {
  254. struct c67x00_ep_data *ep_data = hep->hcpriv;
  255. if (!ep_data)
  256. return 0;
  257. if (!list_empty(&ep_data->queue))
  258. return -EBUSY;
  259. usb_put_dev(ep_data->dev);
  260. list_del(&ep_data->queue);
  261. list_del(&ep_data->node);
  262. kfree(ep_data);
  263. hep->hcpriv = NULL;
  264. return 0;
  265. }
  266. void c67x00_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  267. {
  268. struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
  269. unsigned long flags;
  270. if (!list_empty(&ep->urb_list))
  271. dev_warn(c67x00_hcd_dev(c67x00), "error: urb list not empty\n");
  272. spin_lock_irqsave(&c67x00->lock, flags);
  273. /* loop waiting for all transfers in the endpoint queue to complete */
  274. while (c67x00_ep_data_free(ep)) {
  275. /* Drop the lock so we can sleep waiting for the hardware */
  276. spin_unlock_irqrestore(&c67x00->lock, flags);
  277. /* it could happen that we reinitialize this completion, while
  278. * somebody was waiting for that completion. The timeout and
  279. * while loop handle such cases, but this might be improved */
  280. reinit_completion(&c67x00->endpoint_disable);
  281. c67x00_sched_kick(c67x00);
  282. wait_for_completion_timeout(&c67x00->endpoint_disable, 1 * HZ);
  283. spin_lock_irqsave(&c67x00->lock, flags);
  284. }
  285. spin_unlock_irqrestore(&c67x00->lock, flags);
  286. }
  287. /* -------------------------------------------------------------------------- */
  288. static inline int get_root_port(struct usb_device *dev)
  289. {
  290. while (dev->parent->parent)
  291. dev = dev->parent;
  292. return dev->portnum;
  293. }
  294. int c67x00_urb_enqueue(struct usb_hcd *hcd,
  295. struct urb *urb, gfp_t mem_flags)
  296. {
  297. int ret;
  298. unsigned long flags;
  299. struct c67x00_urb_priv *urbp;
  300. struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
  301. int port = get_root_port(urb->dev)-1;
  302. /* Allocate and initialize urb private data */
  303. urbp = kzalloc(sizeof(*urbp), mem_flags);
  304. if (!urbp) {
  305. ret = -ENOMEM;
  306. goto err_urbp;
  307. }
  308. spin_lock_irqsave(&c67x00->lock, flags);
  309. /* Make sure host controller is running */
  310. if (!HC_IS_RUNNING(hcd->state)) {
  311. ret = -ENODEV;
  312. goto err_not_linked;
  313. }
  314. ret = usb_hcd_link_urb_to_ep(hcd, urb);
  315. if (ret)
  316. goto err_not_linked;
  317. INIT_LIST_HEAD(&urbp->hep_node);
  318. urbp->urb = urb;
  319. urbp->port = port;
  320. urbp->ep_data = c67x00_ep_data_alloc(c67x00, urb);
  321. if (!urbp->ep_data) {
  322. ret = -ENOMEM;
  323. goto err_epdata;
  324. }
  325. /* TODO claim bandwidth with usb_claim_bandwidth?
  326. * also release it somewhere! */
  327. urb->hcpriv = urbp;
  328. urb->actual_length = 0; /* Nothing received/transmitted yet */
  329. switch (usb_pipetype(urb->pipe)) {
  330. case PIPE_CONTROL:
  331. urb->interval = SETUP_STAGE;
  332. break;
  333. case PIPE_INTERRUPT:
  334. break;
  335. case PIPE_BULK:
  336. break;
  337. case PIPE_ISOCHRONOUS:
  338. if (c67x00->urb_iso_count == 0)
  339. c67x00->max_frame_bw = MAX_FRAME_BW_ISO;
  340. c67x00->urb_iso_count++;
  341. /* Assume always URB_ISO_ASAP, FIXME */
  342. if (list_empty(&urbp->ep_data->queue))
  343. urb->start_frame = urbp->ep_data->next_frame;
  344. else {
  345. /* Go right after the last one */
  346. struct urb *last_urb;
  347. last_urb = list_entry(urbp->ep_data->queue.prev,
  348. struct c67x00_urb_priv,
  349. hep_node)->urb;
  350. urb->start_frame =
  351. frame_add(last_urb->start_frame,
  352. last_urb->number_of_packets *
  353. last_urb->interval);
  354. }
  355. urbp->cnt = 0;
  356. break;
  357. }
  358. /* Add the URB to the endpoint queue */
  359. list_add_tail(&urbp->hep_node, &urbp->ep_data->queue);
  360. /* If this is the only URB, kick start the controller */
  361. if (!c67x00->urb_count++)
  362. c67x00_ll_hpi_enable_sofeop(c67x00->sie);
  363. c67x00_sched_kick(c67x00);
  364. spin_unlock_irqrestore(&c67x00->lock, flags);
  365. return 0;
  366. err_epdata:
  367. usb_hcd_unlink_urb_from_ep(hcd, urb);
  368. err_not_linked:
  369. spin_unlock_irqrestore(&c67x00->lock, flags);
  370. kfree(urbp);
  371. err_urbp:
  372. return ret;
  373. }
  374. int c67x00_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  375. {
  376. struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
  377. unsigned long flags;
  378. int rc;
  379. spin_lock_irqsave(&c67x00->lock, flags);
  380. rc = usb_hcd_check_unlink_urb(hcd, urb, status);
  381. if (rc)
  382. goto done;
  383. c67x00_release_urb(c67x00, urb);
  384. usb_hcd_unlink_urb_from_ep(hcd, urb);
  385. spin_unlock(&c67x00->lock);
  386. usb_hcd_giveback_urb(hcd, urb, status);
  387. spin_lock(&c67x00->lock);
  388. spin_unlock_irqrestore(&c67x00->lock, flags);
  389. return 0;
  390. done:
  391. spin_unlock_irqrestore(&c67x00->lock, flags);
  392. return rc;
  393. }
  394. /* -------------------------------------------------------------------------- */
  395. /*
  396. * pre: c67x00 locked, urb unlocked
  397. */
  398. static void
  399. c67x00_giveback_urb(struct c67x00_hcd *c67x00, struct urb *urb, int status)
  400. {
  401. struct c67x00_urb_priv *urbp;
  402. if (!urb)
  403. return;
  404. urbp = urb->hcpriv;
  405. urbp->status = status;
  406. list_del_init(&urbp->hep_node);
  407. c67x00_release_urb(c67x00, urb);
  408. usb_hcd_unlink_urb_from_ep(c67x00_hcd_to_hcd(c67x00), urb);
  409. spin_unlock(&c67x00->lock);
  410. usb_hcd_giveback_urb(c67x00_hcd_to_hcd(c67x00), urb, urbp->status);
  411. spin_lock(&c67x00->lock);
  412. }
  413. /* -------------------------------------------------------------------------- */
  414. static int c67x00_claim_frame_bw(struct c67x00_hcd *c67x00, struct urb *urb,
  415. int len, int periodic)
  416. {
  417. struct c67x00_urb_priv *urbp = urb->hcpriv;
  418. int bit_time;
  419. /* According to the C67x00 BIOS user manual, page 3-18,19, the
  420. * following calculations provide the full speed bit times for
  421. * a transaction.
  422. *
  423. * FS(in) = 112.5 + 9.36*BC + HOST_DELAY
  424. * FS(in,iso) = 90.5 + 9.36*BC + HOST_DELAY
  425. * FS(out) = 112.5 + 9.36*BC + HOST_DELAY
  426. * FS(out,iso) = 78.4 + 9.36*BC + HOST_DELAY
  427. * LS(in) = 802.4 + 75.78*BC + HOST_DELAY
  428. * LS(out) = 802.6 + 74.67*BC + HOST_DELAY
  429. *
  430. * HOST_DELAY == 106 for the c67200 and c67300.
  431. */
  432. /* make calculations in 1/100 bit times to maintain resolution */
  433. if (urbp->ep_data->dev->speed == USB_SPEED_LOW) {
  434. /* Low speed pipe */
  435. if (usb_pipein(urb->pipe))
  436. bit_time = 80240 + 7578*len;
  437. else
  438. bit_time = 80260 + 7467*len;
  439. } else {
  440. /* FS pipes */
  441. if (usb_pipeisoc(urb->pipe))
  442. bit_time = usb_pipein(urb->pipe) ? 9050 : 7840;
  443. else
  444. bit_time = 11250;
  445. bit_time += 936*len;
  446. }
  447. /* Scale back down to integer bit times. Use a host delay of 106.
  448. * (this is the only place it is used) */
  449. bit_time = ((bit_time+50) / 100) + 106;
  450. if (unlikely(bit_time + c67x00->bandwidth_allocated >=
  451. c67x00->max_frame_bw))
  452. return -EMSGSIZE;
  453. if (unlikely(c67x00->next_td_addr + CY_TD_SIZE >=
  454. c67x00->td_base_addr + SIE_TD_SIZE))
  455. return -EMSGSIZE;
  456. if (unlikely(c67x00->next_buf_addr + len >=
  457. c67x00->buf_base_addr + SIE_TD_BUF_SIZE))
  458. return -EMSGSIZE;
  459. if (periodic) {
  460. if (unlikely(bit_time + c67x00->periodic_bw_allocated >=
  461. MAX_PERIODIC_BW(c67x00->max_frame_bw)))
  462. return -EMSGSIZE;
  463. c67x00->periodic_bw_allocated += bit_time;
  464. }
  465. c67x00->bandwidth_allocated += bit_time;
  466. return 0;
  467. }
  468. /* -------------------------------------------------------------------------- */
  469. /**
  470. * td_addr and buf_addr must be word aligned
  471. */
  472. static int c67x00_create_td(struct c67x00_hcd *c67x00, struct urb *urb,
  473. void *data, int len, int pid, int toggle,
  474. unsigned long privdata)
  475. {
  476. struct c67x00_td *td;
  477. struct c67x00_urb_priv *urbp = urb->hcpriv;
  478. const __u8 active_flag = 1, retry_cnt = 3;
  479. __u8 cmd = 0;
  480. int tt = 0;
  481. if (c67x00_claim_frame_bw(c67x00, urb, len, usb_pipeisoc(urb->pipe)
  482. || usb_pipeint(urb->pipe)))
  483. return -EMSGSIZE; /* Not really an error, but expected */
  484. td = kzalloc(sizeof(*td), GFP_ATOMIC);
  485. if (!td)
  486. return -ENOMEM;
  487. td->pipe = urb->pipe;
  488. td->ep_data = urbp->ep_data;
  489. if ((td_udev(td)->speed == USB_SPEED_LOW) &&
  490. !(c67x00->low_speed_ports & (1 << urbp->port)))
  491. cmd |= PREAMBLE_EN;
  492. switch (usb_pipetype(td->pipe)) {
  493. case PIPE_ISOCHRONOUS:
  494. tt = TT_ISOCHRONOUS;
  495. cmd |= ISO_EN;
  496. break;
  497. case PIPE_CONTROL:
  498. tt = TT_CONTROL;
  499. break;
  500. case PIPE_BULK:
  501. tt = TT_BULK;
  502. break;
  503. case PIPE_INTERRUPT:
  504. tt = TT_INTERRUPT;
  505. break;
  506. }
  507. if (toggle)
  508. cmd |= SEQ_SEL;
  509. cmd |= ARM_EN;
  510. /* SW part */
  511. td->td_addr = c67x00->next_td_addr;
  512. c67x00->next_td_addr = c67x00->next_td_addr + CY_TD_SIZE;
  513. /* HW part */
  514. td->ly_base_addr = __cpu_to_le16(c67x00->next_buf_addr);
  515. td->port_length = __cpu_to_le16((c67x00->sie->sie_num << 15) |
  516. (urbp->port << 14) | (len & 0x3FF));
  517. td->pid_ep = ((pid & 0xF) << TD_PIDEP_OFFSET) |
  518. (usb_pipeendpoint(td->pipe) & 0xF);
  519. td->dev_addr = usb_pipedevice(td->pipe) & 0x7F;
  520. td->ctrl_reg = cmd;
  521. td->status = 0;
  522. td->retry_cnt = (tt << TT_OFFSET) | (active_flag << 4) | retry_cnt;
  523. td->residue = 0;
  524. td->next_td_addr = __cpu_to_le16(c67x00->next_td_addr);
  525. /* SW part */
  526. td->data = data;
  527. td->urb = urb;
  528. td->privdata = privdata;
  529. c67x00->next_buf_addr += (len + 1) & ~0x01; /* properly align */
  530. list_add_tail(&td->td_list, &c67x00->td_list);
  531. return 0;
  532. }
  533. static inline void c67x00_release_td(struct c67x00_td *td)
  534. {
  535. list_del_init(&td->td_list);
  536. kfree(td);
  537. }
  538. /* -------------------------------------------------------------------------- */
  539. static int c67x00_add_data_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  540. {
  541. int remaining;
  542. int toggle;
  543. int pid;
  544. int ret = 0;
  545. int maxps;
  546. int need_empty;
  547. toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  548. usb_pipeout(urb->pipe));
  549. remaining = urb->transfer_buffer_length - urb->actual_length;
  550. maxps = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
  551. need_empty = (urb->transfer_flags & URB_ZERO_PACKET) &&
  552. usb_pipeout(urb->pipe) && !(remaining % maxps);
  553. while (remaining || need_empty) {
  554. int len;
  555. char *td_buf;
  556. len = (remaining > maxps) ? maxps : remaining;
  557. if (!len)
  558. need_empty = 0;
  559. pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;
  560. td_buf = urb->transfer_buffer + urb->transfer_buffer_length -
  561. remaining;
  562. ret = c67x00_create_td(c67x00, urb, td_buf, len, pid, toggle,
  563. DATA_STAGE);
  564. if (ret)
  565. return ret; /* td wasn't created */
  566. toggle ^= 1;
  567. remaining -= len;
  568. if (usb_pipecontrol(urb->pipe))
  569. break;
  570. }
  571. return 0;
  572. }
  573. /**
  574. * return 0 in case more bandwidth is available, else errorcode
  575. */
  576. static int c67x00_add_ctrl_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  577. {
  578. int ret;
  579. int pid;
  580. switch (urb->interval) {
  581. default:
  582. case SETUP_STAGE:
  583. ret = c67x00_create_td(c67x00, urb, urb->setup_packet,
  584. 8, USB_PID_SETUP, 0, SETUP_STAGE);
  585. if (ret)
  586. return ret;
  587. urb->interval = SETUP_STAGE;
  588. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  589. usb_pipeout(urb->pipe), 1);
  590. break;
  591. case DATA_STAGE:
  592. if (urb->transfer_buffer_length) {
  593. ret = c67x00_add_data_urb(c67x00, urb);
  594. if (ret)
  595. return ret;
  596. break;
  597. } /* else fallthrough */
  598. case STATUS_STAGE:
  599. pid = !usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;
  600. ret = c67x00_create_td(c67x00, urb, NULL, 0, pid, 1,
  601. STATUS_STAGE);
  602. if (ret)
  603. return ret;
  604. break;
  605. }
  606. return 0;
  607. }
  608. /*
  609. * return 0 in case more bandwidth is available, else errorcode
  610. */
  611. static int c67x00_add_int_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  612. {
  613. struct c67x00_urb_priv *urbp = urb->hcpriv;
  614. if (frame_after_eq(c67x00->current_frame, urbp->ep_data->next_frame)) {
  615. urbp->ep_data->next_frame =
  616. frame_add(urbp->ep_data->next_frame, urb->interval);
  617. return c67x00_add_data_urb(c67x00, urb);
  618. }
  619. return 0;
  620. }
  621. static int c67x00_add_iso_urb(struct c67x00_hcd *c67x00, struct urb *urb)
  622. {
  623. struct c67x00_urb_priv *urbp = urb->hcpriv;
  624. if (frame_after_eq(c67x00->current_frame, urbp->ep_data->next_frame)) {
  625. char *td_buf;
  626. int len, pid, ret;
  627. BUG_ON(urbp->cnt >= urb->number_of_packets);
  628. td_buf = urb->transfer_buffer +
  629. urb->iso_frame_desc[urbp->cnt].offset;
  630. len = urb->iso_frame_desc[urbp->cnt].length;
  631. pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;
  632. ret = c67x00_create_td(c67x00, urb, td_buf, len, pid, 0,
  633. urbp->cnt);
  634. if (ret) {
  635. dev_dbg(c67x00_hcd_dev(c67x00), "create failed: %d\n",
  636. ret);
  637. urb->iso_frame_desc[urbp->cnt].actual_length = 0;
  638. urb->iso_frame_desc[urbp->cnt].status = ret;
  639. if (urbp->cnt + 1 == urb->number_of_packets)
  640. c67x00_giveback_urb(c67x00, urb, 0);
  641. }
  642. urbp->ep_data->next_frame =
  643. frame_add(urbp->ep_data->next_frame, urb->interval);
  644. urbp->cnt++;
  645. }
  646. return 0;
  647. }
  648. /* -------------------------------------------------------------------------- */
  649. static void c67x00_fill_from_list(struct c67x00_hcd *c67x00, int type,
  650. int (*add)(struct c67x00_hcd *, struct urb *))
  651. {
  652. struct c67x00_ep_data *ep_data;
  653. struct urb *urb;
  654. /* traverse every endpoint on the list */
  655. list_for_each_entry(ep_data, &c67x00->list[type], node) {
  656. if (!list_empty(&ep_data->queue)) {
  657. /* and add the first urb */
  658. /* isochronous transfer rely on this */
  659. urb = list_entry(ep_data->queue.next,
  660. struct c67x00_urb_priv,
  661. hep_node)->urb;
  662. add(c67x00, urb);
  663. }
  664. }
  665. }
  666. static void c67x00_fill_frame(struct c67x00_hcd *c67x00)
  667. {
  668. struct c67x00_td *td, *ttd;
  669. /* Check if we can proceed */
  670. if (!list_empty(&c67x00->td_list)) {
  671. dev_warn(c67x00_hcd_dev(c67x00),
  672. "TD list not empty! This should not happen!\n");
  673. list_for_each_entry_safe(td, ttd, &c67x00->td_list, td_list) {
  674. dbg_td(c67x00, td, "Unprocessed td");
  675. c67x00_release_td(td);
  676. }
  677. }
  678. /* Reinitialize variables */
  679. c67x00->bandwidth_allocated = 0;
  680. c67x00->periodic_bw_allocated = 0;
  681. c67x00->next_td_addr = c67x00->td_base_addr;
  682. c67x00->next_buf_addr = c67x00->buf_base_addr;
  683. /* Fill the list */
  684. c67x00_fill_from_list(c67x00, PIPE_ISOCHRONOUS, c67x00_add_iso_urb);
  685. c67x00_fill_from_list(c67x00, PIPE_INTERRUPT, c67x00_add_int_urb);
  686. c67x00_fill_from_list(c67x00, PIPE_CONTROL, c67x00_add_ctrl_urb);
  687. c67x00_fill_from_list(c67x00, PIPE_BULK, c67x00_add_data_urb);
  688. }
  689. /* -------------------------------------------------------------------------- */
  690. /**
  691. * Get TD from C67X00
  692. */
  693. static inline void
  694. c67x00_parse_td(struct c67x00_hcd *c67x00, struct c67x00_td *td)
  695. {
  696. c67x00_ll_read_mem_le16(c67x00->sie->dev,
  697. td->td_addr, td, CY_TD_SIZE);
  698. if (usb_pipein(td->pipe) && td_actual_bytes(td))
  699. c67x00_ll_read_mem_le16(c67x00->sie->dev, td_ly_base_addr(td),
  700. td->data, td_actual_bytes(td));
  701. }
  702. static int c67x00_td_to_error(struct c67x00_hcd *c67x00, struct c67x00_td *td)
  703. {
  704. if (td->status & TD_STATUSMASK_ERR) {
  705. dbg_td(c67x00, td, "ERROR_FLAG");
  706. return -EILSEQ;
  707. }
  708. if (td->status & TD_STATUSMASK_STALL) {
  709. /* dbg_td(c67x00, td, "STALL"); */
  710. return -EPIPE;
  711. }
  712. if (td->status & TD_STATUSMASK_TMOUT) {
  713. dbg_td(c67x00, td, "TIMEOUT");
  714. return -ETIMEDOUT;
  715. }
  716. return 0;
  717. }
  718. static inline int c67x00_end_of_data(struct c67x00_td *td)
  719. {
  720. int maxps, need_empty, remaining;
  721. struct urb *urb = td->urb;
  722. int act_bytes;
  723. act_bytes = td_actual_bytes(td);
  724. if (unlikely(!act_bytes))
  725. return 1; /* This was an empty packet */
  726. maxps = usb_maxpacket(td_udev(td), td->pipe, usb_pipeout(td->pipe));
  727. if (unlikely(act_bytes < maxps))
  728. return 1; /* Smaller then full packet */
  729. remaining = urb->transfer_buffer_length - urb->actual_length;
  730. need_empty = (urb->transfer_flags & URB_ZERO_PACKET) &&
  731. usb_pipeout(urb->pipe) && !(remaining % maxps);
  732. if (unlikely(!remaining && !need_empty))
  733. return 1;
  734. return 0;
  735. }
  736. /* -------------------------------------------------------------------------- */
  737. /* Remove all td's from the list which come
  738. * after last_td and are meant for the same pipe.
  739. * This is used when a short packet has occurred */
  740. static inline void c67x00_clear_pipe(struct c67x00_hcd *c67x00,
  741. struct c67x00_td *last_td)
  742. {
  743. struct c67x00_td *td, *tmp;
  744. td = last_td;
  745. tmp = last_td;
  746. while (td->td_list.next != &c67x00->td_list) {
  747. td = list_entry(td->td_list.next, struct c67x00_td, td_list);
  748. if (td->pipe == last_td->pipe) {
  749. c67x00_release_td(td);
  750. td = tmp;
  751. }
  752. tmp = td;
  753. }
  754. }
  755. /* -------------------------------------------------------------------------- */
  756. static void c67x00_handle_successful_td(struct c67x00_hcd *c67x00,
  757. struct c67x00_td *td)
  758. {
  759. struct urb *urb = td->urb;
  760. if (!urb)
  761. return;
  762. urb->actual_length += td_actual_bytes(td);
  763. switch (usb_pipetype(td->pipe)) {
  764. /* isochronous tds are handled separately */
  765. case PIPE_CONTROL:
  766. switch (td->privdata) {
  767. case SETUP_STAGE:
  768. urb->interval =
  769. urb->transfer_buffer_length ?
  770. DATA_STAGE : STATUS_STAGE;
  771. /* Don't count setup_packet with normal data: */
  772. urb->actual_length = 0;
  773. break;
  774. case DATA_STAGE:
  775. if (c67x00_end_of_data(td)) {
  776. urb->interval = STATUS_STAGE;
  777. c67x00_clear_pipe(c67x00, td);
  778. }
  779. break;
  780. case STATUS_STAGE:
  781. urb->interval = 0;
  782. c67x00_giveback_urb(c67x00, urb, 0);
  783. break;
  784. }
  785. break;
  786. case PIPE_INTERRUPT:
  787. case PIPE_BULK:
  788. if (unlikely(c67x00_end_of_data(td))) {
  789. c67x00_clear_pipe(c67x00, td);
  790. c67x00_giveback_urb(c67x00, urb, 0);
  791. }
  792. break;
  793. }
  794. }
  795. static void c67x00_handle_isoc(struct c67x00_hcd *c67x00, struct c67x00_td *td)
  796. {
  797. struct urb *urb = td->urb;
  798. struct c67x00_urb_priv *urbp;
  799. int cnt;
  800. if (!urb)
  801. return;
  802. urbp = urb->hcpriv;
  803. cnt = td->privdata;
  804. if (td->status & TD_ERROR_MASK)
  805. urb->error_count++;
  806. urb->iso_frame_desc[cnt].actual_length = td_actual_bytes(td);
  807. urb->iso_frame_desc[cnt].status = c67x00_td_to_error(c67x00, td);
  808. if (cnt + 1 == urb->number_of_packets) /* Last packet */
  809. c67x00_giveback_urb(c67x00, urb, 0);
  810. }
  811. /* -------------------------------------------------------------------------- */
  812. /**
  813. * c67x00_check_td_list - handle tds which have been processed by the c67x00
  814. * pre: current_td == 0
  815. */
  816. static inline void c67x00_check_td_list(struct c67x00_hcd *c67x00)
  817. {
  818. struct c67x00_td *td, *tmp;
  819. struct urb *urb;
  820. int ack_ok;
  821. int clear_endpoint;
  822. list_for_each_entry_safe(td, tmp, &c67x00->td_list, td_list) {
  823. /* get the TD */
  824. c67x00_parse_td(c67x00, td);
  825. urb = td->urb; /* urb can be NULL! */
  826. ack_ok = 0;
  827. clear_endpoint = 1;
  828. /* Handle isochronous transfers separately */
  829. if (usb_pipeisoc(td->pipe)) {
  830. clear_endpoint = 0;
  831. c67x00_handle_isoc(c67x00, td);
  832. goto cont;
  833. }
  834. /* When an error occurs, all td's for that pipe go into an
  835. * inactive state. This state matches successful transfers so
  836. * we must make sure not to service them. */
  837. if (td->status & TD_ERROR_MASK) {
  838. c67x00_giveback_urb(c67x00, urb,
  839. c67x00_td_to_error(c67x00, td));
  840. goto cont;
  841. }
  842. if ((td->status & TD_STATUSMASK_NAK) || !td_sequence_ok(td) ||
  843. !td_acked(td))
  844. goto cont;
  845. /* Sequence ok and acked, don't need to fix toggle */
  846. ack_ok = 1;
  847. if (unlikely(td->status & TD_STATUSMASK_OVF)) {
  848. if (td_residue(td) & TD_RESIDUE_OVERFLOW) {
  849. /* Overflow */
  850. c67x00_giveback_urb(c67x00, urb, -EOVERFLOW);
  851. goto cont;
  852. }
  853. }
  854. clear_endpoint = 0;
  855. c67x00_handle_successful_td(c67x00, td);
  856. cont:
  857. if (clear_endpoint)
  858. c67x00_clear_pipe(c67x00, td);
  859. if (ack_ok)
  860. usb_settoggle(td_udev(td), usb_pipeendpoint(td->pipe),
  861. usb_pipeout(td->pipe),
  862. !(td->ctrl_reg & SEQ_SEL));
  863. /* next in list could have been removed, due to clear_pipe! */
  864. tmp = list_entry(td->td_list.next, typeof(*td), td_list);
  865. c67x00_release_td(td);
  866. }
  867. }
  868. /* -------------------------------------------------------------------------- */
  869. static inline int c67x00_all_tds_processed(struct c67x00_hcd *c67x00)
  870. {
  871. /* If all tds are processed, we can check the previous frame (if
  872. * there was any) and start our next frame.
  873. */
  874. return !c67x00_ll_husb_get_current_td(c67x00->sie);
  875. }
  876. /**
  877. * Send td to C67X00
  878. */
  879. static void c67x00_send_td(struct c67x00_hcd *c67x00, struct c67x00_td *td)
  880. {
  881. int len = td_length(td);
  882. if (len && ((td->pid_ep & TD_PIDEPMASK_PID) != TD_PID_IN))
  883. c67x00_ll_write_mem_le16(c67x00->sie->dev, td_ly_base_addr(td),
  884. td->data, len);
  885. c67x00_ll_write_mem_le16(c67x00->sie->dev,
  886. td->td_addr, td, CY_TD_SIZE);
  887. }
  888. static void c67x00_send_frame(struct c67x00_hcd *c67x00)
  889. {
  890. struct c67x00_td *td;
  891. if (list_empty(&c67x00->td_list))
  892. dev_warn(c67x00_hcd_dev(c67x00),
  893. "%s: td list should not be empty here!\n",
  894. __func__);
  895. list_for_each_entry(td, &c67x00->td_list, td_list) {
  896. if (td->td_list.next == &c67x00->td_list)
  897. td->next_td_addr = 0; /* Last td in list */
  898. c67x00_send_td(c67x00, td);
  899. }
  900. c67x00_ll_husb_set_current_td(c67x00->sie, c67x00->td_base_addr);
  901. }
  902. /* -------------------------------------------------------------------------- */
  903. /**
  904. * c67x00_do_work - Schedulers state machine
  905. */
  906. static void c67x00_do_work(struct c67x00_hcd *c67x00)
  907. {
  908. spin_lock(&c67x00->lock);
  909. /* Make sure all tds are processed */
  910. if (!c67x00_all_tds_processed(c67x00))
  911. goto out;
  912. c67x00_check_td_list(c67x00);
  913. /* no td's are being processed (current == 0)
  914. * and all have been "checked" */
  915. complete(&c67x00->endpoint_disable);
  916. if (!list_empty(&c67x00->td_list))
  917. goto out;
  918. c67x00->current_frame = c67x00_get_current_frame_number(c67x00);
  919. if (c67x00->current_frame == c67x00->last_frame)
  920. goto out; /* Don't send tds in same frame */
  921. c67x00->last_frame = c67x00->current_frame;
  922. /* If no urbs are scheduled, our work is done */
  923. if (!c67x00->urb_count) {
  924. c67x00_ll_hpi_disable_sofeop(c67x00->sie);
  925. goto out;
  926. }
  927. c67x00_fill_frame(c67x00);
  928. if (!list_empty(&c67x00->td_list))
  929. /* TD's have been added to the frame */
  930. c67x00_send_frame(c67x00);
  931. out:
  932. spin_unlock(&c67x00->lock);
  933. }
  934. /* -------------------------------------------------------------------------- */
  935. static void c67x00_sched_tasklet(unsigned long __c67x00)
  936. {
  937. struct c67x00_hcd *c67x00 = (struct c67x00_hcd *)__c67x00;
  938. c67x00_do_work(c67x00);
  939. }
  940. void c67x00_sched_kick(struct c67x00_hcd *c67x00)
  941. {
  942. tasklet_hi_schedule(&c67x00->tasklet);
  943. }
  944. int c67x00_sched_start_scheduler(struct c67x00_hcd *c67x00)
  945. {
  946. tasklet_init(&c67x00->tasklet, c67x00_sched_tasklet,
  947. (unsigned long)c67x00);
  948. return 0;
  949. }
  950. void c67x00_sched_stop_scheduler(struct c67x00_hcd *c67x00)
  951. {
  952. tasklet_kill(&c67x00->tasklet);
  953. }