vnic_cq.h 3.5 KB

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  1. /*
  2. * Copyright 2008 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. */
  18. #ifndef _VNIC_CQ_H_
  19. #define _VNIC_CQ_H_
  20. #include "cq_desc.h"
  21. #include "vnic_dev.h"
  22. /*
  23. * These defines avoid symbol clash between fnic and enic (Cisco 10G Eth
  24. * Driver) when both are built with CONFIG options =y
  25. */
  26. #define vnic_cq_service fnic_cq_service
  27. #define vnic_cq_free fnic_cq_free
  28. #define vnic_cq_alloc fnic_cq_alloc
  29. #define vnic_cq_init fnic_cq_init
  30. #define vnic_cq_clean fnic_cq_clean
  31. /* Completion queue control */
  32. struct vnic_cq_ctrl {
  33. u64 ring_base; /* 0x00 */
  34. u32 ring_size; /* 0x08 */
  35. u32 pad0;
  36. u32 flow_control_enable; /* 0x10 */
  37. u32 pad1;
  38. u32 color_enable; /* 0x18 */
  39. u32 pad2;
  40. u32 cq_head; /* 0x20 */
  41. u32 pad3;
  42. u32 cq_tail; /* 0x28 */
  43. u32 pad4;
  44. u32 cq_tail_color; /* 0x30 */
  45. u32 pad5;
  46. u32 interrupt_enable; /* 0x38 */
  47. u32 pad6;
  48. u32 cq_entry_enable; /* 0x40 */
  49. u32 pad7;
  50. u32 cq_message_enable; /* 0x48 */
  51. u32 pad8;
  52. u32 interrupt_offset; /* 0x50 */
  53. u32 pad9;
  54. u64 cq_message_addr; /* 0x58 */
  55. u32 pad10;
  56. };
  57. struct vnic_cq {
  58. unsigned int index;
  59. struct vnic_dev *vdev;
  60. struct vnic_cq_ctrl __iomem *ctrl; /* memory-mapped */
  61. struct vnic_dev_ring ring;
  62. unsigned int to_clean;
  63. unsigned int last_color;
  64. };
  65. static inline unsigned int vnic_cq_service(struct vnic_cq *cq,
  66. unsigned int work_to_do,
  67. int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  68. u8 type, u16 q_number, u16 completed_index, void *opaque),
  69. void *opaque)
  70. {
  71. struct cq_desc *cq_desc;
  72. unsigned int work_done = 0;
  73. u16 q_number, completed_index;
  74. u8 type, color;
  75. cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +
  76. cq->ring.desc_size * cq->to_clean);
  77. cq_desc_dec(cq_desc, &type, &color,
  78. &q_number, &completed_index);
  79. while (color != cq->last_color) {
  80. if ((*q_service)(cq->vdev, cq_desc, type,
  81. q_number, completed_index, opaque))
  82. break;
  83. cq->to_clean++;
  84. if (cq->to_clean == cq->ring.desc_count) {
  85. cq->to_clean = 0;
  86. cq->last_color = cq->last_color ? 0 : 1;
  87. }
  88. cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +
  89. cq->ring.desc_size * cq->to_clean);
  90. cq_desc_dec(cq_desc, &type, &color,
  91. &q_number, &completed_index);
  92. work_done++;
  93. if (work_done >= work_to_do)
  94. break;
  95. }
  96. return work_done;
  97. }
  98. void vnic_cq_free(struct vnic_cq *cq);
  99. int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
  100. unsigned int desc_count, unsigned int desc_size);
  101. void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
  102. unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
  103. unsigned int cq_tail_color, unsigned int interrupt_enable,
  104. unsigned int cq_entry_enable, unsigned int message_enable,
  105. unsigned int interrupt_offset, u64 message_addr);
  106. void vnic_cq_clean(struct vnic_cq *cq);
  107. #endif /* _VNIC_CQ_H_ */