esp_scsi.c 67 KB

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  1. /* esp_scsi.c: ESP SCSI driver.
  2. *
  3. * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/types.h>
  7. #include <linux/slab.h>
  8. #include <linux/delay.h>
  9. #include <linux/list.h>
  10. #include <linux/completion.h>
  11. #include <linux/kallsyms.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/irqreturn.h>
  16. #include <asm/irq.h>
  17. #include <asm/io.h>
  18. #include <asm/dma.h>
  19. #include <scsi/scsi.h>
  20. #include <scsi/scsi_host.h>
  21. #include <scsi/scsi_cmnd.h>
  22. #include <scsi/scsi_device.h>
  23. #include <scsi/scsi_tcq.h>
  24. #include <scsi/scsi_dbg.h>
  25. #include <scsi/scsi_transport_spi.h>
  26. #include "esp_scsi.h"
  27. #define DRV_MODULE_NAME "esp"
  28. #define PFX DRV_MODULE_NAME ": "
  29. #define DRV_VERSION "2.000"
  30. #define DRV_MODULE_RELDATE "April 19, 2007"
  31. /* SCSI bus reset settle time in seconds. */
  32. static int esp_bus_reset_settle = 3;
  33. static u32 esp_debug;
  34. #define ESP_DEBUG_INTR 0x00000001
  35. #define ESP_DEBUG_SCSICMD 0x00000002
  36. #define ESP_DEBUG_RESET 0x00000004
  37. #define ESP_DEBUG_MSGIN 0x00000008
  38. #define ESP_DEBUG_MSGOUT 0x00000010
  39. #define ESP_DEBUG_CMDDONE 0x00000020
  40. #define ESP_DEBUG_DISCONNECT 0x00000040
  41. #define ESP_DEBUG_DATASTART 0x00000080
  42. #define ESP_DEBUG_DATADONE 0x00000100
  43. #define ESP_DEBUG_RECONNECT 0x00000200
  44. #define ESP_DEBUG_AUTOSENSE 0x00000400
  45. #define ESP_DEBUG_EVENT 0x00000800
  46. #define ESP_DEBUG_COMMAND 0x00001000
  47. #define esp_log_intr(f, a...) \
  48. do { if (esp_debug & ESP_DEBUG_INTR) \
  49. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  50. } while (0)
  51. #define esp_log_reset(f, a...) \
  52. do { if (esp_debug & ESP_DEBUG_RESET) \
  53. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  54. } while (0)
  55. #define esp_log_msgin(f, a...) \
  56. do { if (esp_debug & ESP_DEBUG_MSGIN) \
  57. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  58. } while (0)
  59. #define esp_log_msgout(f, a...) \
  60. do { if (esp_debug & ESP_DEBUG_MSGOUT) \
  61. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  62. } while (0)
  63. #define esp_log_cmddone(f, a...) \
  64. do { if (esp_debug & ESP_DEBUG_CMDDONE) \
  65. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  66. } while (0)
  67. #define esp_log_disconnect(f, a...) \
  68. do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
  69. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  70. } while (0)
  71. #define esp_log_datastart(f, a...) \
  72. do { if (esp_debug & ESP_DEBUG_DATASTART) \
  73. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  74. } while (0)
  75. #define esp_log_datadone(f, a...) \
  76. do { if (esp_debug & ESP_DEBUG_DATADONE) \
  77. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  78. } while (0)
  79. #define esp_log_reconnect(f, a...) \
  80. do { if (esp_debug & ESP_DEBUG_RECONNECT) \
  81. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  82. } while (0)
  83. #define esp_log_autosense(f, a...) \
  84. do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
  85. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  86. } while (0)
  87. #define esp_log_event(f, a...) \
  88. do { if (esp_debug & ESP_DEBUG_EVENT) \
  89. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  90. } while (0)
  91. #define esp_log_command(f, a...) \
  92. do { if (esp_debug & ESP_DEBUG_COMMAND) \
  93. shost_printk(KERN_DEBUG, esp->host, f, ## a); \
  94. } while (0)
  95. #define esp_read8(REG) esp->ops->esp_read8(esp, REG)
  96. #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
  97. static void esp_log_fill_regs(struct esp *esp,
  98. struct esp_event_ent *p)
  99. {
  100. p->sreg = esp->sreg;
  101. p->seqreg = esp->seqreg;
  102. p->sreg2 = esp->sreg2;
  103. p->ireg = esp->ireg;
  104. p->select_state = esp->select_state;
  105. p->event = esp->event;
  106. }
  107. void scsi_esp_cmd(struct esp *esp, u8 val)
  108. {
  109. struct esp_event_ent *p;
  110. int idx = esp->esp_event_cur;
  111. p = &esp->esp_event_log[idx];
  112. p->type = ESP_EVENT_TYPE_CMD;
  113. p->val = val;
  114. esp_log_fill_regs(esp, p);
  115. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  116. esp_log_command("cmd[%02x]\n", val);
  117. esp_write8(val, ESP_CMD);
  118. }
  119. EXPORT_SYMBOL(scsi_esp_cmd);
  120. static void esp_send_dma_cmd(struct esp *esp, int len, int max_len, int cmd)
  121. {
  122. if (esp->flags & ESP_FLAG_USE_FIFO) {
  123. int i;
  124. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  125. for (i = 0; i < len; i++)
  126. esp_write8(esp->command_block[i], ESP_FDATA);
  127. scsi_esp_cmd(esp, cmd);
  128. } else {
  129. if (esp->rev == FASHME)
  130. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  131. cmd |= ESP_CMD_DMA;
  132. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  133. len, max_len, 0, cmd);
  134. }
  135. }
  136. static void esp_event(struct esp *esp, u8 val)
  137. {
  138. struct esp_event_ent *p;
  139. int idx = esp->esp_event_cur;
  140. p = &esp->esp_event_log[idx];
  141. p->type = ESP_EVENT_TYPE_EVENT;
  142. p->val = val;
  143. esp_log_fill_regs(esp, p);
  144. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  145. esp->event = val;
  146. }
  147. static void esp_dump_cmd_log(struct esp *esp)
  148. {
  149. int idx = esp->esp_event_cur;
  150. int stop = idx;
  151. shost_printk(KERN_INFO, esp->host, "Dumping command log\n");
  152. do {
  153. struct esp_event_ent *p = &esp->esp_event_log[idx];
  154. shost_printk(KERN_INFO, esp->host,
  155. "ent[%d] %s val[%02x] sreg[%02x] seqreg[%02x] "
  156. "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
  157. idx,
  158. p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT",
  159. p->val, p->sreg, p->seqreg,
  160. p->sreg2, p->ireg, p->select_state, p->event);
  161. idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  162. } while (idx != stop);
  163. }
  164. static void esp_flush_fifo(struct esp *esp)
  165. {
  166. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  167. if (esp->rev == ESP236) {
  168. int lim = 1000;
  169. while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
  170. if (--lim == 0) {
  171. shost_printk(KERN_ALERT, esp->host,
  172. "ESP_FF_BYTES will not clear!\n");
  173. break;
  174. }
  175. udelay(1);
  176. }
  177. }
  178. }
  179. static void hme_read_fifo(struct esp *esp)
  180. {
  181. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  182. int idx = 0;
  183. while (fcnt--) {
  184. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  185. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  186. }
  187. if (esp->sreg2 & ESP_STAT2_F1BYTE) {
  188. esp_write8(0, ESP_FDATA);
  189. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  190. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  191. }
  192. esp->fifo_cnt = idx;
  193. }
  194. static void esp_set_all_config3(struct esp *esp, u8 val)
  195. {
  196. int i;
  197. for (i = 0; i < ESP_MAX_TARGET; i++)
  198. esp->target[i].esp_config3 = val;
  199. }
  200. /* Reset the ESP chip, _not_ the SCSI bus. */
  201. static void esp_reset_esp(struct esp *esp)
  202. {
  203. u8 family_code, version;
  204. /* Now reset the ESP chip */
  205. scsi_esp_cmd(esp, ESP_CMD_RC);
  206. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  207. if (esp->rev == FAST)
  208. esp_write8(ESP_CONFIG2_FENAB, ESP_CFG2);
  209. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  210. /* This is the only point at which it is reliable to read
  211. * the ID-code for a fast ESP chip variants.
  212. */
  213. esp->max_period = ((35 * esp->ccycle) / 1000);
  214. if (esp->rev == FAST) {
  215. version = esp_read8(ESP_UID);
  216. family_code = (version & 0xf8) >> 3;
  217. if (family_code == 0x02)
  218. esp->rev = FAS236;
  219. else if (family_code == 0x0a)
  220. esp->rev = FASHME; /* Version is usually '5'. */
  221. else
  222. esp->rev = FAS100A;
  223. esp->min_period = ((4 * esp->ccycle) / 1000);
  224. } else {
  225. esp->min_period = ((5 * esp->ccycle) / 1000);
  226. }
  227. if (esp->rev == FAS236) {
  228. /*
  229. * The AM53c974 chip returns the same ID as FAS236;
  230. * try to configure glitch eater.
  231. */
  232. u8 config4 = ESP_CONFIG4_GE1;
  233. esp_write8(config4, ESP_CFG4);
  234. config4 = esp_read8(ESP_CFG4);
  235. if (config4 & ESP_CONFIG4_GE1) {
  236. esp->rev = PCSCSI;
  237. esp_write8(esp->config4, ESP_CFG4);
  238. }
  239. }
  240. esp->max_period = (esp->max_period + 3)>>2;
  241. esp->min_period = (esp->min_period + 3)>>2;
  242. esp_write8(esp->config1, ESP_CFG1);
  243. switch (esp->rev) {
  244. case ESP100:
  245. /* nothing to do */
  246. break;
  247. case ESP100A:
  248. esp_write8(esp->config2, ESP_CFG2);
  249. break;
  250. case ESP236:
  251. /* Slow 236 */
  252. esp_write8(esp->config2, ESP_CFG2);
  253. esp->prev_cfg3 = esp->target[0].esp_config3;
  254. esp_write8(esp->prev_cfg3, ESP_CFG3);
  255. break;
  256. case FASHME:
  257. esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
  258. /* fallthrough... */
  259. case FAS236:
  260. case PCSCSI:
  261. /* Fast 236, AM53c974 or HME */
  262. esp_write8(esp->config2, ESP_CFG2);
  263. if (esp->rev == FASHME) {
  264. u8 cfg3 = esp->target[0].esp_config3;
  265. cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
  266. if (esp->scsi_id >= 8)
  267. cfg3 |= ESP_CONFIG3_IDBIT3;
  268. esp_set_all_config3(esp, cfg3);
  269. } else {
  270. u32 cfg3 = esp->target[0].esp_config3;
  271. cfg3 |= ESP_CONFIG3_FCLK;
  272. esp_set_all_config3(esp, cfg3);
  273. }
  274. esp->prev_cfg3 = esp->target[0].esp_config3;
  275. esp_write8(esp->prev_cfg3, ESP_CFG3);
  276. if (esp->rev == FASHME) {
  277. esp->radelay = 80;
  278. } else {
  279. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  280. esp->radelay = 0;
  281. else
  282. esp->radelay = 96;
  283. }
  284. break;
  285. case FAS100A:
  286. /* Fast 100a */
  287. esp_write8(esp->config2, ESP_CFG2);
  288. esp_set_all_config3(esp,
  289. (esp->target[0].esp_config3 |
  290. ESP_CONFIG3_FCLOCK));
  291. esp->prev_cfg3 = esp->target[0].esp_config3;
  292. esp_write8(esp->prev_cfg3, ESP_CFG3);
  293. esp->radelay = 32;
  294. break;
  295. default:
  296. break;
  297. }
  298. /* Reload the configuration registers */
  299. esp_write8(esp->cfact, ESP_CFACT);
  300. esp->prev_stp = 0;
  301. esp_write8(esp->prev_stp, ESP_STP);
  302. esp->prev_soff = 0;
  303. esp_write8(esp->prev_soff, ESP_SOFF);
  304. esp_write8(esp->neg_defp, ESP_TIMEO);
  305. /* Eat any bitrot in the chip */
  306. esp_read8(ESP_INTRPT);
  307. udelay(100);
  308. }
  309. static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
  310. {
  311. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  312. struct scatterlist *sg = scsi_sglist(cmd);
  313. int dir = cmd->sc_data_direction;
  314. int total, i;
  315. if (dir == DMA_NONE)
  316. return;
  317. spriv->u.num_sg = esp->ops->map_sg(esp, sg, scsi_sg_count(cmd), dir);
  318. spriv->cur_residue = sg_dma_len(sg);
  319. spriv->cur_sg = sg;
  320. total = 0;
  321. for (i = 0; i < spriv->u.num_sg; i++)
  322. total += sg_dma_len(&sg[i]);
  323. spriv->tot_residue = total;
  324. }
  325. static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
  326. struct scsi_cmnd *cmd)
  327. {
  328. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  329. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  330. return ent->sense_dma +
  331. (ent->sense_ptr - cmd->sense_buffer);
  332. }
  333. return sg_dma_address(p->cur_sg) +
  334. (sg_dma_len(p->cur_sg) -
  335. p->cur_residue);
  336. }
  337. static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
  338. struct scsi_cmnd *cmd)
  339. {
  340. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  341. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  342. return SCSI_SENSE_BUFFERSIZE -
  343. (ent->sense_ptr - cmd->sense_buffer);
  344. }
  345. return p->cur_residue;
  346. }
  347. static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
  348. struct scsi_cmnd *cmd, unsigned int len)
  349. {
  350. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  351. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  352. ent->sense_ptr += len;
  353. return;
  354. }
  355. p->cur_residue -= len;
  356. p->tot_residue -= len;
  357. if (p->cur_residue < 0 || p->tot_residue < 0) {
  358. shost_printk(KERN_ERR, esp->host,
  359. "Data transfer overflow.\n");
  360. shost_printk(KERN_ERR, esp->host,
  361. "cur_residue[%d] tot_residue[%d] len[%u]\n",
  362. p->cur_residue, p->tot_residue, len);
  363. p->cur_residue = 0;
  364. p->tot_residue = 0;
  365. }
  366. if (!p->cur_residue && p->tot_residue) {
  367. p->cur_sg++;
  368. p->cur_residue = sg_dma_len(p->cur_sg);
  369. }
  370. }
  371. static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
  372. {
  373. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  374. int dir = cmd->sc_data_direction;
  375. if (dir == DMA_NONE)
  376. return;
  377. esp->ops->unmap_sg(esp, scsi_sglist(cmd), spriv->u.num_sg, dir);
  378. }
  379. static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  380. {
  381. struct scsi_cmnd *cmd = ent->cmd;
  382. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  383. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  384. ent->saved_sense_ptr = ent->sense_ptr;
  385. return;
  386. }
  387. ent->saved_cur_residue = spriv->cur_residue;
  388. ent->saved_cur_sg = spriv->cur_sg;
  389. ent->saved_tot_residue = spriv->tot_residue;
  390. }
  391. static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  392. {
  393. struct scsi_cmnd *cmd = ent->cmd;
  394. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  395. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  396. ent->sense_ptr = ent->saved_sense_ptr;
  397. return;
  398. }
  399. spriv->cur_residue = ent->saved_cur_residue;
  400. spriv->cur_sg = ent->saved_cur_sg;
  401. spriv->tot_residue = ent->saved_tot_residue;
  402. }
  403. static void esp_check_command_len(struct esp *esp, struct scsi_cmnd *cmd)
  404. {
  405. if (cmd->cmd_len == 6 ||
  406. cmd->cmd_len == 10 ||
  407. cmd->cmd_len == 12) {
  408. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  409. } else {
  410. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  411. }
  412. }
  413. static void esp_write_tgt_config3(struct esp *esp, int tgt)
  414. {
  415. if (esp->rev > ESP100A) {
  416. u8 val = esp->target[tgt].esp_config3;
  417. if (val != esp->prev_cfg3) {
  418. esp->prev_cfg3 = val;
  419. esp_write8(val, ESP_CFG3);
  420. }
  421. }
  422. }
  423. static void esp_write_tgt_sync(struct esp *esp, int tgt)
  424. {
  425. u8 off = esp->target[tgt].esp_offset;
  426. u8 per = esp->target[tgt].esp_period;
  427. if (off != esp->prev_soff) {
  428. esp->prev_soff = off;
  429. esp_write8(off, ESP_SOFF);
  430. }
  431. if (per != esp->prev_stp) {
  432. esp->prev_stp = per;
  433. esp_write8(per, ESP_STP);
  434. }
  435. }
  436. static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
  437. {
  438. if (esp->rev == FASHME) {
  439. /* Arbitrary segment boundaries, 24-bit counts. */
  440. if (dma_len > (1U << 24))
  441. dma_len = (1U << 24);
  442. } else {
  443. u32 base, end;
  444. /* ESP chip limits other variants by 16-bits of transfer
  445. * count. Actually on FAS100A and FAS236 we could get
  446. * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
  447. * in the ESP_CFG2 register but that causes other unwanted
  448. * changes so we don't use it currently.
  449. */
  450. if (dma_len > (1U << 16))
  451. dma_len = (1U << 16);
  452. /* All of the DMA variants hooked up to these chips
  453. * cannot handle crossing a 24-bit address boundary.
  454. */
  455. base = dma_addr & ((1U << 24) - 1U);
  456. end = base + dma_len;
  457. if (end > (1U << 24))
  458. end = (1U <<24);
  459. dma_len = end - base;
  460. }
  461. return dma_len;
  462. }
  463. static int esp_need_to_nego_wide(struct esp_target_data *tp)
  464. {
  465. struct scsi_target *target = tp->starget;
  466. return spi_width(target) != tp->nego_goal_width;
  467. }
  468. static int esp_need_to_nego_sync(struct esp_target_data *tp)
  469. {
  470. struct scsi_target *target = tp->starget;
  471. /* When offset is zero, period is "don't care". */
  472. if (!spi_offset(target) && !tp->nego_goal_offset)
  473. return 0;
  474. if (spi_offset(target) == tp->nego_goal_offset &&
  475. spi_period(target) == tp->nego_goal_period)
  476. return 0;
  477. return 1;
  478. }
  479. static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
  480. struct esp_lun_data *lp)
  481. {
  482. if (!ent->orig_tag[0]) {
  483. /* Non-tagged, slot already taken? */
  484. if (lp->non_tagged_cmd)
  485. return -EBUSY;
  486. if (lp->hold) {
  487. /* We are being held by active tagged
  488. * commands.
  489. */
  490. if (lp->num_tagged)
  491. return -EBUSY;
  492. /* Tagged commands completed, we can unplug
  493. * the queue and run this untagged command.
  494. */
  495. lp->hold = 0;
  496. } else if (lp->num_tagged) {
  497. /* Plug the queue until num_tagged decreases
  498. * to zero in esp_free_lun_tag.
  499. */
  500. lp->hold = 1;
  501. return -EBUSY;
  502. }
  503. lp->non_tagged_cmd = ent;
  504. return 0;
  505. } else {
  506. /* Tagged command, see if blocked by a
  507. * non-tagged one.
  508. */
  509. if (lp->non_tagged_cmd || lp->hold)
  510. return -EBUSY;
  511. }
  512. BUG_ON(lp->tagged_cmds[ent->orig_tag[1]]);
  513. lp->tagged_cmds[ent->orig_tag[1]] = ent;
  514. lp->num_tagged++;
  515. return 0;
  516. }
  517. static void esp_free_lun_tag(struct esp_cmd_entry *ent,
  518. struct esp_lun_data *lp)
  519. {
  520. if (ent->orig_tag[0]) {
  521. BUG_ON(lp->tagged_cmds[ent->orig_tag[1]] != ent);
  522. lp->tagged_cmds[ent->orig_tag[1]] = NULL;
  523. lp->num_tagged--;
  524. } else {
  525. BUG_ON(lp->non_tagged_cmd != ent);
  526. lp->non_tagged_cmd = NULL;
  527. }
  528. }
  529. /* When a contingent allegiance conditon is created, we force feed a
  530. * REQUEST_SENSE command to the device to fetch the sense data. I
  531. * tried many other schemes, relying on the scsi error handling layer
  532. * to send out the REQUEST_SENSE automatically, but this was difficult
  533. * to get right especially in the presence of applications like smartd
  534. * which use SG_IO to send out their own REQUEST_SENSE commands.
  535. */
  536. static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
  537. {
  538. struct scsi_cmnd *cmd = ent->cmd;
  539. struct scsi_device *dev = cmd->device;
  540. int tgt, lun;
  541. u8 *p, val;
  542. tgt = dev->id;
  543. lun = dev->lun;
  544. if (!ent->sense_ptr) {
  545. esp_log_autosense("Doing auto-sense for tgt[%d] lun[%d]\n",
  546. tgt, lun);
  547. ent->sense_ptr = cmd->sense_buffer;
  548. ent->sense_dma = esp->ops->map_single(esp,
  549. ent->sense_ptr,
  550. SCSI_SENSE_BUFFERSIZE,
  551. DMA_FROM_DEVICE);
  552. }
  553. ent->saved_sense_ptr = ent->sense_ptr;
  554. esp->active_cmd = ent;
  555. p = esp->command_block;
  556. esp->msg_out_len = 0;
  557. *p++ = IDENTIFY(0, lun);
  558. *p++ = REQUEST_SENSE;
  559. *p++ = ((dev->scsi_level <= SCSI_2) ?
  560. (lun << 5) : 0);
  561. *p++ = 0;
  562. *p++ = 0;
  563. *p++ = SCSI_SENSE_BUFFERSIZE;
  564. *p++ = 0;
  565. esp->select_state = ESP_SELECT_BASIC;
  566. val = tgt;
  567. if (esp->rev == FASHME)
  568. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  569. esp_write8(val, ESP_BUSID);
  570. esp_write_tgt_sync(esp, tgt);
  571. esp_write_tgt_config3(esp, tgt);
  572. val = (p - esp->command_block);
  573. esp_send_dma_cmd(esp, val, 16, ESP_CMD_SELA);
  574. }
  575. static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
  576. {
  577. struct esp_cmd_entry *ent;
  578. list_for_each_entry(ent, &esp->queued_cmds, list) {
  579. struct scsi_cmnd *cmd = ent->cmd;
  580. struct scsi_device *dev = cmd->device;
  581. struct esp_lun_data *lp = dev->hostdata;
  582. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  583. ent->tag[0] = 0;
  584. ent->tag[1] = 0;
  585. return ent;
  586. }
  587. if (!spi_populate_tag_msg(&ent->tag[0], cmd)) {
  588. ent->tag[0] = 0;
  589. ent->tag[1] = 0;
  590. }
  591. ent->orig_tag[0] = ent->tag[0];
  592. ent->orig_tag[1] = ent->tag[1];
  593. if (esp_alloc_lun_tag(ent, lp) < 0)
  594. continue;
  595. return ent;
  596. }
  597. return NULL;
  598. }
  599. static void esp_maybe_execute_command(struct esp *esp)
  600. {
  601. struct esp_target_data *tp;
  602. struct esp_lun_data *lp;
  603. struct scsi_device *dev;
  604. struct scsi_cmnd *cmd;
  605. struct esp_cmd_entry *ent;
  606. int tgt, lun, i;
  607. u32 val, start_cmd;
  608. u8 *p;
  609. if (esp->active_cmd ||
  610. (esp->flags & ESP_FLAG_RESETTING))
  611. return;
  612. ent = find_and_prep_issuable_command(esp);
  613. if (!ent)
  614. return;
  615. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  616. esp_autosense(esp, ent);
  617. return;
  618. }
  619. cmd = ent->cmd;
  620. dev = cmd->device;
  621. tgt = dev->id;
  622. lun = dev->lun;
  623. tp = &esp->target[tgt];
  624. lp = dev->hostdata;
  625. list_move(&ent->list, &esp->active_cmds);
  626. esp->active_cmd = ent;
  627. esp_map_dma(esp, cmd);
  628. esp_save_pointers(esp, ent);
  629. esp_check_command_len(esp, cmd);
  630. p = esp->command_block;
  631. esp->msg_out_len = 0;
  632. if (tp->flags & ESP_TGT_CHECK_NEGO) {
  633. /* Need to negotiate. If the target is broken
  634. * go for synchronous transfers and non-wide.
  635. */
  636. if (tp->flags & ESP_TGT_BROKEN) {
  637. tp->flags &= ~ESP_TGT_DISCONNECT;
  638. tp->nego_goal_period = 0;
  639. tp->nego_goal_offset = 0;
  640. tp->nego_goal_width = 0;
  641. tp->nego_goal_tags = 0;
  642. }
  643. /* If the settings are not changing, skip this. */
  644. if (spi_width(tp->starget) == tp->nego_goal_width &&
  645. spi_period(tp->starget) == tp->nego_goal_period &&
  646. spi_offset(tp->starget) == tp->nego_goal_offset) {
  647. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  648. goto build_identify;
  649. }
  650. if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
  651. esp->msg_out_len =
  652. spi_populate_width_msg(&esp->msg_out[0],
  653. (tp->nego_goal_width ?
  654. 1 : 0));
  655. tp->flags |= ESP_TGT_NEGO_WIDE;
  656. } else if (esp_need_to_nego_sync(tp)) {
  657. esp->msg_out_len =
  658. spi_populate_sync_msg(&esp->msg_out[0],
  659. tp->nego_goal_period,
  660. tp->nego_goal_offset);
  661. tp->flags |= ESP_TGT_NEGO_SYNC;
  662. } else {
  663. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  664. }
  665. /* Process it like a slow command. */
  666. if (tp->flags & (ESP_TGT_NEGO_WIDE | ESP_TGT_NEGO_SYNC))
  667. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  668. }
  669. build_identify:
  670. /* If we don't have a lun-data struct yet, we're probing
  671. * so do not disconnect. Also, do not disconnect unless
  672. * we have a tag on this command.
  673. */
  674. if (lp && (tp->flags & ESP_TGT_DISCONNECT) && ent->tag[0])
  675. *p++ = IDENTIFY(1, lun);
  676. else
  677. *p++ = IDENTIFY(0, lun);
  678. if (ent->tag[0] && esp->rev == ESP100) {
  679. /* ESP100 lacks select w/atn3 command, use select
  680. * and stop instead.
  681. */
  682. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  683. }
  684. if (!(esp->flags & ESP_FLAG_DOING_SLOWCMD)) {
  685. start_cmd = ESP_CMD_SELA;
  686. if (ent->tag[0]) {
  687. *p++ = ent->tag[0];
  688. *p++ = ent->tag[1];
  689. start_cmd = ESP_CMD_SA3;
  690. }
  691. for (i = 0; i < cmd->cmd_len; i++)
  692. *p++ = cmd->cmnd[i];
  693. esp->select_state = ESP_SELECT_BASIC;
  694. } else {
  695. esp->cmd_bytes_left = cmd->cmd_len;
  696. esp->cmd_bytes_ptr = &cmd->cmnd[0];
  697. if (ent->tag[0]) {
  698. for (i = esp->msg_out_len - 1;
  699. i >= 0; i--)
  700. esp->msg_out[i + 2] = esp->msg_out[i];
  701. esp->msg_out[0] = ent->tag[0];
  702. esp->msg_out[1] = ent->tag[1];
  703. esp->msg_out_len += 2;
  704. }
  705. start_cmd = ESP_CMD_SELAS;
  706. esp->select_state = ESP_SELECT_MSGOUT;
  707. }
  708. val = tgt;
  709. if (esp->rev == FASHME)
  710. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  711. esp_write8(val, ESP_BUSID);
  712. esp_write_tgt_sync(esp, tgt);
  713. esp_write_tgt_config3(esp, tgt);
  714. val = (p - esp->command_block);
  715. if (esp_debug & ESP_DEBUG_SCSICMD) {
  716. printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
  717. for (i = 0; i < cmd->cmd_len; i++)
  718. printk("%02x ", cmd->cmnd[i]);
  719. printk("]\n");
  720. }
  721. esp_send_dma_cmd(esp, val, 16, start_cmd);
  722. }
  723. static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
  724. {
  725. struct list_head *head = &esp->esp_cmd_pool;
  726. struct esp_cmd_entry *ret;
  727. if (list_empty(head)) {
  728. ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
  729. } else {
  730. ret = list_entry(head->next, struct esp_cmd_entry, list);
  731. list_del(&ret->list);
  732. memset(ret, 0, sizeof(*ret));
  733. }
  734. return ret;
  735. }
  736. static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
  737. {
  738. list_add(&ent->list, &esp->esp_cmd_pool);
  739. }
  740. static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
  741. struct scsi_cmnd *cmd, unsigned int result)
  742. {
  743. struct scsi_device *dev = cmd->device;
  744. int tgt = dev->id;
  745. int lun = dev->lun;
  746. esp->active_cmd = NULL;
  747. esp_unmap_dma(esp, cmd);
  748. esp_free_lun_tag(ent, dev->hostdata);
  749. cmd->result = result;
  750. if (ent->eh_done) {
  751. complete(ent->eh_done);
  752. ent->eh_done = NULL;
  753. }
  754. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  755. esp->ops->unmap_single(esp, ent->sense_dma,
  756. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  757. ent->sense_ptr = NULL;
  758. /* Restore the message/status bytes to what we actually
  759. * saw originally. Also, report that we are providing
  760. * the sense data.
  761. */
  762. cmd->result = ((DRIVER_SENSE << 24) |
  763. (DID_OK << 16) |
  764. (COMMAND_COMPLETE << 8) |
  765. (SAM_STAT_CHECK_CONDITION << 0));
  766. ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
  767. if (esp_debug & ESP_DEBUG_AUTOSENSE) {
  768. int i;
  769. printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
  770. esp->host->unique_id, tgt, lun);
  771. for (i = 0; i < 18; i++)
  772. printk("%02x ", cmd->sense_buffer[i]);
  773. printk("]\n");
  774. }
  775. }
  776. cmd->scsi_done(cmd);
  777. list_del(&ent->list);
  778. esp_put_ent(esp, ent);
  779. esp_maybe_execute_command(esp);
  780. }
  781. static unsigned int compose_result(unsigned int status, unsigned int message,
  782. unsigned int driver_code)
  783. {
  784. return (status | (message << 8) | (driver_code << 16));
  785. }
  786. static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
  787. {
  788. struct scsi_device *dev = ent->cmd->device;
  789. struct esp_lun_data *lp = dev->hostdata;
  790. scsi_track_queue_full(dev, lp->num_tagged - 1);
  791. }
  792. static int esp_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  793. {
  794. struct scsi_device *dev = cmd->device;
  795. struct esp *esp = shost_priv(dev->host);
  796. struct esp_cmd_priv *spriv;
  797. struct esp_cmd_entry *ent;
  798. ent = esp_get_ent(esp);
  799. if (!ent)
  800. return SCSI_MLQUEUE_HOST_BUSY;
  801. ent->cmd = cmd;
  802. cmd->scsi_done = done;
  803. spriv = ESP_CMD_PRIV(cmd);
  804. spriv->u.dma_addr = ~(dma_addr_t)0x0;
  805. list_add_tail(&ent->list, &esp->queued_cmds);
  806. esp_maybe_execute_command(esp);
  807. return 0;
  808. }
  809. static DEF_SCSI_QCMD(esp_queuecommand)
  810. static int esp_check_gross_error(struct esp *esp)
  811. {
  812. if (esp->sreg & ESP_STAT_SPAM) {
  813. /* Gross Error, could be one of:
  814. * - top of fifo overwritten
  815. * - top of command register overwritten
  816. * - DMA programmed with wrong direction
  817. * - improper phase change
  818. */
  819. shost_printk(KERN_ERR, esp->host,
  820. "Gross error sreg[%02x]\n", esp->sreg);
  821. /* XXX Reset the chip. XXX */
  822. return 1;
  823. }
  824. return 0;
  825. }
  826. static int esp_check_spur_intr(struct esp *esp)
  827. {
  828. switch (esp->rev) {
  829. case ESP100:
  830. case ESP100A:
  831. /* The interrupt pending bit of the status register cannot
  832. * be trusted on these revisions.
  833. */
  834. esp->sreg &= ~ESP_STAT_INTR;
  835. break;
  836. default:
  837. if (!(esp->sreg & ESP_STAT_INTR)) {
  838. if (esp->ireg & ESP_INTR_SR)
  839. return 1;
  840. /* If the DMA is indicating interrupt pending and the
  841. * ESP is not, the only possibility is a DMA error.
  842. */
  843. if (!esp->ops->dma_error(esp)) {
  844. shost_printk(KERN_ERR, esp->host,
  845. "Spurious irq, sreg=%02x.\n",
  846. esp->sreg);
  847. return -1;
  848. }
  849. shost_printk(KERN_ERR, esp->host, "DMA error\n");
  850. /* XXX Reset the chip. XXX */
  851. return -1;
  852. }
  853. break;
  854. }
  855. return 0;
  856. }
  857. static void esp_schedule_reset(struct esp *esp)
  858. {
  859. esp_log_reset("esp_schedule_reset() from %pf\n",
  860. __builtin_return_address(0));
  861. esp->flags |= ESP_FLAG_RESETTING;
  862. esp_event(esp, ESP_EVENT_RESET);
  863. }
  864. /* In order to avoid having to add a special half-reconnected state
  865. * into the driver we just sit here and poll through the rest of
  866. * the reselection process to get the tag message bytes.
  867. */
  868. static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
  869. struct esp_lun_data *lp)
  870. {
  871. struct esp_cmd_entry *ent;
  872. int i;
  873. if (!lp->num_tagged) {
  874. shost_printk(KERN_ERR, esp->host,
  875. "Reconnect w/num_tagged==0\n");
  876. return NULL;
  877. }
  878. esp_log_reconnect("reconnect tag, ");
  879. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  880. if (esp->ops->irq_pending(esp))
  881. break;
  882. }
  883. if (i == ESP_QUICKIRQ_LIMIT) {
  884. shost_printk(KERN_ERR, esp->host,
  885. "Reconnect IRQ1 timeout\n");
  886. return NULL;
  887. }
  888. esp->sreg = esp_read8(ESP_STATUS);
  889. esp->ireg = esp_read8(ESP_INTRPT);
  890. esp_log_reconnect("IRQ(%d:%x:%x), ",
  891. i, esp->ireg, esp->sreg);
  892. if (esp->ireg & ESP_INTR_DC) {
  893. shost_printk(KERN_ERR, esp->host,
  894. "Reconnect, got disconnect.\n");
  895. return NULL;
  896. }
  897. if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
  898. shost_printk(KERN_ERR, esp->host,
  899. "Reconnect, not MIP sreg[%02x].\n", esp->sreg);
  900. return NULL;
  901. }
  902. /* DMA in the tag bytes... */
  903. esp->command_block[0] = 0xff;
  904. esp->command_block[1] = 0xff;
  905. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  906. 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
  907. /* ACK the message. */
  908. scsi_esp_cmd(esp, ESP_CMD_MOK);
  909. for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
  910. if (esp->ops->irq_pending(esp)) {
  911. esp->sreg = esp_read8(ESP_STATUS);
  912. esp->ireg = esp_read8(ESP_INTRPT);
  913. if (esp->ireg & ESP_INTR_FDONE)
  914. break;
  915. }
  916. udelay(1);
  917. }
  918. if (i == ESP_RESELECT_TAG_LIMIT) {
  919. shost_printk(KERN_ERR, esp->host, "Reconnect IRQ2 timeout\n");
  920. return NULL;
  921. }
  922. esp->ops->dma_drain(esp);
  923. esp->ops->dma_invalidate(esp);
  924. esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
  925. i, esp->ireg, esp->sreg,
  926. esp->command_block[0],
  927. esp->command_block[1]);
  928. if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
  929. esp->command_block[0] > ORDERED_QUEUE_TAG) {
  930. shost_printk(KERN_ERR, esp->host,
  931. "Reconnect, bad tag type %02x.\n",
  932. esp->command_block[0]);
  933. return NULL;
  934. }
  935. ent = lp->tagged_cmds[esp->command_block[1]];
  936. if (!ent) {
  937. shost_printk(KERN_ERR, esp->host,
  938. "Reconnect, no entry for tag %02x.\n",
  939. esp->command_block[1]);
  940. return NULL;
  941. }
  942. return ent;
  943. }
  944. static int esp_reconnect(struct esp *esp)
  945. {
  946. struct esp_cmd_entry *ent;
  947. struct esp_target_data *tp;
  948. struct esp_lun_data *lp;
  949. struct scsi_device *dev;
  950. int target, lun;
  951. BUG_ON(esp->active_cmd);
  952. if (esp->rev == FASHME) {
  953. /* FASHME puts the target and lun numbers directly
  954. * into the fifo.
  955. */
  956. target = esp->fifo[0];
  957. lun = esp->fifo[1] & 0x7;
  958. } else {
  959. u8 bits = esp_read8(ESP_FDATA);
  960. /* Older chips put the lun directly into the fifo, but
  961. * the target is given as a sample of the arbitration
  962. * lines on the bus at reselection time. So we should
  963. * see the ID of the ESP and the one reconnecting target
  964. * set in the bitmap.
  965. */
  966. if (!(bits & esp->scsi_id_mask))
  967. goto do_reset;
  968. bits &= ~esp->scsi_id_mask;
  969. if (!bits || (bits & (bits - 1)))
  970. goto do_reset;
  971. target = ffs(bits) - 1;
  972. lun = (esp_read8(ESP_FDATA) & 0x7);
  973. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  974. if (esp->rev == ESP100) {
  975. u8 ireg = esp_read8(ESP_INTRPT);
  976. /* This chip has a bug during reselection that can
  977. * cause a spurious illegal-command interrupt, which
  978. * we simply ACK here. Another possibility is a bus
  979. * reset so we must check for that.
  980. */
  981. if (ireg & ESP_INTR_SR)
  982. goto do_reset;
  983. }
  984. scsi_esp_cmd(esp, ESP_CMD_NULL);
  985. }
  986. esp_write_tgt_sync(esp, target);
  987. esp_write_tgt_config3(esp, target);
  988. scsi_esp_cmd(esp, ESP_CMD_MOK);
  989. if (esp->rev == FASHME)
  990. esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
  991. ESP_BUSID);
  992. tp = &esp->target[target];
  993. dev = __scsi_device_lookup_by_target(tp->starget, lun);
  994. if (!dev) {
  995. shost_printk(KERN_ERR, esp->host,
  996. "Reconnect, no lp tgt[%u] lun[%u]\n",
  997. target, lun);
  998. goto do_reset;
  999. }
  1000. lp = dev->hostdata;
  1001. ent = lp->non_tagged_cmd;
  1002. if (!ent) {
  1003. ent = esp_reconnect_with_tag(esp, lp);
  1004. if (!ent)
  1005. goto do_reset;
  1006. }
  1007. esp->active_cmd = ent;
  1008. if (ent->flags & ESP_CMD_FLAG_ABORT) {
  1009. esp->msg_out[0] = ABORT_TASK_SET;
  1010. esp->msg_out_len = 1;
  1011. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1012. }
  1013. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1014. esp_restore_pointers(esp, ent);
  1015. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1016. return 1;
  1017. do_reset:
  1018. esp_schedule_reset(esp);
  1019. return 0;
  1020. }
  1021. static int esp_finish_select(struct esp *esp)
  1022. {
  1023. struct esp_cmd_entry *ent;
  1024. struct scsi_cmnd *cmd;
  1025. u8 orig_select_state;
  1026. orig_select_state = esp->select_state;
  1027. /* No longer selecting. */
  1028. esp->select_state = ESP_SELECT_NONE;
  1029. esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
  1030. ent = esp->active_cmd;
  1031. cmd = ent->cmd;
  1032. if (esp->ops->dma_error(esp)) {
  1033. /* If we see a DMA error during or as a result of selection,
  1034. * all bets are off.
  1035. */
  1036. esp_schedule_reset(esp);
  1037. esp_cmd_is_done(esp, ent, cmd, (DID_ERROR << 16));
  1038. return 0;
  1039. }
  1040. esp->ops->dma_invalidate(esp);
  1041. if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
  1042. struct esp_target_data *tp = &esp->target[cmd->device->id];
  1043. /* Carefully back out of the selection attempt. Release
  1044. * resources (such as DMA mapping & TAG) and reset state (such
  1045. * as message out and command delivery variables).
  1046. */
  1047. if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1048. esp_unmap_dma(esp, cmd);
  1049. esp_free_lun_tag(ent, cmd->device->hostdata);
  1050. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
  1051. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  1052. esp->cmd_bytes_ptr = NULL;
  1053. esp->cmd_bytes_left = 0;
  1054. } else {
  1055. esp->ops->unmap_single(esp, ent->sense_dma,
  1056. SCSI_SENSE_BUFFERSIZE,
  1057. DMA_FROM_DEVICE);
  1058. ent->sense_ptr = NULL;
  1059. }
  1060. /* Now that the state is unwound properly, put back onto
  1061. * the issue queue. This command is no longer active.
  1062. */
  1063. list_move(&ent->list, &esp->queued_cmds);
  1064. esp->active_cmd = NULL;
  1065. /* Return value ignored by caller, it directly invokes
  1066. * esp_reconnect().
  1067. */
  1068. return 0;
  1069. }
  1070. if (esp->ireg == ESP_INTR_DC) {
  1071. struct scsi_device *dev = cmd->device;
  1072. /* Disconnect. Make sure we re-negotiate sync and
  1073. * wide parameters if this target starts responding
  1074. * again in the future.
  1075. */
  1076. esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
  1077. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1078. esp_cmd_is_done(esp, ent, cmd, (DID_BAD_TARGET << 16));
  1079. return 1;
  1080. }
  1081. if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
  1082. /* Selection successful. On pre-FAST chips we have
  1083. * to do a NOP and possibly clean out the FIFO.
  1084. */
  1085. if (esp->rev <= ESP236) {
  1086. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1087. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1088. if (!fcnt &&
  1089. (!esp->prev_soff ||
  1090. ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
  1091. esp_flush_fifo(esp);
  1092. }
  1093. /* If we are doing a slow command, negotiation, etc.
  1094. * we'll do the right thing as we transition to the
  1095. * next phase.
  1096. */
  1097. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1098. return 0;
  1099. }
  1100. shost_printk(KERN_INFO, esp->host,
  1101. "Unexpected selection completion ireg[%x]\n", esp->ireg);
  1102. esp_schedule_reset(esp);
  1103. return 0;
  1104. }
  1105. static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
  1106. struct scsi_cmnd *cmd)
  1107. {
  1108. int fifo_cnt, ecount, bytes_sent, flush_fifo;
  1109. fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1110. if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
  1111. fifo_cnt <<= 1;
  1112. ecount = 0;
  1113. if (!(esp->sreg & ESP_STAT_TCNT)) {
  1114. ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
  1115. (((unsigned int)esp_read8(ESP_TCMED)) << 8));
  1116. if (esp->rev == FASHME)
  1117. ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
  1118. if (esp->rev == PCSCSI && (esp->config2 & ESP_CONFIG2_FENAB))
  1119. ecount |= ((unsigned int)esp_read8(ESP_TCHI)) << 16;
  1120. }
  1121. bytes_sent = esp->data_dma_len;
  1122. bytes_sent -= ecount;
  1123. /*
  1124. * The am53c974 has a DMA 'pecularity'. The doc states:
  1125. * In some odd byte conditions, one residual byte will
  1126. * be left in the SCSI FIFO, and the FIFO Flags will
  1127. * never count to '0 '. When this happens, the residual
  1128. * byte should be retrieved via PIO following completion
  1129. * of the BLAST operation.
  1130. */
  1131. if (fifo_cnt == 1 && ent->flags & ESP_CMD_FLAG_RESIDUAL) {
  1132. size_t count = 1;
  1133. size_t offset = bytes_sent;
  1134. u8 bval = esp_read8(ESP_FDATA);
  1135. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE)
  1136. ent->sense_ptr[bytes_sent] = bval;
  1137. else {
  1138. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  1139. u8 *ptr;
  1140. ptr = scsi_kmap_atomic_sg(p->cur_sg, p->u.num_sg,
  1141. &offset, &count);
  1142. if (likely(ptr)) {
  1143. *(ptr + offset) = bval;
  1144. scsi_kunmap_atomic_sg(ptr);
  1145. }
  1146. }
  1147. bytes_sent += fifo_cnt;
  1148. ent->flags &= ~ESP_CMD_FLAG_RESIDUAL;
  1149. }
  1150. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1151. bytes_sent -= fifo_cnt;
  1152. flush_fifo = 0;
  1153. if (!esp->prev_soff) {
  1154. /* Synchronous data transfer, always flush fifo. */
  1155. flush_fifo = 1;
  1156. } else {
  1157. if (esp->rev == ESP100) {
  1158. u32 fflags, phase;
  1159. /* ESP100 has a chip bug where in the synchronous data
  1160. * phase it can mistake a final long REQ pulse from the
  1161. * target as an extra data byte. Fun.
  1162. *
  1163. * To detect this case we resample the status register
  1164. * and fifo flags. If we're still in a data phase and
  1165. * we see spurious chunks in the fifo, we return error
  1166. * to the caller which should reset and set things up
  1167. * such that we only try future transfers to this
  1168. * target in synchronous mode.
  1169. */
  1170. esp->sreg = esp_read8(ESP_STATUS);
  1171. phase = esp->sreg & ESP_STAT_PMASK;
  1172. fflags = esp_read8(ESP_FFLAGS);
  1173. if ((phase == ESP_DOP &&
  1174. (fflags & ESP_FF_ONOTZERO)) ||
  1175. (phase == ESP_DIP &&
  1176. (fflags & ESP_FF_FBYTES)))
  1177. return -1;
  1178. }
  1179. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1180. flush_fifo = 1;
  1181. }
  1182. if (flush_fifo)
  1183. esp_flush_fifo(esp);
  1184. return bytes_sent;
  1185. }
  1186. static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
  1187. u8 scsi_period, u8 scsi_offset,
  1188. u8 esp_stp, u8 esp_soff)
  1189. {
  1190. spi_period(tp->starget) = scsi_period;
  1191. spi_offset(tp->starget) = scsi_offset;
  1192. spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
  1193. if (esp_soff) {
  1194. esp_stp &= 0x1f;
  1195. esp_soff |= esp->radelay;
  1196. if (esp->rev >= FAS236) {
  1197. u8 bit = ESP_CONFIG3_FSCSI;
  1198. if (esp->rev >= FAS100A)
  1199. bit = ESP_CONFIG3_FAST;
  1200. if (scsi_period < 50) {
  1201. if (esp->rev == FASHME)
  1202. esp_soff &= ~esp->radelay;
  1203. tp->esp_config3 |= bit;
  1204. } else {
  1205. tp->esp_config3 &= ~bit;
  1206. }
  1207. esp->prev_cfg3 = tp->esp_config3;
  1208. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1209. }
  1210. }
  1211. tp->esp_period = esp->prev_stp = esp_stp;
  1212. tp->esp_offset = esp->prev_soff = esp_soff;
  1213. esp_write8(esp_soff, ESP_SOFF);
  1214. esp_write8(esp_stp, ESP_STP);
  1215. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1216. spi_display_xfer_agreement(tp->starget);
  1217. }
  1218. static void esp_msgin_reject(struct esp *esp)
  1219. {
  1220. struct esp_cmd_entry *ent = esp->active_cmd;
  1221. struct scsi_cmnd *cmd = ent->cmd;
  1222. struct esp_target_data *tp;
  1223. int tgt;
  1224. tgt = cmd->device->id;
  1225. tp = &esp->target[tgt];
  1226. if (tp->flags & ESP_TGT_NEGO_WIDE) {
  1227. tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
  1228. if (!esp_need_to_nego_sync(tp)) {
  1229. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1230. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1231. } else {
  1232. esp->msg_out_len =
  1233. spi_populate_sync_msg(&esp->msg_out[0],
  1234. tp->nego_goal_period,
  1235. tp->nego_goal_offset);
  1236. tp->flags |= ESP_TGT_NEGO_SYNC;
  1237. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1238. }
  1239. return;
  1240. }
  1241. if (tp->flags & ESP_TGT_NEGO_SYNC) {
  1242. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1243. tp->esp_period = 0;
  1244. tp->esp_offset = 0;
  1245. esp_setsync(esp, tp, 0, 0, 0, 0);
  1246. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1247. return;
  1248. }
  1249. esp->msg_out[0] = ABORT_TASK_SET;
  1250. esp->msg_out_len = 1;
  1251. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1252. }
  1253. static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
  1254. {
  1255. u8 period = esp->msg_in[3];
  1256. u8 offset = esp->msg_in[4];
  1257. u8 stp;
  1258. if (!(tp->flags & ESP_TGT_NEGO_SYNC))
  1259. goto do_reject;
  1260. if (offset > 15)
  1261. goto do_reject;
  1262. if (offset) {
  1263. int one_clock;
  1264. if (period > esp->max_period) {
  1265. period = offset = 0;
  1266. goto do_sdtr;
  1267. }
  1268. if (period < esp->min_period)
  1269. goto do_reject;
  1270. one_clock = esp->ccycle / 1000;
  1271. stp = DIV_ROUND_UP(period << 2, one_clock);
  1272. if (stp && esp->rev >= FAS236) {
  1273. if (stp >= 50)
  1274. stp--;
  1275. }
  1276. } else {
  1277. stp = 0;
  1278. }
  1279. esp_setsync(esp, tp, period, offset, stp, offset);
  1280. return;
  1281. do_reject:
  1282. esp->msg_out[0] = MESSAGE_REJECT;
  1283. esp->msg_out_len = 1;
  1284. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1285. return;
  1286. do_sdtr:
  1287. tp->nego_goal_period = period;
  1288. tp->nego_goal_offset = offset;
  1289. esp->msg_out_len =
  1290. spi_populate_sync_msg(&esp->msg_out[0],
  1291. tp->nego_goal_period,
  1292. tp->nego_goal_offset);
  1293. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1294. }
  1295. static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
  1296. {
  1297. int size = 8 << esp->msg_in[3];
  1298. u8 cfg3;
  1299. if (esp->rev != FASHME)
  1300. goto do_reject;
  1301. if (size != 8 && size != 16)
  1302. goto do_reject;
  1303. if (!(tp->flags & ESP_TGT_NEGO_WIDE))
  1304. goto do_reject;
  1305. cfg3 = tp->esp_config3;
  1306. if (size == 16) {
  1307. tp->flags |= ESP_TGT_WIDE;
  1308. cfg3 |= ESP_CONFIG3_EWIDE;
  1309. } else {
  1310. tp->flags &= ~ESP_TGT_WIDE;
  1311. cfg3 &= ~ESP_CONFIG3_EWIDE;
  1312. }
  1313. tp->esp_config3 = cfg3;
  1314. esp->prev_cfg3 = cfg3;
  1315. esp_write8(cfg3, ESP_CFG3);
  1316. tp->flags &= ~ESP_TGT_NEGO_WIDE;
  1317. spi_period(tp->starget) = 0;
  1318. spi_offset(tp->starget) = 0;
  1319. if (!esp_need_to_nego_sync(tp)) {
  1320. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1321. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1322. } else {
  1323. esp->msg_out_len =
  1324. spi_populate_sync_msg(&esp->msg_out[0],
  1325. tp->nego_goal_period,
  1326. tp->nego_goal_offset);
  1327. tp->flags |= ESP_TGT_NEGO_SYNC;
  1328. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1329. }
  1330. return;
  1331. do_reject:
  1332. esp->msg_out[0] = MESSAGE_REJECT;
  1333. esp->msg_out_len = 1;
  1334. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1335. }
  1336. static void esp_msgin_extended(struct esp *esp)
  1337. {
  1338. struct esp_cmd_entry *ent = esp->active_cmd;
  1339. struct scsi_cmnd *cmd = ent->cmd;
  1340. struct esp_target_data *tp;
  1341. int tgt = cmd->device->id;
  1342. tp = &esp->target[tgt];
  1343. if (esp->msg_in[2] == EXTENDED_SDTR) {
  1344. esp_msgin_sdtr(esp, tp);
  1345. return;
  1346. }
  1347. if (esp->msg_in[2] == EXTENDED_WDTR) {
  1348. esp_msgin_wdtr(esp, tp);
  1349. return;
  1350. }
  1351. shost_printk(KERN_INFO, esp->host,
  1352. "Unexpected extended msg type %x\n", esp->msg_in[2]);
  1353. esp->msg_out[0] = ABORT_TASK_SET;
  1354. esp->msg_out_len = 1;
  1355. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1356. }
  1357. /* Analyze msgin bytes received from target so far. Return non-zero
  1358. * if there are more bytes needed to complete the message.
  1359. */
  1360. static int esp_msgin_process(struct esp *esp)
  1361. {
  1362. u8 msg0 = esp->msg_in[0];
  1363. int len = esp->msg_in_len;
  1364. if (msg0 & 0x80) {
  1365. /* Identify */
  1366. shost_printk(KERN_INFO, esp->host,
  1367. "Unexpected msgin identify\n");
  1368. return 0;
  1369. }
  1370. switch (msg0) {
  1371. case EXTENDED_MESSAGE:
  1372. if (len == 1)
  1373. return 1;
  1374. if (len < esp->msg_in[1] + 2)
  1375. return 1;
  1376. esp_msgin_extended(esp);
  1377. return 0;
  1378. case IGNORE_WIDE_RESIDUE: {
  1379. struct esp_cmd_entry *ent;
  1380. struct esp_cmd_priv *spriv;
  1381. if (len == 1)
  1382. return 1;
  1383. if (esp->msg_in[1] != 1)
  1384. goto do_reject;
  1385. ent = esp->active_cmd;
  1386. spriv = ESP_CMD_PRIV(ent->cmd);
  1387. if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
  1388. spriv->cur_sg--;
  1389. spriv->cur_residue = 1;
  1390. } else
  1391. spriv->cur_residue++;
  1392. spriv->tot_residue++;
  1393. return 0;
  1394. }
  1395. case NOP:
  1396. return 0;
  1397. case RESTORE_POINTERS:
  1398. esp_restore_pointers(esp, esp->active_cmd);
  1399. return 0;
  1400. case SAVE_POINTERS:
  1401. esp_save_pointers(esp, esp->active_cmd);
  1402. return 0;
  1403. case COMMAND_COMPLETE:
  1404. case DISCONNECT: {
  1405. struct esp_cmd_entry *ent = esp->active_cmd;
  1406. ent->message = msg0;
  1407. esp_event(esp, ESP_EVENT_FREE_BUS);
  1408. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1409. return 0;
  1410. }
  1411. case MESSAGE_REJECT:
  1412. esp_msgin_reject(esp);
  1413. return 0;
  1414. default:
  1415. do_reject:
  1416. esp->msg_out[0] = MESSAGE_REJECT;
  1417. esp->msg_out_len = 1;
  1418. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1419. return 0;
  1420. }
  1421. }
  1422. static int esp_process_event(struct esp *esp)
  1423. {
  1424. int write, i;
  1425. again:
  1426. write = 0;
  1427. esp_log_event("process event %d phase %x\n",
  1428. esp->event, esp->sreg & ESP_STAT_PMASK);
  1429. switch (esp->event) {
  1430. case ESP_EVENT_CHECK_PHASE:
  1431. switch (esp->sreg & ESP_STAT_PMASK) {
  1432. case ESP_DOP:
  1433. esp_event(esp, ESP_EVENT_DATA_OUT);
  1434. break;
  1435. case ESP_DIP:
  1436. esp_event(esp, ESP_EVENT_DATA_IN);
  1437. break;
  1438. case ESP_STATP:
  1439. esp_flush_fifo(esp);
  1440. scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
  1441. esp_event(esp, ESP_EVENT_STATUS);
  1442. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1443. return 1;
  1444. case ESP_MOP:
  1445. esp_event(esp, ESP_EVENT_MSGOUT);
  1446. break;
  1447. case ESP_MIP:
  1448. esp_event(esp, ESP_EVENT_MSGIN);
  1449. break;
  1450. case ESP_CMDP:
  1451. esp_event(esp, ESP_EVENT_CMD_START);
  1452. break;
  1453. default:
  1454. shost_printk(KERN_INFO, esp->host,
  1455. "Unexpected phase, sreg=%02x\n",
  1456. esp->sreg);
  1457. esp_schedule_reset(esp);
  1458. return 0;
  1459. }
  1460. goto again;
  1461. break;
  1462. case ESP_EVENT_DATA_IN:
  1463. write = 1;
  1464. /* fallthru */
  1465. case ESP_EVENT_DATA_OUT: {
  1466. struct esp_cmd_entry *ent = esp->active_cmd;
  1467. struct scsi_cmnd *cmd = ent->cmd;
  1468. dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
  1469. unsigned int dma_len = esp_cur_dma_len(ent, cmd);
  1470. if (esp->rev == ESP100)
  1471. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1472. if (write)
  1473. ent->flags |= ESP_CMD_FLAG_WRITE;
  1474. else
  1475. ent->flags &= ~ESP_CMD_FLAG_WRITE;
  1476. if (esp->ops->dma_length_limit)
  1477. dma_len = esp->ops->dma_length_limit(esp, dma_addr,
  1478. dma_len);
  1479. else
  1480. dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
  1481. esp->data_dma_len = dma_len;
  1482. if (!dma_len) {
  1483. shost_printk(KERN_ERR, esp->host,
  1484. "DMA length is zero!\n");
  1485. shost_printk(KERN_ERR, esp->host,
  1486. "cur adr[%08llx] len[%08x]\n",
  1487. (unsigned long long)esp_cur_dma_addr(ent, cmd),
  1488. esp_cur_dma_len(ent, cmd));
  1489. esp_schedule_reset(esp);
  1490. return 0;
  1491. }
  1492. esp_log_datastart("start data addr[%08llx] len[%u] write(%d)\n",
  1493. (unsigned long long)dma_addr, dma_len, write);
  1494. esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
  1495. write, ESP_CMD_DMA | ESP_CMD_TI);
  1496. esp_event(esp, ESP_EVENT_DATA_DONE);
  1497. break;
  1498. }
  1499. case ESP_EVENT_DATA_DONE: {
  1500. struct esp_cmd_entry *ent = esp->active_cmd;
  1501. struct scsi_cmnd *cmd = ent->cmd;
  1502. int bytes_sent;
  1503. if (esp->ops->dma_error(esp)) {
  1504. shost_printk(KERN_INFO, esp->host,
  1505. "data done, DMA error, resetting\n");
  1506. esp_schedule_reset(esp);
  1507. return 0;
  1508. }
  1509. if (ent->flags & ESP_CMD_FLAG_WRITE) {
  1510. /* XXX parity errors, etc. XXX */
  1511. esp->ops->dma_drain(esp);
  1512. }
  1513. esp->ops->dma_invalidate(esp);
  1514. if (esp->ireg != ESP_INTR_BSERV) {
  1515. /* We should always see exactly a bus-service
  1516. * interrupt at the end of a successful transfer.
  1517. */
  1518. shost_printk(KERN_INFO, esp->host,
  1519. "data done, not BSERV, resetting\n");
  1520. esp_schedule_reset(esp);
  1521. return 0;
  1522. }
  1523. bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
  1524. esp_log_datadone("data done flgs[%x] sent[%d]\n",
  1525. ent->flags, bytes_sent);
  1526. if (bytes_sent < 0) {
  1527. /* XXX force sync mode for this target XXX */
  1528. esp_schedule_reset(esp);
  1529. return 0;
  1530. }
  1531. esp_advance_dma(esp, ent, cmd, bytes_sent);
  1532. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1533. goto again;
  1534. }
  1535. case ESP_EVENT_STATUS: {
  1536. struct esp_cmd_entry *ent = esp->active_cmd;
  1537. if (esp->ireg & ESP_INTR_FDONE) {
  1538. ent->status = esp_read8(ESP_FDATA);
  1539. ent->message = esp_read8(ESP_FDATA);
  1540. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1541. } else if (esp->ireg == ESP_INTR_BSERV) {
  1542. ent->status = esp_read8(ESP_FDATA);
  1543. ent->message = 0xff;
  1544. esp_event(esp, ESP_EVENT_MSGIN);
  1545. return 0;
  1546. }
  1547. if (ent->message != COMMAND_COMPLETE) {
  1548. shost_printk(KERN_INFO, esp->host,
  1549. "Unexpected message %x in status\n",
  1550. ent->message);
  1551. esp_schedule_reset(esp);
  1552. return 0;
  1553. }
  1554. esp_event(esp, ESP_EVENT_FREE_BUS);
  1555. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1556. break;
  1557. }
  1558. case ESP_EVENT_FREE_BUS: {
  1559. struct esp_cmd_entry *ent = esp->active_cmd;
  1560. struct scsi_cmnd *cmd = ent->cmd;
  1561. if (ent->message == COMMAND_COMPLETE ||
  1562. ent->message == DISCONNECT)
  1563. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1564. if (ent->message == COMMAND_COMPLETE) {
  1565. esp_log_cmddone("Command done status[%x] message[%x]\n",
  1566. ent->status, ent->message);
  1567. if (ent->status == SAM_STAT_TASK_SET_FULL)
  1568. esp_event_queue_full(esp, ent);
  1569. if (ent->status == SAM_STAT_CHECK_CONDITION &&
  1570. !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1571. ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
  1572. esp_autosense(esp, ent);
  1573. } else {
  1574. esp_cmd_is_done(esp, ent, cmd,
  1575. compose_result(ent->status,
  1576. ent->message,
  1577. DID_OK));
  1578. }
  1579. } else if (ent->message == DISCONNECT) {
  1580. esp_log_disconnect("Disconnecting tgt[%d] tag[%x:%x]\n",
  1581. cmd->device->id,
  1582. ent->tag[0], ent->tag[1]);
  1583. esp->active_cmd = NULL;
  1584. esp_maybe_execute_command(esp);
  1585. } else {
  1586. shost_printk(KERN_INFO, esp->host,
  1587. "Unexpected message %x in freebus\n",
  1588. ent->message);
  1589. esp_schedule_reset(esp);
  1590. return 0;
  1591. }
  1592. if (esp->active_cmd)
  1593. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1594. break;
  1595. }
  1596. case ESP_EVENT_MSGOUT: {
  1597. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1598. if (esp_debug & ESP_DEBUG_MSGOUT) {
  1599. int i;
  1600. printk("ESP: Sending message [ ");
  1601. for (i = 0; i < esp->msg_out_len; i++)
  1602. printk("%02x ", esp->msg_out[i]);
  1603. printk("]\n");
  1604. }
  1605. if (esp->rev == FASHME) {
  1606. int i;
  1607. /* Always use the fifo. */
  1608. for (i = 0; i < esp->msg_out_len; i++) {
  1609. esp_write8(esp->msg_out[i], ESP_FDATA);
  1610. esp_write8(0, ESP_FDATA);
  1611. }
  1612. scsi_esp_cmd(esp, ESP_CMD_TI);
  1613. } else {
  1614. if (esp->msg_out_len == 1) {
  1615. esp_write8(esp->msg_out[0], ESP_FDATA);
  1616. scsi_esp_cmd(esp, ESP_CMD_TI);
  1617. } else if (esp->flags & ESP_FLAG_USE_FIFO) {
  1618. for (i = 0; i < esp->msg_out_len; i++)
  1619. esp_write8(esp->msg_out[i], ESP_FDATA);
  1620. scsi_esp_cmd(esp, ESP_CMD_TI);
  1621. } else {
  1622. /* Use DMA. */
  1623. memcpy(esp->command_block,
  1624. esp->msg_out,
  1625. esp->msg_out_len);
  1626. esp->ops->send_dma_cmd(esp,
  1627. esp->command_block_dma,
  1628. esp->msg_out_len,
  1629. esp->msg_out_len,
  1630. 0,
  1631. ESP_CMD_DMA|ESP_CMD_TI);
  1632. }
  1633. }
  1634. esp_event(esp, ESP_EVENT_MSGOUT_DONE);
  1635. break;
  1636. }
  1637. case ESP_EVENT_MSGOUT_DONE:
  1638. if (esp->rev == FASHME) {
  1639. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1640. } else {
  1641. if (esp->msg_out_len > 1)
  1642. esp->ops->dma_invalidate(esp);
  1643. }
  1644. if (!(esp->ireg & ESP_INTR_DC)) {
  1645. if (esp->rev != FASHME)
  1646. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1647. }
  1648. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1649. goto again;
  1650. case ESP_EVENT_MSGIN:
  1651. if (esp->ireg & ESP_INTR_BSERV) {
  1652. if (esp->rev == FASHME) {
  1653. if (!(esp_read8(ESP_STATUS2) &
  1654. ESP_STAT2_FEMPTY))
  1655. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1656. } else {
  1657. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1658. if (esp->rev == ESP100)
  1659. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1660. }
  1661. scsi_esp_cmd(esp, ESP_CMD_TI);
  1662. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1663. return 1;
  1664. }
  1665. if (esp->ireg & ESP_INTR_FDONE) {
  1666. u8 val;
  1667. if (esp->rev == FASHME)
  1668. val = esp->fifo[0];
  1669. else
  1670. val = esp_read8(ESP_FDATA);
  1671. esp->msg_in[esp->msg_in_len++] = val;
  1672. esp_log_msgin("Got msgin byte %x\n", val);
  1673. if (!esp_msgin_process(esp))
  1674. esp->msg_in_len = 0;
  1675. if (esp->rev == FASHME)
  1676. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1677. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1678. if (esp->event != ESP_EVENT_FREE_BUS)
  1679. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1680. } else {
  1681. shost_printk(KERN_INFO, esp->host,
  1682. "MSGIN neither BSERV not FDON, resetting");
  1683. esp_schedule_reset(esp);
  1684. return 0;
  1685. }
  1686. break;
  1687. case ESP_EVENT_CMD_START:
  1688. memcpy(esp->command_block, esp->cmd_bytes_ptr,
  1689. esp->cmd_bytes_left);
  1690. esp_send_dma_cmd(esp, esp->cmd_bytes_left, 16, ESP_CMD_TI);
  1691. esp_event(esp, ESP_EVENT_CMD_DONE);
  1692. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1693. break;
  1694. case ESP_EVENT_CMD_DONE:
  1695. esp->ops->dma_invalidate(esp);
  1696. if (esp->ireg & ESP_INTR_BSERV) {
  1697. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1698. goto again;
  1699. }
  1700. esp_schedule_reset(esp);
  1701. return 0;
  1702. break;
  1703. case ESP_EVENT_RESET:
  1704. scsi_esp_cmd(esp, ESP_CMD_RS);
  1705. break;
  1706. default:
  1707. shost_printk(KERN_INFO, esp->host,
  1708. "Unexpected event %x, resetting\n", esp->event);
  1709. esp_schedule_reset(esp);
  1710. return 0;
  1711. break;
  1712. }
  1713. return 1;
  1714. }
  1715. static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
  1716. {
  1717. struct scsi_cmnd *cmd = ent->cmd;
  1718. esp_unmap_dma(esp, cmd);
  1719. esp_free_lun_tag(ent, cmd->device->hostdata);
  1720. cmd->result = DID_RESET << 16;
  1721. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  1722. esp->ops->unmap_single(esp, ent->sense_dma,
  1723. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  1724. ent->sense_ptr = NULL;
  1725. }
  1726. cmd->scsi_done(cmd);
  1727. list_del(&ent->list);
  1728. esp_put_ent(esp, ent);
  1729. }
  1730. static void esp_clear_hold(struct scsi_device *dev, void *data)
  1731. {
  1732. struct esp_lun_data *lp = dev->hostdata;
  1733. BUG_ON(lp->num_tagged);
  1734. lp->hold = 0;
  1735. }
  1736. static void esp_reset_cleanup(struct esp *esp)
  1737. {
  1738. struct esp_cmd_entry *ent, *tmp;
  1739. int i;
  1740. list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
  1741. struct scsi_cmnd *cmd = ent->cmd;
  1742. list_del(&ent->list);
  1743. cmd->result = DID_RESET << 16;
  1744. cmd->scsi_done(cmd);
  1745. esp_put_ent(esp, ent);
  1746. }
  1747. list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
  1748. if (ent == esp->active_cmd)
  1749. esp->active_cmd = NULL;
  1750. esp_reset_cleanup_one(esp, ent);
  1751. }
  1752. BUG_ON(esp->active_cmd != NULL);
  1753. /* Force renegotiation of sync/wide transfers. */
  1754. for (i = 0; i < ESP_MAX_TARGET; i++) {
  1755. struct esp_target_data *tp = &esp->target[i];
  1756. tp->esp_period = 0;
  1757. tp->esp_offset = 0;
  1758. tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
  1759. ESP_CONFIG3_FSCSI |
  1760. ESP_CONFIG3_FAST);
  1761. tp->flags &= ~ESP_TGT_WIDE;
  1762. tp->flags |= ESP_TGT_CHECK_NEGO;
  1763. if (tp->starget)
  1764. __starget_for_each_device(tp->starget, NULL,
  1765. esp_clear_hold);
  1766. }
  1767. esp->flags &= ~ESP_FLAG_RESETTING;
  1768. }
  1769. /* Runs under host->lock */
  1770. static void __esp_interrupt(struct esp *esp)
  1771. {
  1772. int finish_reset, intr_done;
  1773. u8 phase;
  1774. /*
  1775. * Once INTRPT is read STATUS and SSTEP are cleared.
  1776. */
  1777. esp->sreg = esp_read8(ESP_STATUS);
  1778. esp->seqreg = esp_read8(ESP_SSTEP);
  1779. esp->ireg = esp_read8(ESP_INTRPT);
  1780. if (esp->flags & ESP_FLAG_RESETTING) {
  1781. finish_reset = 1;
  1782. } else {
  1783. if (esp_check_gross_error(esp))
  1784. return;
  1785. finish_reset = esp_check_spur_intr(esp);
  1786. if (finish_reset < 0)
  1787. return;
  1788. }
  1789. if (esp->ireg & ESP_INTR_SR)
  1790. finish_reset = 1;
  1791. if (finish_reset) {
  1792. esp_reset_cleanup(esp);
  1793. if (esp->eh_reset) {
  1794. complete(esp->eh_reset);
  1795. esp->eh_reset = NULL;
  1796. }
  1797. return;
  1798. }
  1799. phase = (esp->sreg & ESP_STAT_PMASK);
  1800. if (esp->rev == FASHME) {
  1801. if (((phase != ESP_DIP && phase != ESP_DOP) &&
  1802. esp->select_state == ESP_SELECT_NONE &&
  1803. esp->event != ESP_EVENT_STATUS &&
  1804. esp->event != ESP_EVENT_DATA_DONE) ||
  1805. (esp->ireg & ESP_INTR_RSEL)) {
  1806. esp->sreg2 = esp_read8(ESP_STATUS2);
  1807. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1808. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1809. hme_read_fifo(esp);
  1810. }
  1811. }
  1812. esp_log_intr("intr sreg[%02x] seqreg[%02x] "
  1813. "sreg2[%02x] ireg[%02x]\n",
  1814. esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
  1815. intr_done = 0;
  1816. if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
  1817. shost_printk(KERN_INFO, esp->host,
  1818. "unexpected IREG %02x\n", esp->ireg);
  1819. if (esp->ireg & ESP_INTR_IC)
  1820. esp_dump_cmd_log(esp);
  1821. esp_schedule_reset(esp);
  1822. } else {
  1823. if (!(esp->ireg & ESP_INTR_RSEL)) {
  1824. /* Some combination of FDONE, BSERV, DC. */
  1825. if (esp->select_state != ESP_SELECT_NONE)
  1826. intr_done = esp_finish_select(esp);
  1827. } else if (esp->ireg & ESP_INTR_RSEL) {
  1828. if (esp->active_cmd)
  1829. (void) esp_finish_select(esp);
  1830. intr_done = esp_reconnect(esp);
  1831. }
  1832. }
  1833. while (!intr_done)
  1834. intr_done = esp_process_event(esp);
  1835. }
  1836. irqreturn_t scsi_esp_intr(int irq, void *dev_id)
  1837. {
  1838. struct esp *esp = dev_id;
  1839. unsigned long flags;
  1840. irqreturn_t ret;
  1841. spin_lock_irqsave(esp->host->host_lock, flags);
  1842. ret = IRQ_NONE;
  1843. if (esp->ops->irq_pending(esp)) {
  1844. ret = IRQ_HANDLED;
  1845. for (;;) {
  1846. int i;
  1847. __esp_interrupt(esp);
  1848. if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
  1849. break;
  1850. esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
  1851. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  1852. if (esp->ops->irq_pending(esp))
  1853. break;
  1854. }
  1855. if (i == ESP_QUICKIRQ_LIMIT)
  1856. break;
  1857. }
  1858. }
  1859. spin_unlock_irqrestore(esp->host->host_lock, flags);
  1860. return ret;
  1861. }
  1862. EXPORT_SYMBOL(scsi_esp_intr);
  1863. static void esp_get_revision(struct esp *esp)
  1864. {
  1865. u8 val;
  1866. esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
  1867. if (esp->config2 == 0) {
  1868. esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
  1869. esp_write8(esp->config2, ESP_CFG2);
  1870. val = esp_read8(ESP_CFG2);
  1871. val &= ~ESP_CONFIG2_MAGIC;
  1872. esp->config2 = 0;
  1873. if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
  1874. /*
  1875. * If what we write to cfg2 does not come back,
  1876. * cfg2 is not implemented.
  1877. * Therefore this must be a plain esp100.
  1878. */
  1879. esp->rev = ESP100;
  1880. return;
  1881. }
  1882. }
  1883. esp_set_all_config3(esp, 5);
  1884. esp->prev_cfg3 = 5;
  1885. esp_write8(esp->config2, ESP_CFG2);
  1886. esp_write8(0, ESP_CFG3);
  1887. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1888. val = esp_read8(ESP_CFG3);
  1889. if (val != 5) {
  1890. /* The cfg2 register is implemented, however
  1891. * cfg3 is not, must be esp100a.
  1892. */
  1893. esp->rev = ESP100A;
  1894. } else {
  1895. esp_set_all_config3(esp, 0);
  1896. esp->prev_cfg3 = 0;
  1897. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1898. /* All of cfg{1,2,3} implemented, must be one of
  1899. * the fas variants, figure out which one.
  1900. */
  1901. if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
  1902. esp->rev = FAST;
  1903. esp->sync_defp = SYNC_DEFP_FAST;
  1904. } else {
  1905. esp->rev = ESP236;
  1906. }
  1907. }
  1908. }
  1909. static void esp_init_swstate(struct esp *esp)
  1910. {
  1911. int i;
  1912. INIT_LIST_HEAD(&esp->queued_cmds);
  1913. INIT_LIST_HEAD(&esp->active_cmds);
  1914. INIT_LIST_HEAD(&esp->esp_cmd_pool);
  1915. /* Start with a clear state, domain validation (via ->slave_configure,
  1916. * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
  1917. * commands.
  1918. */
  1919. for (i = 0 ; i < ESP_MAX_TARGET; i++) {
  1920. esp->target[i].flags = 0;
  1921. esp->target[i].nego_goal_period = 0;
  1922. esp->target[i].nego_goal_offset = 0;
  1923. esp->target[i].nego_goal_width = 0;
  1924. esp->target[i].nego_goal_tags = 0;
  1925. }
  1926. }
  1927. /* This places the ESP into a known state at boot time. */
  1928. static void esp_bootup_reset(struct esp *esp)
  1929. {
  1930. u8 val;
  1931. /* Reset the DMA */
  1932. esp->ops->reset_dma(esp);
  1933. /* Reset the ESP */
  1934. esp_reset_esp(esp);
  1935. /* Reset the SCSI bus, but tell ESP not to generate an irq */
  1936. val = esp_read8(ESP_CFG1);
  1937. val |= ESP_CONFIG1_SRRDISAB;
  1938. esp_write8(val, ESP_CFG1);
  1939. scsi_esp_cmd(esp, ESP_CMD_RS);
  1940. udelay(400);
  1941. esp_write8(esp->config1, ESP_CFG1);
  1942. /* Eat any bitrot in the chip and we are done... */
  1943. esp_read8(ESP_INTRPT);
  1944. }
  1945. static void esp_set_clock_params(struct esp *esp)
  1946. {
  1947. int fhz;
  1948. u8 ccf;
  1949. /* This is getting messy but it has to be done correctly or else
  1950. * you get weird behavior all over the place. We are trying to
  1951. * basically figure out three pieces of information.
  1952. *
  1953. * a) Clock Conversion Factor
  1954. *
  1955. * This is a representation of the input crystal clock frequency
  1956. * going into the ESP on this machine. Any operation whose timing
  1957. * is longer than 400ns depends on this value being correct. For
  1958. * example, you'll get blips for arbitration/selection during high
  1959. * load or with multiple targets if this is not set correctly.
  1960. *
  1961. * b) Selection Time-Out
  1962. *
  1963. * The ESP isn't very bright and will arbitrate for the bus and try
  1964. * to select a target forever if you let it. This value tells the
  1965. * ESP when it has taken too long to negotiate and that it should
  1966. * interrupt the CPU so we can see what happened. The value is
  1967. * computed as follows (from NCR/Symbios chip docs).
  1968. *
  1969. * (Time Out Period) * (Input Clock)
  1970. * STO = ----------------------------------
  1971. * (8192) * (Clock Conversion Factor)
  1972. *
  1973. * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
  1974. *
  1975. * c) Imperical constants for synchronous offset and transfer period
  1976. * register values
  1977. *
  1978. * This entails the smallest and largest sync period we could ever
  1979. * handle on this ESP.
  1980. */
  1981. fhz = esp->cfreq;
  1982. ccf = ((fhz / 1000000) + 4) / 5;
  1983. if (ccf == 1)
  1984. ccf = 2;
  1985. /* If we can't find anything reasonable, just assume 20MHZ.
  1986. * This is the clock frequency of the older sun4c's where I've
  1987. * been unable to find the clock-frequency PROM property. All
  1988. * other machines provide useful values it seems.
  1989. */
  1990. if (fhz <= 5000000 || ccf < 1 || ccf > 8) {
  1991. fhz = 20000000;
  1992. ccf = 4;
  1993. }
  1994. esp->cfact = (ccf == 8 ? 0 : ccf);
  1995. esp->cfreq = fhz;
  1996. esp->ccycle = ESP_HZ_TO_CYCLE(fhz);
  1997. esp->ctick = ESP_TICK(ccf, esp->ccycle);
  1998. esp->neg_defp = ESP_NEG_DEFP(fhz, ccf);
  1999. esp->sync_defp = SYNC_DEFP_SLOW;
  2000. }
  2001. static const char *esp_chip_names[] = {
  2002. "ESP100",
  2003. "ESP100A",
  2004. "ESP236",
  2005. "FAS236",
  2006. "FAS100A",
  2007. "FAST",
  2008. "FASHME",
  2009. "AM53C974",
  2010. };
  2011. static struct scsi_transport_template *esp_transport_template;
  2012. int scsi_esp_register(struct esp *esp, struct device *dev)
  2013. {
  2014. static int instance;
  2015. int err;
  2016. if (!esp->num_tags)
  2017. esp->num_tags = ESP_DEFAULT_TAGS;
  2018. esp->host->transportt = esp_transport_template;
  2019. esp->host->max_lun = ESP_MAX_LUN;
  2020. esp->host->cmd_per_lun = 2;
  2021. esp->host->unique_id = instance;
  2022. esp_set_clock_params(esp);
  2023. esp_get_revision(esp);
  2024. esp_init_swstate(esp);
  2025. esp_bootup_reset(esp);
  2026. dev_printk(KERN_INFO, dev, "esp%u: regs[%1p:%1p] irq[%u]\n",
  2027. esp->host->unique_id, esp->regs, esp->dma_regs,
  2028. esp->host->irq);
  2029. dev_printk(KERN_INFO, dev,
  2030. "esp%u: is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
  2031. esp->host->unique_id, esp_chip_names[esp->rev],
  2032. esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
  2033. /* Let the SCSI bus reset settle. */
  2034. ssleep(esp_bus_reset_settle);
  2035. err = scsi_add_host(esp->host, dev);
  2036. if (err)
  2037. return err;
  2038. instance++;
  2039. scsi_scan_host(esp->host);
  2040. return 0;
  2041. }
  2042. EXPORT_SYMBOL(scsi_esp_register);
  2043. void scsi_esp_unregister(struct esp *esp)
  2044. {
  2045. scsi_remove_host(esp->host);
  2046. }
  2047. EXPORT_SYMBOL(scsi_esp_unregister);
  2048. static int esp_target_alloc(struct scsi_target *starget)
  2049. {
  2050. struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
  2051. struct esp_target_data *tp = &esp->target[starget->id];
  2052. tp->starget = starget;
  2053. return 0;
  2054. }
  2055. static void esp_target_destroy(struct scsi_target *starget)
  2056. {
  2057. struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
  2058. struct esp_target_data *tp = &esp->target[starget->id];
  2059. tp->starget = NULL;
  2060. }
  2061. static int esp_slave_alloc(struct scsi_device *dev)
  2062. {
  2063. struct esp *esp = shost_priv(dev->host);
  2064. struct esp_target_data *tp = &esp->target[dev->id];
  2065. struct esp_lun_data *lp;
  2066. lp = kzalloc(sizeof(*lp), GFP_KERNEL);
  2067. if (!lp)
  2068. return -ENOMEM;
  2069. dev->hostdata = lp;
  2070. spi_min_period(tp->starget) = esp->min_period;
  2071. spi_max_offset(tp->starget) = 15;
  2072. if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
  2073. spi_max_width(tp->starget) = 1;
  2074. else
  2075. spi_max_width(tp->starget) = 0;
  2076. return 0;
  2077. }
  2078. static int esp_slave_configure(struct scsi_device *dev)
  2079. {
  2080. struct esp *esp = shost_priv(dev->host);
  2081. struct esp_target_data *tp = &esp->target[dev->id];
  2082. if (dev->tagged_supported)
  2083. scsi_change_queue_depth(dev, esp->num_tags);
  2084. tp->flags |= ESP_TGT_DISCONNECT;
  2085. if (!spi_initial_dv(dev->sdev_target))
  2086. spi_dv_device(dev);
  2087. return 0;
  2088. }
  2089. static void esp_slave_destroy(struct scsi_device *dev)
  2090. {
  2091. struct esp_lun_data *lp = dev->hostdata;
  2092. kfree(lp);
  2093. dev->hostdata = NULL;
  2094. }
  2095. static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
  2096. {
  2097. struct esp *esp = shost_priv(cmd->device->host);
  2098. struct esp_cmd_entry *ent, *tmp;
  2099. struct completion eh_done;
  2100. unsigned long flags;
  2101. /* XXX This helps a lot with debugging but might be a bit
  2102. * XXX much for the final driver.
  2103. */
  2104. spin_lock_irqsave(esp->host->host_lock, flags);
  2105. shost_printk(KERN_ERR, esp->host, "Aborting command [%p:%02x]\n",
  2106. cmd, cmd->cmnd[0]);
  2107. ent = esp->active_cmd;
  2108. if (ent)
  2109. shost_printk(KERN_ERR, esp->host,
  2110. "Current command [%p:%02x]\n",
  2111. ent->cmd, ent->cmd->cmnd[0]);
  2112. list_for_each_entry(ent, &esp->queued_cmds, list) {
  2113. shost_printk(KERN_ERR, esp->host, "Queued command [%p:%02x]\n",
  2114. ent->cmd, ent->cmd->cmnd[0]);
  2115. }
  2116. list_for_each_entry(ent, &esp->active_cmds, list) {
  2117. shost_printk(KERN_ERR, esp->host, " Active command [%p:%02x]\n",
  2118. ent->cmd, ent->cmd->cmnd[0]);
  2119. }
  2120. esp_dump_cmd_log(esp);
  2121. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2122. spin_lock_irqsave(esp->host->host_lock, flags);
  2123. ent = NULL;
  2124. list_for_each_entry(tmp, &esp->queued_cmds, list) {
  2125. if (tmp->cmd == cmd) {
  2126. ent = tmp;
  2127. break;
  2128. }
  2129. }
  2130. if (ent) {
  2131. /* Easiest case, we didn't even issue the command
  2132. * yet so it is trivial to abort.
  2133. */
  2134. list_del(&ent->list);
  2135. cmd->result = DID_ABORT << 16;
  2136. cmd->scsi_done(cmd);
  2137. esp_put_ent(esp, ent);
  2138. goto out_success;
  2139. }
  2140. init_completion(&eh_done);
  2141. ent = esp->active_cmd;
  2142. if (ent && ent->cmd == cmd) {
  2143. /* Command is the currently active command on
  2144. * the bus. If we already have an output message
  2145. * pending, no dice.
  2146. */
  2147. if (esp->msg_out_len)
  2148. goto out_failure;
  2149. /* Send out an abort, encouraging the target to
  2150. * go to MSGOUT phase by asserting ATN.
  2151. */
  2152. esp->msg_out[0] = ABORT_TASK_SET;
  2153. esp->msg_out_len = 1;
  2154. ent->eh_done = &eh_done;
  2155. scsi_esp_cmd(esp, ESP_CMD_SATN);
  2156. } else {
  2157. /* The command is disconnected. This is not easy to
  2158. * abort. For now we fail and let the scsi error
  2159. * handling layer go try a scsi bus reset or host
  2160. * reset.
  2161. *
  2162. * What we could do is put together a scsi command
  2163. * solely for the purpose of sending an abort message
  2164. * to the target. Coming up with all the code to
  2165. * cook up scsi commands, special case them everywhere,
  2166. * etc. is for questionable gain and it would be better
  2167. * if the generic scsi error handling layer could do at
  2168. * least some of that for us.
  2169. *
  2170. * Anyways this is an area for potential future improvement
  2171. * in this driver.
  2172. */
  2173. goto out_failure;
  2174. }
  2175. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2176. if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
  2177. spin_lock_irqsave(esp->host->host_lock, flags);
  2178. ent->eh_done = NULL;
  2179. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2180. return FAILED;
  2181. }
  2182. return SUCCESS;
  2183. out_success:
  2184. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2185. return SUCCESS;
  2186. out_failure:
  2187. /* XXX This might be a good location to set ESP_TGT_BROKEN
  2188. * XXX since we know which target/lun in particular is
  2189. * XXX causing trouble.
  2190. */
  2191. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2192. return FAILED;
  2193. }
  2194. static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
  2195. {
  2196. struct esp *esp = shost_priv(cmd->device->host);
  2197. struct completion eh_reset;
  2198. unsigned long flags;
  2199. init_completion(&eh_reset);
  2200. spin_lock_irqsave(esp->host->host_lock, flags);
  2201. esp->eh_reset = &eh_reset;
  2202. /* XXX This is too simple... We should add lots of
  2203. * XXX checks here so that if we find that the chip is
  2204. * XXX very wedged we return failure immediately so
  2205. * XXX that we can perform a full chip reset.
  2206. */
  2207. esp->flags |= ESP_FLAG_RESETTING;
  2208. scsi_esp_cmd(esp, ESP_CMD_RS);
  2209. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2210. ssleep(esp_bus_reset_settle);
  2211. if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
  2212. spin_lock_irqsave(esp->host->host_lock, flags);
  2213. esp->eh_reset = NULL;
  2214. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2215. return FAILED;
  2216. }
  2217. return SUCCESS;
  2218. }
  2219. /* All bets are off, reset the entire device. */
  2220. static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
  2221. {
  2222. struct esp *esp = shost_priv(cmd->device->host);
  2223. unsigned long flags;
  2224. spin_lock_irqsave(esp->host->host_lock, flags);
  2225. esp_bootup_reset(esp);
  2226. esp_reset_cleanup(esp);
  2227. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2228. ssleep(esp_bus_reset_settle);
  2229. return SUCCESS;
  2230. }
  2231. static const char *esp_info(struct Scsi_Host *host)
  2232. {
  2233. return "esp";
  2234. }
  2235. struct scsi_host_template scsi_esp_template = {
  2236. .module = THIS_MODULE,
  2237. .name = "esp",
  2238. .info = esp_info,
  2239. .queuecommand = esp_queuecommand,
  2240. .target_alloc = esp_target_alloc,
  2241. .target_destroy = esp_target_destroy,
  2242. .slave_alloc = esp_slave_alloc,
  2243. .slave_configure = esp_slave_configure,
  2244. .slave_destroy = esp_slave_destroy,
  2245. .eh_abort_handler = esp_eh_abort_handler,
  2246. .eh_bus_reset_handler = esp_eh_bus_reset_handler,
  2247. .eh_host_reset_handler = esp_eh_host_reset_handler,
  2248. .can_queue = 7,
  2249. .this_id = 7,
  2250. .sg_tablesize = SG_ALL,
  2251. .use_clustering = ENABLE_CLUSTERING,
  2252. .max_sectors = 0xffff,
  2253. .skip_settle_delay = 1,
  2254. };
  2255. EXPORT_SYMBOL(scsi_esp_template);
  2256. static void esp_get_signalling(struct Scsi_Host *host)
  2257. {
  2258. struct esp *esp = shost_priv(host);
  2259. enum spi_signal_type type;
  2260. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  2261. type = SPI_SIGNAL_HVD;
  2262. else
  2263. type = SPI_SIGNAL_SE;
  2264. spi_signalling(host) = type;
  2265. }
  2266. static void esp_set_offset(struct scsi_target *target, int offset)
  2267. {
  2268. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2269. struct esp *esp = shost_priv(host);
  2270. struct esp_target_data *tp = &esp->target[target->id];
  2271. if (esp->flags & ESP_FLAG_DISABLE_SYNC)
  2272. tp->nego_goal_offset = 0;
  2273. else
  2274. tp->nego_goal_offset = offset;
  2275. tp->flags |= ESP_TGT_CHECK_NEGO;
  2276. }
  2277. static void esp_set_period(struct scsi_target *target, int period)
  2278. {
  2279. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2280. struct esp *esp = shost_priv(host);
  2281. struct esp_target_data *tp = &esp->target[target->id];
  2282. tp->nego_goal_period = period;
  2283. tp->flags |= ESP_TGT_CHECK_NEGO;
  2284. }
  2285. static void esp_set_width(struct scsi_target *target, int width)
  2286. {
  2287. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2288. struct esp *esp = shost_priv(host);
  2289. struct esp_target_data *tp = &esp->target[target->id];
  2290. tp->nego_goal_width = (width ? 1 : 0);
  2291. tp->flags |= ESP_TGT_CHECK_NEGO;
  2292. }
  2293. static struct spi_function_template esp_transport_ops = {
  2294. .set_offset = esp_set_offset,
  2295. .show_offset = 1,
  2296. .set_period = esp_set_period,
  2297. .show_period = 1,
  2298. .set_width = esp_set_width,
  2299. .show_width = 1,
  2300. .get_signalling = esp_get_signalling,
  2301. };
  2302. static int __init esp_init(void)
  2303. {
  2304. BUILD_BUG_ON(sizeof(struct scsi_pointer) <
  2305. sizeof(struct esp_cmd_priv));
  2306. esp_transport_template = spi_attach_transport(&esp_transport_ops);
  2307. if (!esp_transport_template)
  2308. return -ENODEV;
  2309. return 0;
  2310. }
  2311. static void __exit esp_exit(void)
  2312. {
  2313. spi_release_transport(esp_transport_template);
  2314. }
  2315. MODULE_DESCRIPTION("ESP SCSI driver core");
  2316. MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
  2317. MODULE_LICENSE("GPL");
  2318. MODULE_VERSION(DRV_VERSION);
  2319. module_param(esp_bus_reset_settle, int, 0);
  2320. MODULE_PARM_DESC(esp_bus_reset_settle,
  2321. "ESP scsi bus reset delay in seconds");
  2322. module_param(esp_debug, int, 0);
  2323. MODULE_PARM_DESC(esp_debug,
  2324. "ESP bitmapped debugging message enable value:\n"
  2325. " 0x00000001 Log interrupt events\n"
  2326. " 0x00000002 Log scsi commands\n"
  2327. " 0x00000004 Log resets\n"
  2328. " 0x00000008 Log message in events\n"
  2329. " 0x00000010 Log message out events\n"
  2330. " 0x00000020 Log command completion\n"
  2331. " 0x00000040 Log disconnects\n"
  2332. " 0x00000080 Log data start\n"
  2333. " 0x00000100 Log data done\n"
  2334. " 0x00000200 Log reconnects\n"
  2335. " 0x00000400 Log auto-sense data\n"
  2336. );
  2337. module_init(esp_init);
  2338. module_exit(esp_exit);