da9150-fg.c 14 KB

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  1. /*
  2. * DA9150 Fuel-Gauge Driver
  3. *
  4. * Copyright (c) 2015 Dialog Semiconductor
  5. *
  6. * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/of.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/slab.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/delay.h>
  21. #include <linux/power_supply.h>
  22. #include <linux/list.h>
  23. #include <asm/div64.h>
  24. #include <linux/mfd/da9150/core.h>
  25. #include <linux/mfd/da9150/registers.h>
  26. /* Core2Wire */
  27. #define DA9150_QIF_READ (0x0 << 7)
  28. #define DA9150_QIF_WRITE (0x1 << 7)
  29. #define DA9150_QIF_CODE_MASK 0x7F
  30. #define DA9150_QIF_BYTE_SIZE 8
  31. #define DA9150_QIF_BYTE_MASK 0xFF
  32. #define DA9150_QIF_SHORT_SIZE 2
  33. #define DA9150_QIF_LONG_SIZE 4
  34. /* QIF Codes */
  35. #define DA9150_QIF_UAVG 6
  36. #define DA9150_QIF_UAVG_SIZE DA9150_QIF_LONG_SIZE
  37. #define DA9150_QIF_IAVG 8
  38. #define DA9150_QIF_IAVG_SIZE DA9150_QIF_LONG_SIZE
  39. #define DA9150_QIF_NTCAVG 12
  40. #define DA9150_QIF_NTCAVG_SIZE DA9150_QIF_LONG_SIZE
  41. #define DA9150_QIF_SHUNT_VAL 36
  42. #define DA9150_QIF_SHUNT_VAL_SIZE DA9150_QIF_SHORT_SIZE
  43. #define DA9150_QIF_SD_GAIN 38
  44. #define DA9150_QIF_SD_GAIN_SIZE DA9150_QIF_LONG_SIZE
  45. #define DA9150_QIF_FCC_MAH 40
  46. #define DA9150_QIF_FCC_MAH_SIZE DA9150_QIF_SHORT_SIZE
  47. #define DA9150_QIF_SOC_PCT 43
  48. #define DA9150_QIF_SOC_PCT_SIZE DA9150_QIF_SHORT_SIZE
  49. #define DA9150_QIF_CHARGE_LIMIT 44
  50. #define DA9150_QIF_CHARGE_LIMIT_SIZE DA9150_QIF_SHORT_SIZE
  51. #define DA9150_QIF_DISCHARGE_LIMIT 45
  52. #define DA9150_QIF_DISCHARGE_LIMIT_SIZE DA9150_QIF_SHORT_SIZE
  53. #define DA9150_QIF_FW_MAIN_VER 118
  54. #define DA9150_QIF_FW_MAIN_VER_SIZE DA9150_QIF_SHORT_SIZE
  55. #define DA9150_QIF_E_FG_STATUS 126
  56. #define DA9150_QIF_E_FG_STATUS_SIZE DA9150_QIF_SHORT_SIZE
  57. #define DA9150_QIF_SYNC 127
  58. #define DA9150_QIF_SYNC_SIZE DA9150_QIF_SHORT_SIZE
  59. #define DA9150_QIF_MAX_CODES 128
  60. /* QIF Sync Timeout */
  61. #define DA9150_QIF_SYNC_TIMEOUT 1000
  62. #define DA9150_QIF_SYNC_RETRIES 10
  63. /* QIF E_FG_STATUS */
  64. #define DA9150_FG_IRQ_LOW_SOC_MASK (1 << 0)
  65. #define DA9150_FG_IRQ_HIGH_SOC_MASK (1 << 1)
  66. #define DA9150_FG_IRQ_SOC_MASK \
  67. (DA9150_FG_IRQ_LOW_SOC_MASK | DA9150_FG_IRQ_HIGH_SOC_MASK)
  68. /* Private data */
  69. struct da9150_fg {
  70. struct da9150 *da9150;
  71. struct device *dev;
  72. struct mutex io_lock;
  73. struct power_supply *battery;
  74. struct delayed_work work;
  75. u32 interval;
  76. int warn_soc;
  77. int crit_soc;
  78. int soc;
  79. };
  80. /* Battery Properties */
  81. static u32 da9150_fg_read_attr(struct da9150_fg *fg, u8 code, u8 size)
  82. {
  83. u8 buf[size];
  84. u8 read_addr;
  85. u32 res = 0;
  86. int i;
  87. /* Set QIF code (READ mode) */
  88. read_addr = (code & DA9150_QIF_CODE_MASK) | DA9150_QIF_READ;
  89. da9150_read_qif(fg->da9150, read_addr, size, buf);
  90. for (i = 0; i < size; ++i)
  91. res |= (buf[i] << (i * DA9150_QIF_BYTE_SIZE));
  92. return res;
  93. }
  94. static void da9150_fg_write_attr(struct da9150_fg *fg, u8 code, u8 size,
  95. u32 val)
  96. {
  97. u8 buf[size];
  98. u8 write_addr;
  99. int i;
  100. /* Set QIF code (WRITE mode) */
  101. write_addr = (code & DA9150_QIF_CODE_MASK) | DA9150_QIF_WRITE;
  102. for (i = 0; i < size; ++i) {
  103. buf[i] = (val >> (i * DA9150_QIF_BYTE_SIZE)) &
  104. DA9150_QIF_BYTE_MASK;
  105. }
  106. da9150_write_qif(fg->da9150, write_addr, size, buf);
  107. }
  108. /* Trigger QIF Sync to update QIF readable data */
  109. static void da9150_fg_read_sync_start(struct da9150_fg *fg)
  110. {
  111. int i = 0;
  112. u32 res = 0;
  113. mutex_lock(&fg->io_lock);
  114. /* Check if QIF sync already requested, and write to sync if not */
  115. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  116. DA9150_QIF_SYNC_SIZE);
  117. if (res > 0)
  118. da9150_fg_write_attr(fg, DA9150_QIF_SYNC,
  119. DA9150_QIF_SYNC_SIZE, 0);
  120. /* Wait for sync to complete */
  121. res = 0;
  122. while ((res == 0) && (i++ < DA9150_QIF_SYNC_RETRIES)) {
  123. usleep_range(DA9150_QIF_SYNC_TIMEOUT,
  124. DA9150_QIF_SYNC_TIMEOUT * 2);
  125. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  126. DA9150_QIF_SYNC_SIZE);
  127. }
  128. /* Check if sync completed */
  129. if (res == 0)
  130. dev_err(fg->dev, "Failed to perform QIF read sync!\n");
  131. }
  132. /*
  133. * Should always be called after QIF sync read has been performed, and all
  134. * attributes required have been accessed.
  135. */
  136. static inline void da9150_fg_read_sync_end(struct da9150_fg *fg)
  137. {
  138. mutex_unlock(&fg->io_lock);
  139. }
  140. /* Sync read of single QIF attribute */
  141. static u32 da9150_fg_read_attr_sync(struct da9150_fg *fg, u8 code, u8 size)
  142. {
  143. u32 val;
  144. da9150_fg_read_sync_start(fg);
  145. val = da9150_fg_read_attr(fg, code, size);
  146. da9150_fg_read_sync_end(fg);
  147. return val;
  148. }
  149. /* Wait for QIF Sync, write QIF data and wait for ack */
  150. static void da9150_fg_write_attr_sync(struct da9150_fg *fg, u8 code, u8 size,
  151. u32 val)
  152. {
  153. int i = 0;
  154. u32 res = 0, sync_val;
  155. mutex_lock(&fg->io_lock);
  156. /* Check if QIF sync already requested */
  157. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  158. DA9150_QIF_SYNC_SIZE);
  159. /* Wait for an existing sync to complete */
  160. while ((res == 0) && (i++ < DA9150_QIF_SYNC_RETRIES)) {
  161. usleep_range(DA9150_QIF_SYNC_TIMEOUT,
  162. DA9150_QIF_SYNC_TIMEOUT * 2);
  163. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  164. DA9150_QIF_SYNC_SIZE);
  165. }
  166. if (res == 0) {
  167. dev_err(fg->dev, "Timeout waiting for existing QIF sync!\n");
  168. mutex_unlock(&fg->io_lock);
  169. return;
  170. }
  171. /* Write value for QIF code */
  172. da9150_fg_write_attr(fg, code, size, val);
  173. /* Wait for write acknowledgment */
  174. i = 0;
  175. sync_val = res;
  176. while ((res == sync_val) && (i++ < DA9150_QIF_SYNC_RETRIES)) {
  177. usleep_range(DA9150_QIF_SYNC_TIMEOUT,
  178. DA9150_QIF_SYNC_TIMEOUT * 2);
  179. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  180. DA9150_QIF_SYNC_SIZE);
  181. }
  182. mutex_unlock(&fg->io_lock);
  183. /* Check write was actually successful */
  184. if (res != (sync_val + 1))
  185. dev_err(fg->dev, "Error performing QIF sync write for code %d\n",
  186. code);
  187. }
  188. /* Power Supply attributes */
  189. static int da9150_fg_capacity(struct da9150_fg *fg,
  190. union power_supply_propval *val)
  191. {
  192. val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT,
  193. DA9150_QIF_SOC_PCT_SIZE);
  194. if (val->intval > 100)
  195. val->intval = 100;
  196. return 0;
  197. }
  198. static int da9150_fg_current_avg(struct da9150_fg *fg,
  199. union power_supply_propval *val)
  200. {
  201. u32 iavg, sd_gain, shunt_val;
  202. u64 div, res;
  203. da9150_fg_read_sync_start(fg);
  204. iavg = da9150_fg_read_attr(fg, DA9150_QIF_IAVG,
  205. DA9150_QIF_IAVG_SIZE);
  206. shunt_val = da9150_fg_read_attr(fg, DA9150_QIF_SHUNT_VAL,
  207. DA9150_QIF_SHUNT_VAL_SIZE);
  208. sd_gain = da9150_fg_read_attr(fg, DA9150_QIF_SD_GAIN,
  209. DA9150_QIF_SD_GAIN_SIZE);
  210. da9150_fg_read_sync_end(fg);
  211. div = (u64) (sd_gain * shunt_val * 65536ULL);
  212. do_div(div, 1000000);
  213. res = (u64) (iavg * 1000000ULL);
  214. do_div(res, div);
  215. val->intval = (int) res;
  216. return 0;
  217. }
  218. static int da9150_fg_voltage_avg(struct da9150_fg *fg,
  219. union power_supply_propval *val)
  220. {
  221. u64 res;
  222. val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_UAVG,
  223. DA9150_QIF_UAVG_SIZE);
  224. res = (u64) (val->intval * 186ULL);
  225. do_div(res, 10000);
  226. val->intval = (int) res;
  227. return 0;
  228. }
  229. static int da9150_fg_charge_full(struct da9150_fg *fg,
  230. union power_supply_propval *val)
  231. {
  232. val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_FCC_MAH,
  233. DA9150_QIF_FCC_MAH_SIZE);
  234. val->intval = val->intval * 1000;
  235. return 0;
  236. }
  237. /*
  238. * Temperature reading from device is only valid if battery/system provides
  239. * valid NTC to associated pin of DA9150 chip.
  240. */
  241. static int da9150_fg_temp(struct da9150_fg *fg,
  242. union power_supply_propval *val)
  243. {
  244. val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_NTCAVG,
  245. DA9150_QIF_NTCAVG_SIZE);
  246. val->intval = (val->intval * 10) / 1048576;
  247. return 0;
  248. }
  249. static enum power_supply_property da9150_fg_props[] = {
  250. POWER_SUPPLY_PROP_CAPACITY,
  251. POWER_SUPPLY_PROP_CURRENT_AVG,
  252. POWER_SUPPLY_PROP_VOLTAGE_AVG,
  253. POWER_SUPPLY_PROP_CHARGE_FULL,
  254. POWER_SUPPLY_PROP_TEMP,
  255. };
  256. static int da9150_fg_get_prop(struct power_supply *psy,
  257. enum power_supply_property psp,
  258. union power_supply_propval *val)
  259. {
  260. struct da9150_fg *fg = dev_get_drvdata(psy->dev.parent);
  261. int ret;
  262. switch (psp) {
  263. case POWER_SUPPLY_PROP_CAPACITY:
  264. ret = da9150_fg_capacity(fg, val);
  265. break;
  266. case POWER_SUPPLY_PROP_CURRENT_AVG:
  267. ret = da9150_fg_current_avg(fg, val);
  268. break;
  269. case POWER_SUPPLY_PROP_VOLTAGE_AVG:
  270. ret = da9150_fg_voltage_avg(fg, val);
  271. break;
  272. case POWER_SUPPLY_PROP_CHARGE_FULL:
  273. ret = da9150_fg_charge_full(fg, val);
  274. break;
  275. case POWER_SUPPLY_PROP_TEMP:
  276. ret = da9150_fg_temp(fg, val);
  277. break;
  278. default:
  279. ret = -EINVAL;
  280. break;
  281. }
  282. return ret;
  283. }
  284. /* Repeated SOC check */
  285. static bool da9150_fg_soc_changed(struct da9150_fg *fg)
  286. {
  287. union power_supply_propval val;
  288. da9150_fg_capacity(fg, &val);
  289. if (val.intval != fg->soc) {
  290. fg->soc = val.intval;
  291. return true;
  292. }
  293. return false;
  294. }
  295. static void da9150_fg_work(struct work_struct *work)
  296. {
  297. struct da9150_fg *fg = container_of(work, struct da9150_fg, work.work);
  298. /* Report if SOC has changed */
  299. if (da9150_fg_soc_changed(fg))
  300. power_supply_changed(fg->battery);
  301. schedule_delayed_work(&fg->work, msecs_to_jiffies(fg->interval));
  302. }
  303. /* SOC level event configuration */
  304. static void da9150_fg_soc_event_config(struct da9150_fg *fg)
  305. {
  306. int soc;
  307. soc = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT,
  308. DA9150_QIF_SOC_PCT_SIZE);
  309. if (soc > fg->warn_soc) {
  310. /* If SOC > warn level, set discharge warn level event */
  311. da9150_fg_write_attr_sync(fg, DA9150_QIF_DISCHARGE_LIMIT,
  312. DA9150_QIF_DISCHARGE_LIMIT_SIZE,
  313. fg->warn_soc + 1);
  314. } else if ((soc <= fg->warn_soc) && (soc > fg->crit_soc)) {
  315. /*
  316. * If SOC <= warn level, set discharge crit level event,
  317. * and set charge warn level event.
  318. */
  319. da9150_fg_write_attr_sync(fg, DA9150_QIF_DISCHARGE_LIMIT,
  320. DA9150_QIF_DISCHARGE_LIMIT_SIZE,
  321. fg->crit_soc + 1);
  322. da9150_fg_write_attr_sync(fg, DA9150_QIF_CHARGE_LIMIT,
  323. DA9150_QIF_CHARGE_LIMIT_SIZE,
  324. fg->warn_soc);
  325. } else if (soc <= fg->crit_soc) {
  326. /* If SOC <= crit level, set charge crit level event */
  327. da9150_fg_write_attr_sync(fg, DA9150_QIF_CHARGE_LIMIT,
  328. DA9150_QIF_CHARGE_LIMIT_SIZE,
  329. fg->crit_soc);
  330. }
  331. }
  332. static irqreturn_t da9150_fg_irq(int irq, void *data)
  333. {
  334. struct da9150_fg *fg = data;
  335. u32 e_fg_status;
  336. /* Read FG IRQ status info */
  337. e_fg_status = da9150_fg_read_attr(fg, DA9150_QIF_E_FG_STATUS,
  338. DA9150_QIF_E_FG_STATUS_SIZE);
  339. /* Handle warning/critical threhold events */
  340. if (e_fg_status & DA9150_FG_IRQ_SOC_MASK)
  341. da9150_fg_soc_event_config(fg);
  342. /* Clear any FG IRQs */
  343. da9150_fg_write_attr(fg, DA9150_QIF_E_FG_STATUS,
  344. DA9150_QIF_E_FG_STATUS_SIZE, e_fg_status);
  345. return IRQ_HANDLED;
  346. }
  347. static struct da9150_fg_pdata *da9150_fg_dt_pdata(struct device *dev)
  348. {
  349. struct device_node *fg_node = dev->of_node;
  350. struct da9150_fg_pdata *pdata;
  351. pdata = devm_kzalloc(dev, sizeof(struct da9150_fg_pdata), GFP_KERNEL);
  352. if (!pdata)
  353. return NULL;
  354. of_property_read_u32(fg_node, "dlg,update-interval",
  355. &pdata->update_interval);
  356. of_property_read_u8(fg_node, "dlg,warn-soc-level",
  357. &pdata->warn_soc_lvl);
  358. of_property_read_u8(fg_node, "dlg,crit-soc-level",
  359. &pdata->crit_soc_lvl);
  360. return pdata;
  361. }
  362. static const struct power_supply_desc fg_desc = {
  363. .name = "da9150-fg",
  364. .type = POWER_SUPPLY_TYPE_BATTERY,
  365. .properties = da9150_fg_props,
  366. .num_properties = ARRAY_SIZE(da9150_fg_props),
  367. .get_property = da9150_fg_get_prop,
  368. };
  369. static int da9150_fg_probe(struct platform_device *pdev)
  370. {
  371. struct device *dev = &pdev->dev;
  372. struct da9150 *da9150 = dev_get_drvdata(dev->parent);
  373. struct da9150_fg_pdata *fg_pdata = dev_get_platdata(dev);
  374. struct da9150_fg *fg;
  375. int ver, irq, ret = 0;
  376. fg = devm_kzalloc(dev, sizeof(*fg), GFP_KERNEL);
  377. if (fg == NULL)
  378. return -ENOMEM;
  379. platform_set_drvdata(pdev, fg);
  380. fg->da9150 = da9150;
  381. fg->dev = dev;
  382. mutex_init(&fg->io_lock);
  383. /* Enable QIF */
  384. da9150_set_bits(da9150, DA9150_CORE2WIRE_CTRL_A, DA9150_FG_QIF_EN_MASK,
  385. DA9150_FG_QIF_EN_MASK);
  386. fg->battery = devm_power_supply_register(dev, &fg_desc, NULL);
  387. if (IS_ERR(fg->battery)) {
  388. ret = PTR_ERR(fg->battery);
  389. return ret;
  390. }
  391. ver = da9150_fg_read_attr(fg, DA9150_QIF_FW_MAIN_VER,
  392. DA9150_QIF_FW_MAIN_VER_SIZE);
  393. dev_info(dev, "Version: 0x%x\n", ver);
  394. /* Handle DT data if provided */
  395. if (dev->of_node) {
  396. fg_pdata = da9150_fg_dt_pdata(dev);
  397. dev->platform_data = fg_pdata;
  398. }
  399. /* Handle any pdata provided */
  400. if (fg_pdata) {
  401. fg->interval = fg_pdata->update_interval;
  402. if (fg_pdata->warn_soc_lvl > 100)
  403. dev_warn(dev, "Invalid SOC warning level provided, Ignoring");
  404. else
  405. fg->warn_soc = fg_pdata->warn_soc_lvl;
  406. if ((fg_pdata->crit_soc_lvl > 100) ||
  407. (fg_pdata->crit_soc_lvl >= fg_pdata->warn_soc_lvl))
  408. dev_warn(dev, "Invalid SOC critical level provided, Ignoring");
  409. else
  410. fg->crit_soc = fg_pdata->crit_soc_lvl;
  411. }
  412. /* Configure initial SOC level events */
  413. da9150_fg_soc_event_config(fg);
  414. /*
  415. * If an interval period has been provided then setup repeating
  416. * work for reporting data updates.
  417. */
  418. if (fg->interval) {
  419. INIT_DELAYED_WORK(&fg->work, da9150_fg_work);
  420. schedule_delayed_work(&fg->work,
  421. msecs_to_jiffies(fg->interval));
  422. }
  423. /* Register IRQ */
  424. irq = platform_get_irq_byname(pdev, "FG");
  425. if (irq < 0) {
  426. dev_err(dev, "Failed to get IRQ FG: %d\n", irq);
  427. ret = irq;
  428. goto irq_fail;
  429. }
  430. ret = devm_request_threaded_irq(dev, irq, NULL, da9150_fg_irq,
  431. IRQF_ONESHOT, "FG", fg);
  432. if (ret) {
  433. dev_err(dev, "Failed to request IRQ %d: %d\n", irq, ret);
  434. goto irq_fail;
  435. }
  436. return 0;
  437. irq_fail:
  438. if (fg->interval)
  439. cancel_delayed_work(&fg->work);
  440. return ret;
  441. }
  442. static int da9150_fg_remove(struct platform_device *pdev)
  443. {
  444. struct da9150_fg *fg = platform_get_drvdata(pdev);
  445. if (fg->interval)
  446. cancel_delayed_work(&fg->work);
  447. return 0;
  448. }
  449. static int da9150_fg_resume(struct platform_device *pdev)
  450. {
  451. struct da9150_fg *fg = platform_get_drvdata(pdev);
  452. /*
  453. * Trigger SOC check to happen now so as to indicate any value change
  454. * since last check before suspend.
  455. */
  456. if (fg->interval)
  457. flush_delayed_work(&fg->work);
  458. return 0;
  459. }
  460. static struct platform_driver da9150_fg_driver = {
  461. .driver = {
  462. .name = "da9150-fuel-gauge",
  463. },
  464. .probe = da9150_fg_probe,
  465. .remove = da9150_fg_remove,
  466. .resume = da9150_fg_resume,
  467. };
  468. module_platform_driver(da9150_fg_driver);
  469. MODULE_DESCRIPTION("Fuel-Gauge Driver for DA9150");
  470. MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
  471. MODULE_LICENSE("GPL");